JP2000242224A5 - - Google Patents

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JP2000242224A5
JP2000242224A5 JP1999042549A JP4254999A JP2000242224A5 JP 2000242224 A5 JP2000242224 A5 JP 2000242224A5 JP 1999042549 A JP1999042549 A JP 1999042549A JP 4254999 A JP4254999 A JP 4254999A JP 2000242224 A5 JP2000242224 A5 JP 2000242224A5
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sustain
period
discharge
voltage
scn
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JP2000242224A (en
JP3733773B2 (en
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Priority claimed from TW89100703A external-priority patent/TW516014B/en
Publication of JP2000242224A5 publication Critical patent/JP2000242224A5/ja
Publication of JP2000242224A publication Critical patent/JP2000242224A/en
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Description

Patent application title: Driving method of AC type plasma display panel
[Claim of claim]
[Claim 1] A substrate on which scan electrodes and sustain electrodes are formed and another substrate on which data electrodes are formed are disposed opposite to each other to form an AC-type plasma display panel, and a plurality of sub-fields constitute one field period to realize gray scale display. In the driving method to be performed, in a plurality of subfields, an initialization period for performing an initialization operation for generating an initialization discharge by applying a voltage to at least a scan electrode and a sustain electrode, and a scan pulse voltage to the scan electrode after this initialization period. And a sustaining period for applying a sustaining pulse voltage to the scan electrode and the sustaining electrode after the writing period to cause a sustaining discharge. During the maintenance operation of the sustain period in at least one of the sub-fields, By causing a portion of the initialization operation of the sub-field is controlled to cause an initializing discharge only in the discharge cells having undergone the display in the preceding subfield AC type plasma display panel driving method.
[Claim 2] The value of the low level of the sustain pulse voltage applied to the scan electrode and the sustain electrode in the sustain period in at least one subfield of the plurality of subfields is set to the scan electrode in the write period of the next subfield following the subfield. The scanning pulse voltage according to claim 1, wherein the scanning pulse voltage to be applied is set higher than the low level value of the scanning pulse voltage. AC type plasma display panel driving method.
[Claim 3] In the initializing period of at least one of the plurality of subfields, the voltage which becomes lower than the discharge start voltage with respect to the sustaining electrode between the sustaining period of the previous subfield and the writing period The voltage according to claim 2, wherein a voltage gradually changing toward a voltage exceeding the discharge start voltage is applied. AC type plasma display panel driving method.
[Claim 4] In the sustain period of at least one of a plurality of subfields, the last sustain pulse width applied to the scan electrode or the sustain electrode is set shorter than the other sustain pulse widths, so that the last sustain period is maintained. The erase operation according to claim 1, wherein an erase operation for stopping the sustain discharge is performed simultaneously with the operation. AC type plasma display panel driving method.
Detailed Description of the Invention
[0001]
Field of the Invention
The present invention relates to a method of driving an AC type plasma display panel used for image display of a television receiver and a computer terminal or the like.
[0002]
[Prior Art]
A partial perspective view of a conventional AC type plasma display panel (hereinafter referred to as a panel) is shown in FIG. As shown in FIG. 3, on the first glass substrate 1, scan electrodes 4 and sustain electrodes 5 covered with dielectric layer 2 and protective film 3 are provided in parallel with each other in pairs. A plurality of data electrodes 8 covered with an insulator layer 7 is attached on the second glass substrate 6, and on the insulator layer 7 between the data electrodes 8, a partition 9 is formed in parallel with the data electrodes 8. Is provided. In addition, phosphors 10 are formed on the surface of the insulator layer 7 and on both side surfaces of the barrier ribs 9. The first glass substrate 1 and the second glass substrate 6 are disposed to face each other across the discharge space 11 so that the scan electrode 4 and the sustain electrode 5 are orthogonal to the data electrode 8. The discharge space 11 contains, as a discharge gas, at least one of helium, neon and argon and xenon. A discharge cell 12 is formed in a discharge space at the intersection of the data electrode 8 and the scan electrode 4 and the sustain electrode 5 which make a pair.
[0003]
Next, the electrode arrangement of this panel is shown in FIG. As shown in FIG. 4, the electrode arrangement of this panel has a matrix configuration of m × n, and data electrodes D of m columns in the column direction 1 ~ D m Are arranged, and n rows of scan electrodes SCN are arranged in the row direction. 1 ~ SCN n And sustain electrode SUS 1 ~ SUS n Are arranged. Further, the discharge cell 12 shown in FIG. 3 is provided in a region as shown in FIG.
[0004]
An operation drive timing diagram of a conventional drive method for driving this panel is shown in FIG. This driving method is for performing gradation display of 256 gradations, and one field period is configured by eight subfields. Hereinafter, a conventional method of driving a panel will be described with reference to FIGS. 3 to 5.
[0005]
As shown in FIG. 5, the first to eighth subfields are respectively composed of an initialization period, a write period, a sustain period and an erase period. First, the operation in the first subfield will be described.
[0006]
As shown in FIG. 5, all the data electrodes D in the initializing operation in the first half of the initializing period 1 ~ D m And all sustain electrodes SUS 1 ~ SUS n Is held at 0 (V), and all scan electrodes SCN 1 ~ SCN n In all the sustain electrodes SUS 1 ~ SUS n On the other hand, a lamp voltage is applied which gradually increases from the voltage Vp (V) lower than the discharge start voltage to the voltage Vr (V) exceeding the discharge start voltage. While the lamp voltage is rising, all scan electrodes SCN in all discharge cells 12 1 ~ SCN n To all data electrodes D 1 ~ D m And all sustain electrodes SUS 1 ~ SUS n Each time the first weak setup discharge occurs, scan electrode SCN 1 ~ SCN n Negative wall voltage is accumulated on the surface of upper protective film 3 and all data electrodes D are 1 ~ D m Surface of the upper insulator layer 7 and all the sustain electrodes SUS 1 ~ SUS n A positive wall voltage is accumulated on the surface of the upper protective film 3.
[0007]
Furthermore, in the second half of the initializing operation, all sustain electrodes SUS 1 ~ SUS n Is maintained at a positive voltage Vh (V), and all scan electrodes SCN 1 ~ SCN n In all the sustain electrodes SUS 1 ~ SUS n On the other hand, a ramp voltage is applied which gradually drops from voltage Vq (V) which is lower than the discharge start voltage to 0 (V) which exceeds the discharge start voltage. While the lamp voltage is decreasing, all sustain electrodes SUS are again applied to all discharge cells 12. 1 ~ SUS n From all scan electrodes SCN 1 ~ SCN n Each time a second weak setup discharge occurs, all scan electrodes SCN 1 ~ SCN n Negative wall voltage on the surface of the upper protective film 3 and all sustain electrodes SUS 1 ~ SUS n The positive wall voltage on the surface of the upper protective film 3 is weakened. Also, all data electrodes D 1 ~ D m And all scan electrodes SCN 1 ~ SCN n And a weak discharge also occurs between all 1 ~ D m The positive wall voltage on the surface of the upper insulator layer 7 is adjusted to a value suitable for the write operation.
[0008]
Thus, the initialization operation of the initialization period is completed.
[0009]
In the write operation for the next write period, all scan electrodes SCN 1 ~ SCN n Is held at Vs (V), and data electrode D is 1 ~ D m Data electrode D corresponding to discharge cell 12 to be displayed in the first row. j (J represents an integer of 1 to m), positive write pulse voltage + Vw (V), scan electrode SCN in the first row 1 The scan pulse voltage 0 (V) is respectively applied to the At this time, a predetermined data electrode D j And scan electrode SCN 1 Surface of insulator layer 7 and scan electrode SCN at the intersection with 1 The voltage between the upper surface of protective film 3 and the upper surface is the write pulse voltage + Vw (V). 1 ~ D m Since the positive wall voltage of the surface of upper insulator layer 7 is added, a predetermined data electrode D is formed at this intersection. j And scan electrode SCN 1 Between and sustain electrode SUS 1 And scan electrode SCN 1 Write discharge occurs, and the scan electrode SCN at this intersection 1 Positive voltage is accumulated on the surface of the upper protective film 3 and sustain electrode SUS 1 Data electrode D in which a negative voltage is accumulated on the surface of upper protective film 3 and write discharge occurs j A negative voltage is accumulated on the surface of upper insulator layer 7.
[0010]
Next, the data electrode D 1 ~ D m Data electrode D corresponding to discharge cell 12 to be displayed in the second row. j Positive write pulse voltage + Vw (V), scan electrode SCN in the second row 2 The scan pulse voltage 0 (V) is respectively applied to the At this time, a predetermined data electrode D j And scan electrode SCN 2 Surface of insulator layer 7 and scan electrode SCN at the intersection with 2 The voltage between the upper protective film 3 and the surface of the upper protective film 3 is determined by the write pulse voltage + Vw (V). j Since the positive wall voltage accumulated on the surface of upper insulator layer 7 is added, a predetermined data electrode D is formed at this intersection. j And scan electrode SCN 2 Between and sustain electrode SUS 2 And scan electrode SCN 2 Write discharge occurs, and the scan electrode SCN at this intersection 2 Positive voltage is accumulated on the surface of the upper protective film 3 and sustain electrode SUS 2 A negative voltage is accumulated on the surface of the upper protective film 3.
[0011]
A similar operation continues, and finally, data electrode D 1 ~ D m Data electrode D corresponding to discharge cell 12 to be displayed in the n-th row. j Positive write pulse voltage + Vw (V), scan electrode SCN in the nth row n The scan pulse voltage 0 (V) is respectively applied to the At this time, a predetermined data electrode D j And scan electrode SCN n Predetermined data electrode D at the intersection with j And scan electrode SCN n Between and sustain electrode SUS n And scan electrode SCN n Write discharge occurs, and the scan electrode SCN at this intersection n Positive wall voltage is accumulated on the surface of the upper protective film 3 and sustain electrode SUS n Data wall D where negative wall voltage is accumulated on the surface of upper protective film 3 and write discharge occurs j A negative wall voltage is accumulated on the surface of the upper insulator layer 7.
[0012]
Thus, the write operation in the write period is completed.
[0013]
In the subsequent sustain period, first, all scan electrodes SCN 1 ~ SCN n And sustain electrode SUS 1 ~ SUS n Is once returned to 0 (V), all scan electrodes SCN 1 ~ SCN n When a positive sustain pulse voltage + Vm (V) is applied to the gate, scan electrode SCN in discharge cell 12 in which the write discharge has occurred. i (I is an integer from 1 to n) the surface of the protective film 3 and the sustain electrode SUS 1 ~ SUS n The voltage between the upper protective film 3 and the surface of the upper protective film 3 is the sustaining pulse voltage + Vm (V), the scan electrode SCN accumulated in the writing period. i Positive wall voltage and sustain electrode SUS accumulated on the surface of upper protective film 3 i The negative wall voltage accumulated on the surface of the upper protective film 3 is added and exceeds the firing voltage. Therefore, in the discharge cell in which the write discharge has occurred, scan electrode SCN i And sustain electrode SUS i And a sustain discharge occurs, and scan electrode SCN in the discharge cell which has caused the sustain discharge. i Negative wall voltage is accumulated on the surface of the upper protective film 3 and sustain electrode SUS i A positive wall voltage is accumulated on the surface of the upper protective film 3. Thereafter, the sustain pulse voltage returns to 0 (V).
[0014]
Subsequently, all sustain electrodes SUS 1 ~ SUS n Sustaining voltage of + Vm (V) applied to the sustain i Upper surface of protective film 3 and scan electrode SCN i The voltage between the upper protective film 3 surface and the sustaining pulse voltage + Vm (V) is the scan electrode SCN accumulated by the immediately preceding sustaining discharge. i Negative wall voltage on the surface of protective film 3 and sustain electrode SUS i The positive wall voltage on the surface of the upper protective film 3 is added. Therefore, in the discharge cell in which the sustain discharge has occurred, sustain electrode SUS i And scan electrode SCN i And a sustain discharge occurs between the discharge cell and the sustain electrode SUS in the discharge cell. i Negative wall voltage is accumulated on the surface of the upper protective film 3 and scan electrode SCN i A positive wall voltage is accumulated on the surface of the upper protective film 3. Thereafter, the sustain pulse voltage returns to 0 (V).
[0015]
Likewise, all scan electrodes SCN 1 ~ SCN n And all sustain electrodes SUS 1 ~ SUS n By alternately applying positive sustain pulse voltage + Vm (V) to the sustain discharge, the sustain discharge is continuously performed. At the end of the sustain period, all scan electrodes SCN 1 ~ SCN n When a positive sustain pulse voltage + Vm (V) is applied to the gate, scan electrode SCN in the discharge cell which has caused a sustain discharge. i Surface of protective film 3 and sustain electrode SUS i The voltage between the upper protective film 3 surface and the sustaining pulse voltage + Vm (V) is the scan electrode SCN accumulated by the immediately preceding sustaining discharge. i Positive wall voltage on the surface of protective film 3 and sustain electrode SUS i The negative wall voltage on the surface of the upper protective film 3 is added. Therefore, in the discharge cell in which the sustain discharge has occurred, scan electrode SCN i And sustain electrode SUS i Between the discharge cell and the scan electrode SCN in the discharge cell. i Negative wall voltage is accumulated on the surface of the upper protective film 3 and sustain electrode SUS i A positive wall voltage is accumulated on the surface of the upper protective film 3. Thereafter, the sustain pulse voltage returns to 0 (V). Thus, the sustain operation of the sustain period is completed. The visible light emission from the phosphor 10 excited by the ultraviolet light generated by the sustain discharge is used for display.
[0016]
In the subsequent erasing period, all sustain electrodes SUS 1 ~ SUS n When a ramp voltage gradually rising from 0 (V) to + Ve (V) is applied to the discharge cell in the discharge cell that has undergone the sustain discharge, scan electrode SCN is generated. i Surface of protective film 3 and sustain electrode SUS i The voltage between the upper protective film 3 surface and the scan electrode SCN at the end of the sustain period is i Negative wall voltage on the surface of protective film 3 and sustain electrode SUS i The positive wall voltage on the surface of the upper protective film 3 is added to this lamp voltage. Therefore, in the discharge cell in which the sustain discharge has occurred, sustain electrode SUS i And scan electrode SCN i And a weak erase discharge occurs, and scan electrode SCN i Negative wall voltage on the surface of protective film 3 and sustain electrode SUS i The positive wall voltage on the surface of the upper protective film 3 is weakened to stop the sustain discharge.
[0017]
Thus, the erase operation in the erase period is completed.
[0018]
However, in the above operation, with respect to the discharge cells in which the display is not performed, the setup discharge occurs in the setup period, but the write discharge, the sustain discharge and the erase discharge are not performed, and the scan electrodes of the discharge cells in which the display is not performed. SCN i And sustain electrode SUS i Wall voltage accumulated on the surface of the protective film 3 and the data electrode D j The wall voltage accumulated on the surface of the upper insulator layer 7 is maintained at the end of the initialization period.
[0019]
One screen in the first subfield is displayed by all the above operations. Hereinafter, similar operations are performed from the second sub-field to the eighth sub-field. The luminance of the discharge cell displayed in these sub-fields is determined by the number of applications of sustain pulse voltage + Vm (V). Therefore, for example, the number of times of application of the sustain pulse voltage in each subfield is appropriately set, and the luminance by sustain discharge is 2 0 , 2 1 , 2 2 , ... 2 7 By making up eight subfields, 8 Gradation display of 256 gradations becomes possible.
[0020]
In the conventional driving method described above, in the display of a so-called black screen in which there is no discharge cell to be displayed on the panel, the write discharge in the write period, the sustain discharge in the sustain period and the erase discharge in the erase period do not occur. Since the setup discharge only occurs during the curing period, the setup discharge is weak, and the discharge light emission is also weak, the contrast of the panel is high. For example, in a 42-inch AC type plasma display panel forming a matrix configuration of 480 rows and 852 × 3 columns, when one field period is configured by eight sub-fields and 256 gradation display is performed, the initial stage of each sub-field Luminance by two setup discharges in the integration period is 0.15 cd / m 2 Met. Therefore, the total of eight subfields is 0.15 × 8 = 1.2 cd / m 2 Maximum brightness is 420 cd / m 2 Because of this, the contrast of this panel is 420 / 1.2: 1 = 350: 1, and a fairly high value of contrast is obtained.
[0021]
[Problems to be solved by the invention]
However, in the above-mentioned conventional driving method, although a fairly high contrast is obtained when panel display is performed under normal illumination, two setup discharges are always generated for each subfield, so There is a big problem that when the panel display is in the dark place, the luminance is high enough to make even the light emission by this weak setup discharge noticeable, and the visibility of the black display is poor when the panel display is not so bright. The
[0022]
[Means for Solving the Problems]
In order to solve such problems, the present inventors have completed the present invention by examining the role of the initialization operation in the initialization period.
[0023]
Next, the reason why the initialization operation is required for each subfield in the conventional driving method will be described. Here, in the conventional drive waveform shown in FIG. 5, it is assumed that Vw = 70 V and Vm = 200 V.
[0024]
In order to cause write discharge in a predetermined discharge cell in the write period, data electrode D of the discharge cell is used. j And scan electrode SCN i It is necessary to apply a voltage higher than the discharge start voltage (for example, about 250 V) to the discharge space between them. During the write operation, scan electrode SCN i Is 0 V and the data electrode D j Since a write voltage of 70 V is applied to the data j It is necessary to pre-store a wall voltage of about 200 V on the upper insulator layer 7. V necessary wall voltage for this writing write It is assumed that (.about.200 V).
[0025]
Also, the data electrode D is maintained by the sustain operation in the sustain period. j Although the wall voltage accumulates on the upper insulator layer 7, the value of the wall voltage at the end of the sustain period is equal to that of the scan electrode SCN. i Applied to the voltage and sustain electrode SUS i It is considered that the voltage value is about the middle of the voltage applied to the This wall voltage V sustain (100 V)
[0026]
Therefore, during the transition from the end of the sustain operation in one sub-field to the write operation in the next sub-field, data electrode D j V the wall voltage on top insulator layer 7 sustain To V write Need to be changed. This wall voltage difference V write -V sustain The compensation of (.about.100V) is one of the main roles of the initialization operation, and the initialization operation is essential for driving the panel stably.
[0027]
From the above consideration, it can be seen that the data electrode D at the end of the sustain period in a certain sub-field is j Wall voltage V on top insulator layer 7 sustain But the wall voltage V required during the write period in the next sub-field write By performing the same drive as in the above, it is found that the initialization operation can be simplified and unnecessary light emission associated with the initialization operation can be eliminated. Based on this finding, it was possible to obtain a method of driving a panel capable of greatly improving the contrast while greatly improving the visibility of black.
[0028]
The driving method of the AC type plasma display panel of the present invention is A substrate on which scan electrodes and sustain electrodes are formed and another substrate on which data electrodes are formed are disposed opposite to each other to form an AC-type plasma display panel, and a plurality of sub-fields constitute one field period to realize gray scale display. In the driving method to be performed, in a plurality of subfields, an initialization period for performing an initialization operation for generating an initialization discharge by applying a voltage to at least a scan electrode and a sustain electrode, and a scan pulse voltage to the scan electrode after this initialization period. And a sustaining period for applying a sustaining pulse voltage to the scan electrode and the sustaining electrode after the writing period to cause a sustaining discharge. During the maintenance operation of the sustain period in at least one of the sub-fields, By causing a portion of the initialization operation of the sub-field is controlled to cause an initializing discharge only in the discharge cells having undergone the display in the preceding subfield It is a thing.
[0029]
By this method, in the subfields after the second subfield, the setup discharge is caused only in the discharge cell in which display is performed in the immediately preceding subfield, and the setup discharge is not generated in the discharge cell not performing display. Can.
[0030]
BEST MODE FOR CARRYING OUT THE INVENTION
An AC type plasma display panel (hereinafter referred to as a panel) used in the present invention is the same as that shown in FIG. 3 as a conventional example. The electrode arrangement of this panel is the same as that shown in FIG. Therefore, their explanation is omitted.
[0031]
A method of driving the panel, which is an embodiment of the present invention, for driving the panel will be described. FIG. 1 shows an operation drive timing chart of the drive method.
[0032]
As shown in FIG. 1, one field period is composed of first to eighth sub-fields each having an initialization period, a writing period and a sustaining period, whereby 256 gray scales are displayed. Among the eight subfields, in seven subfields excluding the first subfield, part of the initialization operation of the initialization period is performed simultaneously with the sustain operation of the previous subfield. I have to. In the first subfield, the initialization period, the write period and the sustain period are provided independently, and the independent erase period is not provided. In the second sub-field, a part of the initialization period is provided overlapping with the sustain period of the first sub-field, followed by the write period and the sustain period, and the erase period is provided. Absent. That is, simultaneously with the sustaining operation in the sustaining period of the first subfield, the initializing operation in the initializing period of the second subfield is performed. Similarly, in the third to eighth subfields, the initialization period, the write period and the sustain period are similarly provided, but the erase period is not provided, and the initialization operation in the initialization period of each subfield is performed. Some are performed simultaneously with the sustain operation in the sustain period of the immediately preceding subfield.
[0033]
In FIG. 1, the operations of the initialization period and the writing period of the first subfield are the same as the operations described in the conventional example, and thus the description thereof is omitted. The operation in the sustain period of the first sub-field and the operation in the initialization period of the second sub-field are performed at the same time, which is the gist of the present invention. explain in detail.
[0034]
As shown in FIG. 1, the sustain period of the first subfield and the period before the initialization period of the second subfield overlap, and in this overlapping period, all scan electrodes SCN are overlapped. 1 ~ SCN n And all sustain electrodes SUS 1 ~ SUS n In addition, the DC voltage Vt (V) is superimposed on the sustain pulse voltage Vm (V) and applied. That is, in the write period, scan electrode SCN 1 ~ SCN n Against the low level value (0 (V)) of the scan pulse voltage applied to the 1 ~ SUS n And scan electrode SCN 1 ~ SCN n The low level value (Vt (V)) of the sustain pulse voltage to be applied is set to a high potential. Then, the pulse width of the last sustain pulse in the sustain period is made shorter than the pulse widths of the other sustain pulses, and then the scan electrode SCN. 1 ~ SCN n And sustain electrode SUS 1 ~ SUS n The voltage of V is set to a constant voltage Vu (V).
[0035]
Subsequently, in the subsequent period following the previous period of the initialization period of the second sub-field, all the sustain electrodes SUS are 1 ~ SUS n Positive voltage Vh (V), all scan electrodes SCN 1 ~ SCN n A ramp voltage is applied which gently drops from the voltage Vq '(V) to 0 (V). At this time, the voltage Vq ′ (V) does not have to be equal to the voltage Vq (V), and the voltage Vq ′ (V) can be set to a voltage lower than the voltage Vq (V).
[0036]
In the above operation, focusing on the operation of the sustain period of the first sub-field, all scan electrodes SCN 1 ~ SCN n And all sustain electrodes SUS 1 ~ SUS n The DC voltage Vt (V) is superimposed on the sustain pulse voltage Vm (V). Therefore, all scan electrodes SCN 1 ~ SCN n And all sustain electrodes SUS 1 ~ SUS n And the voltage relationship between them and the operation in the conventional drive method, ie, all sustain electrodes SUS 1 ~ SUS n And all scan electrodes SCN 1 ~ SCN n It is equivalent to the case where positive sustain pulse voltage Vm (V) is alternately applied to Therefore, as in the conventional case, the sustain discharge is continuously performed in the discharge cell in which the write discharge has occurred.
[0037]
The pulse width of the sustain pulse voltage applied last in the sustain period is set shorter than 2 μs, which is the time for the discharge to form a wall charge and stably end, and the scan after the sustain pulse voltage is applied. Electrode SCN 1 ~ SCN n And sustain electrode SUS 1 ~ SUS n Is set to a constant voltage Vu (V). Therefore, scan electrode SCN 1 ~ SCN n Wall voltage on the surface of protective film 3 and sustain electrode SUS 1 ~ SUS n The wall voltage on the surface of the upper protective film 3 is almost equal, and the erasing operation is performed. Further, such a sustain discharge does not occur in the discharge cells in which the write discharge has not occurred.
[0038]
Next, focusing on the initializing period of the second sub-field, all the scan electrodes SCN in the initializing operation of the previous period of the initializing period. 1 ~ SCN n And all data electrodes D 1 ~ D m The voltage between them becomes Vt (V) or Vt + Vm (V). In the discharge cell in which the write discharge occurred, the data electrode D j Surface of upper insulator layer 7 and scan electrode SCN i The maximum voltage applied between the upper surface of the protective film 3 is Vt + Vm (V) and the scan electrode SCN. i From the sum of the positive wall voltage accumulated on the surface of the upper protective film 3 and the data electrode D j The negative wall voltage accumulated on the surface of the upper insulator layer 7 by the writing operation is subtracted (that is, the absolute value is added), and the discharge start voltage is exceeded. Therefore, in the discharge cell in which the write discharge has occurred, scan electrode SCN i To data electrode D j Discharge occurs. This is data electrode D j And the data electrode D j A positive wall voltage is accumulated on the surface of the upper insulator layer 7. The initializing discharge is generated each time the sustain pulse voltage is applied during the period before the initializing period.
[0039]
On the other hand, in the discharge cell in which writing is not performed, data electrode D j Surface of upper insulator layer 7 and scan electrode SCN i The maximum voltage applied to the upper surface of the protective film 3 is Vt + Vm (V) and the scan electrode SCN. i From the sum of the positive wall voltage accumulated on the surface of the protective film 3 and the data electrode D j The positive wall voltage accumulated on the surface of the upper insulator layer 7 is subtracted and does not exceed the discharge start voltage. Therefore, in the discharge cell in which writing is not performed in the first sub-field, data electrode D in the period prior to the initialization period is j There is no setup discharge for.
[0040]
Furthermore, in the initializing operation after the initializing period, all sustain electrodes SUS are 1 ~ SUS n A positive voltage Vh (V) is applied to the Also, all scan electrodes SCN 1 ~ SCN n In all the sustain electrodes SUS 1 ~ SUS n The voltage Vq '(V), which is lower than the discharge start voltage, gradually drops to 0 (V) equal to the low level value of the scan pulse voltage applied to the scan electrodes in the write period after the discharge start voltage. Ramp voltage is applied. In the discharge cell in which the setup discharge has occurred in the period before the setup period while the lamp voltage is decreasing, sustain electrode SUS is maintained. i From scan electrode SCN i Reset discharge occurs again. This setup discharge is weak and scan electrode SCN i Positive wall voltage on the surface of the upper protective film 3, sustain electrode SUS i Each of the negative wall voltages accumulates slightly on the surface of the. Also, the data electrode D j And scan electrode SCN i And a weak discharge also occurs between j The positive wall voltage stored on the surface of the upper insulator layer 7 is adjusted to a value suitable for the write operation. For the discharge cells in which the first setup discharge has not occurred, the wall voltage has already been adjusted to a value suitable for the write operation in the previous subfield, so the above-mentioned second setup discharge does not occur.
[0041]
As apparent from the above description, although the erase period is not provided in the second to eighth subfields, the write operation, the sustain operation and the erase operation and the initialization operation of the next subfield are surely performed. . Further, in each subfield after the second subfield, the setup discharge, the write discharge, the sustain discharge, and the erase discharge are not performed for the discharge cells for which display is not performed, and scan electrode SCN corresponding to the discharge cells is not performed. 1 ~ SCN n And sustain electrode SUS 1 ~ SUS n Wall voltage and data electrode D on the surface of the upper protective film 3 1 ~ D m The wall voltage on the surface of the upper insulator layer 7 is maintained at the end of the initialization period in the sub-field immediately before each sub-field.
[0042]
As described above, in the embodiment of the present invention shown in FIG. 1, the weak setup discharge in the setup period in the first subfield is performed regardless of the presence or absence of display on the panel. In each sub-field after the second sub-field, the setup discharge in the setup period is performed as the setup operation for the next sub-field only for the discharge cells performing display on the panel. Further, the brightness of the setup discharge is only added to the brightness of the sustain discharge, and such a setup discharge does not occur to the discharge cells not displayed.
[0043]
For example, in a 42-inch AC plasma display panel forming a matrix configuration of 480 rows and 852 × 3 columns, when one field period is configured by eight sub-fields and 256 gray scales are displayed, the maximum luminance is 420 cd / M 2 While the brightness by two setup discharges in the setup period of the first sub-field is 0.15 cd / m. 2 Met. Here, Vp = 190V, Vq = 190V, Vm = 200V, Vt = 100V, Vu = 200V, Vh = 300V, Vq '= 100V, and Vs = 70V. As a result, in a so-called black screen display in which there is no discharge cell to be displayed on the panel, only the light emission of the setup discharge in the first sub-field is performed, so the luminance of black display is 0.15 cd / m. 2 When the panel is displayed in a dim place, the visibility of the black display can be significantly improved as compared to the conventional case. In addition, the contrast of the panel according to the present embodiment is 420 / 0.15: 1 = 2800: 1, and a very high value of contrast is obtained.
[0044]
In addition, since a part of the initialization operation of the second to eighth subfield initialization periods and the maintenance operation of the immediately preceding subfield maintenance period are simultaneously performed, the time required for initialization is significantly increased. The drive time can be significantly shortened as compared with the conventional drive method because it is not necessary to provide an independent erase period. In the present embodiment, the initializing period in one field period is 1 ms, which can be significantly shortened compared to 2.8 ms in the initializing period and the erasing period in the conventional driving method. Therefore, it can be an effective driving method for a large panel or a high definition panel whose driving time is increased.
[0045]
Next, FIG. 2 shows a drive waveform timing chart in the second embodiment.
[0046]
In the AC type plasma display panel, the discharge cell is surrounded by a dielectric and the drive waveform of each electrode is capacitively coupled to the discharge cell. Therefore, even if the drive waveform is level shifted, the operation is performed. Has the property of not changing. Using this property, a drive waveform as shown in FIG. 2, that is, a drive waveform obtained by lowering the scan electrode drive waveform and the sustain electrode drive waveform shown in FIG. 1 as a whole by DC voltage Vt (V) is applied. . In this case, the maintenance pulse Vm can be generated on the basis of 0 V, which facilitates the circuit design.
[0047]
Although in the above embodiment, the last sustain pulse width of the sustain period is shortened and the erase operation for stopping the sustain discharge is performed simultaneously with the last sustain operation, the erase operation is performed using the ramp waveform. You may go. In addition, in the driving method of an AC-type plasma display panel performing gradation display by configuring one field period with eight subfields having an initialization period, a writing period, and a sustain period, of the eight subfields, Although the driving method for simultaneously performing the sustain operation in the sustain period of one subfield and the initialization operation in the next subfield for seven subfields has been described, the subfields constituting one field period The number of sub-fields for which the number of sub-fields is not provided and the number of sub-fields simultaneously performing the maintenance operation of the final part of the maintenance period and the initialization operation of the next sub-field initialization period can be set arbitrarily. . Also, the drive waveform in the subfield is not limited. Furthermore, the present invention can be practiced on AC type plasma display panels having other configurations.
[0048]
【Effect of the invention】
As described above, according to the driving method of the AC type plasma display panel of the present invention, the sustain operation of the sustain period in at least one subfield among the plurality of subfields constituting one field, and the subfield By simultaneously performing the initialization operation in the sub-field and the initialization period in the sub-field, the luminance in the so-called black screen display without display on the panel becomes extremely low, and the visibility of black is significantly improved. The contrast can be greatly enhanced.
[0049]
Furthermore, since the time required for initialization is significantly reduced and the time required for erasing is not required, the drive time can be significantly reduced as compared with the conventional drive method. Therefore, the present invention is an effective driving method for a panel having a large size or a high definition.
Brief Description of the Drawings
FIG. 1 is an operation drive timing chart showing a method of driving an AC-type plasma display panel according to a first embodiment of the present invention;
FIG. 2 is an operation drive timing chart showing a method of driving an AC-type plasma display panel according to a second embodiment of the present invention;
FIG. 3 is a partial perspective view of a conventional AC type plasma display panel
FIG. 4 shows an electrode arrangement of a conventional AC type plasma display panel
FIG. 5 is an operation drive timing chart showing a method of driving a conventional AC type plasma display panel
[Description of the code]
1 First glass substrate
2 Dielectric layer
3 Protective film
4 scan electrodes
5 Maintenance electrode
6 Second glass substrate
7 Insulator layer
8 data electrodes
9 bulkhead
10 phosphor
11 Discharge space
12 discharge cells

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Application Number Priority Date Filing Date Title
JP4254999A JP3733773B2 (en) 1999-02-22 1999-02-22 Driving method of AC type plasma display panel
TW89100703A TW516014B (en) 1999-01-22 2000-01-18 Driving method for AC plasma display panel
US09/487,837 US6294875B1 (en) 1999-01-22 2000-01-19 Method of driving AC plasma display panel
EP09008594A EP2105911A3 (en) 1999-01-22 2000-01-20 Method of driving AC plasma display panel
EP09008593A EP2105910A3 (en) 1999-01-22 2000-01-20 Method of driving AC plasma display panel
EP09008592A EP2105909A3 (en) 1999-01-22 2000-01-20 Method of driving AC plasma display panel
EP00101099A EP1022715A3 (en) 1999-01-22 2000-01-20 Method of driving AC plasma display panel
EP07018573A EP1881475A3 (en) 1999-01-22 2000-01-20 Method of driving AC plasma display panel
KR20000002875A KR100531527B1 (en) 1999-01-22 2000-01-21 Method for driving AC plasma display panel
CNB2003101026462A CN1326104C (en) 1999-01-22 2000-01-24 Driving method for AC-type plasma displaying screen
CNB001016598A CN1169104C (en) 1999-01-22 2000-01-24 Driving method for AC type plasma display screen
CNB2003101026458A CN100354916C (en) 1999-01-22 2000-01-24 Driving method for AC type plasma display screen
KR20020073902A KR100428260B1 (en) 1999-01-22 2002-11-26 Method for driving AC plasma display panel
KR20030065077A KR100453523B1 (en) 1999-01-22 2003-09-19 Method for driving AC plasma display panel
KR20030065076A KR100447579B1 (en) 1999-01-22 2003-09-19 Method for driving AC plasma display panel
KR20030065075A KR100428268B1 (en) 1999-01-22 2003-09-19 Method for driving AC plasma display panel
KR20050074278A KR100528525B1 (en) 1999-01-22 2005-08-12 AC plasma display apparatus

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