JP2000216380A - Field effect transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance a drain breakdown voltage, simplify process, and lower channel resistance. SOLUTION: An epitaxial region 220 comprising an N-type SiC is formed on a wide-band gap semiconductor wafer 210 comprising an N+-type SiC, a second semiconductor region 230 comprising an N-type SiC and a source region 240 comprising an N+-type SiC are formed on the epitaxial region 220, a groove 250 is formed on a prescribed region on the main side of the epitaxial region 220, a first semiconductor region 260 comprising a P-type SiC alongside the bottom of the groove 250, a gate electrode 280 is formed on the semiconductor region 230 via a gate insulating film 270, a source electrode 300 is formed insulated from the gate electrode 280 by an interlayer insulation film 290, and a drain electrode 310 is formed on the back side of the wide-band gap semiconductor wafer 210.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a power M having a wide band gap semiconductor substrate made of a semiconductor such as SiC (silicon carbide) having a wider band gap than Si (silicon).
It relates to a field effect transistor such as an OSFET.

[0002]

2. Description of the Related Art FIG. 9 is a sectional view showing a conventional field effect transistor (Japanese Patent Application Laid-Open No. 9-74191). As shown in the figure, an epitaxial region 20 made of N-type SiC is formed on a wide band gap semiconductor substrate 10 made of high-concentration N ⁺ -type SiC.
An epitaxial region 60 made of P-type SiC is formed thereon, a groove 50 and a source region 40 made of N ⁺ -type SiC are formed in the epitaxial region 60, and a channel region 30 made of N-type SiC is formed on the side wall of the groove 50. The gate electrode 8 is formed in the trench 50 via the gate insulating film 70.
0 is formed. Further, a source electrode 100 connected to the source region 40 while being insulated from the gate electrode 80 by the interlayer insulating film 90 is formed, and a drain electrode 110 is formed on the back surface of the wide band gap semiconductor substrate 10.

In this field effect transistor, when a voltage is applied to the gate electrode 80 in a state where a voltage is applied between the drain electrode 110 and the source electrode 100, the channel region 30 facing the gate electrode 80 An N-type accumulation layer type channel is formed on the surface, and current flows from the drain electrode 110 to the source electrode 100.

[0004]

However, in the field effect transistor shown in FIG.
When a high voltage is applied to the gate insulating film 70, an electric field is applied to the gate insulating film 70 at the bottom of the groove 50, so that the drain breakdown voltage is low. Further, since the channel region 30 is formed on the side wall of the groove 50 by the epitaxial method, the process steps are complicated. Then, the groove 50 formed by the trench etching
It is difficult to form a uniform and less defective channel region 30 on the side wall of the trench by the epitaxial method, and the channel resistance is high due to the influence of the trench etching damage.

An object of the present invention is to provide a field effect transistor having a high drain breakdown voltage, a simple process, and a low channel resistance.

[0006]

According to the present invention, there is provided a field effect transistor having a wide bandgap semiconductor substrate made of a semiconductor having a bandgap wider than Si. A groove is formed in a predetermined region on one main surface of the bandgap semiconductor substrate, a first semiconductor region of the second conductivity type is formed along the groove, and a predetermined region on one main surface of the wide bandgap semiconductor substrate is formed. A gate insulating film is formed in the region, a channel region is formed between the gate insulating film and the first semiconductor region, and a gate electrode is formed insulated from the channel region by the gate insulating film.

In this case, the channel region is constituted by a first conductive type second semiconductor region.

In these cases, the wide band gap semiconductor substrate is made of SiC.

[0009]

In the field effect transistor according to the present invention, when a high voltage is applied between the drain electrode and the source electrode, the electric field applied to the gate insulating film is shielded by the depletion layer extending from the first semiconductor region. Because
Since the drain withstand voltage is high and the channel region does not need to be formed on the side wall of the groove, the process steps are simple,
In addition, since a channel region having a uniform and few defects can be formed, the channel resistance is low.

Further, the channel region is formed by a second conductive type second conductive type.
When the semiconductor region is formed by the semiconductor region, a channel of a storage layer type is formed, so that the mobility of electrons is improved, so that the channel resistance can be reduced.

Further, when a wide band gap semiconductor substrate made of SiC is used, the design is such that the built-in potential of the PN junction is large and the current becomes non-conductive when no voltage is applied to the gate electrode. It can be done easily.

[0012]

FIG. 1 is a sectional view showing a field effect transistor according to the present invention. As shown in the figure, a wide band gap semiconductor substrate 210 made of N ⁺ -type SiC
An epitaxial region 220 made of N-type SiC is formed thereon.
Semiconductor region (channel region) made of type SiC
A source region 240 made of N.sup. ⁺ 230 and N.sup. ⁺ -Type SiC is formed, a concave groove 250 is formed in a region where the source region 240 on one main surface side of the epitaxial region 220 is formed, and a lower surface of the groove 250 is formed in the epitaxial region 220. The first semiconductor region 260 made of P-type SiC is formed along the bottom of the groove 250, and the semiconductor region 230
A gate electrode 280 is formed thereover with a gate insulating film 270 interposed therebetween. Here, as the material of the gate electrode 280, a material having a work function value such that majority carriers in the semiconductor region 230 are depleted is selected. The source electrode 300 is formed insulated from the gate electrode 280 by the interlayer insulating film 290, and the source electrode 300 is
Formed in the wide band gap semiconductor substrate 21
0, a drain electrode 310 is formed on the back surface.

In this field-effect transistor, when no voltage is applied to gate electrode 280, semiconductor region 230, which is a channel region whose conductivity is modulated by the gate voltage immediately below gate electrode 280, becomes semiconductor region 260. Majority carriers are depleted due to the built-in potential between the drain electrode 310 and the source electrode 300, and the current becomes non-conductive between the drain electrode 310 and the source electrode 300. When a voltage is applied to the gate electrode 280 in a state where a voltage is applied between the drain electrode 310 and the source electrode 300, the semiconductor region 23 immediately below the gate electrode 280
A channel of an N-type accumulation layer type is formed on the surface of 0, and current flows from the drain electrode 310 to the source electrode 300.

In such a field effect transistor, when a high voltage is applied between the drain electrode 310 and the source electrode 300, the gate is formed by a depletion layer extending from the semiconductor region 260 formed along the bottom of the groove 250. Since the electric field applied to the insulating film 270 is shielded, the drain withstand voltage is high. In addition, semiconductor region (channel region)
Since it is not necessary to form 230 on the side wall of the groove 250, the process steps are simple. In addition, since the semiconductor region 230 can be formed with less damage to the semiconductor region 230 during the process formation and can be formed uniformly and with few defects, the channel resistance is low. Further, since the channel region is constituted by the semiconductor region 230 of the opposite conductivity type to the semiconductor region 260, a channel of the accumulation layer is formed, so that the mobility of electrons is improved as compared with the channel of the inversion layer type. Therefore, the channel resistance can be reduced. Further, since the wide band gap semiconductor substrate 210 and the semiconductor region (channel region) 230 are made of SiC, and the band gap of SiC is large, the built-in potential of the PN junction is large, so that no voltage is applied to the gate electrode 280. It is possible to easily perform a design in which the current is turned off. In addition, since a material having a work function value such that majority carriers in the semiconductor region 230 are depleted is selected as a material of the gate electrode 280, the channel is turned off in a state where no voltage is applied to the gate electrode 280. Is easy.

Next, a method of manufacturing the field effect transistor shown in FIG. 1 will be described with reference to FIGS. First, FIG.
As shown in FIG.
For example, the impurity concentration is 1 × 10 ¹⁴ to 1 × 10 ¹⁸ c
m ⁻³ , an epitaxial region 2 having a thickness of 0.1 to several tens μm
20 is formed. Further, the impurity concentration is, for example, 1 × 10 ¹⁴ to 1 × 10 ¹⁷ cm on the surface of the epitaxial region 220.
^-3 , a semiconductor region 230 having a thickness of several tens of μm to several μm is formed. Next, as shown in FIG. 3, an insulating film 320 is formed, and using the insulating film 320 as a mask, a source region 240 having an impurity concentration of 1 × 10 ¹⁸ to 1 × 10 ²¹ cm ⁻³ is formed by, for example, ion implantation. . Next, as shown in FIG.
After removing the insulating film 320, an insulating film 330 is formed,
The trench 250 is formed by using the insulating film 330 as a mask, and ion implantation is further performed by using the insulating film 330 as a mask, whereby the semiconductor region 260 is formed along the bottom of the trench 250 by diffusion of impurities from the trench 250. Next, after the insulating film 330 is removed, for example, 90
By performing a heat treatment at 0 to 1800 ° C., source region 240 and semiconductor region 260 are activated. Next,
As shown in FIG. 5, a gate insulating film 270 made of, for example, an oxide film having a thickness of 100 to 3000 、 is formed, and a gate electrode 280 made of polycrystalline Si having a thickness of, for example, 1000 to 5000 形成 is formed. Next, as shown in FIG. 6, an interlayer insulating film 290 is formed. Next, as shown in FIG. 7, after removing the interlayer insulating film 290 in a predetermined region, a source electrode 300 is formed. Thereafter, the drain electrode 31 is formed on the back surface of the wide band gap semiconductor substrate 210.
0 is formed.

In this method for manufacturing a field effect transistor, the semiconductor region 260 serving as a channel region is formed by forming the semiconductor region 260 by diffusing impurities from the trench 250 with the semiconductor region 260 and the gate insulating film 2.
70, the impurity is hardly diffused even at a high temperature in SiC, and even if it is difficult to form a deep junction, the semiconductor region 230 can be formed without a deep diffusion. It can be formed between the region 260 and the gate insulating film 270.

FIG. 8 is a sectional view showing another field effect transistor according to the present invention. As shown in the figure, P-type SiC
N on a wide band gap semiconductor substrate 215 made of
Region 225 made of type SiC is formed. Drain region 245 made of N ⁺ type SiC is formed on one main surface of epitaxial region 225 by being insulated from gate electrode 280 by interlayer insulating film 295 and connected to drain region 245. The drain electrode 315 thus formed is formed on the interlayer insulating film 290.

In this field effect transistor, since the source electrode 300 and the drain electrode 315 are formed on the same main surface, it is easy to form a plurality of output transistors on the same semiconductor chip.

In the above embodiment, the first conduction type is N-type and the second conduction type is P-type. However, the first conduction type is P-type, and the second conduction type is P-type. It may be N-type.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a field-effect transistor according to the present invention.

FIG. 2 is an explanatory diagram of a method for manufacturing the field-effect transistor shown in FIG.

FIG. 3 is an explanatory diagram of a method for manufacturing the field-effect transistor shown in FIG.

FIG. 4 is an explanatory diagram of a method for manufacturing the field-effect transistor shown in FIG.

FIG. 5 is an explanatory diagram of a method for manufacturing the field-effect transistor shown in FIG.

FIG. 6 is an explanatory diagram of the method for manufacturing the field-effect transistor shown in FIG.

FIG. 7 is an explanatory diagram of the method for manufacturing the field-effect transistor shown in FIG.

FIG. 8 is a sectional view showing another field-effect transistor according to the present invention.

FIG. 9 is a sectional view showing a conventional field effect transistor.

[Explanation of symbols]

 210: Wide band gap semiconductor substrate 215: Wide band gap semiconductor substrate 230: Second semiconductor region 250: Groove 260: First semiconductor region 270: Gate insulating film

Claims (3)

[Claims] 1. A field effect transistor having a wide band gap semiconductor substrate made of a semiconductor having a band gap wider than that of Si, wherein a groove is formed in a predetermined region on one main surface of the first conduction type wide band gap semiconductor substrate. Forming a first semiconductor region of the second conductivity type along the groove; forming a gate insulating film in a predetermined region on one main surface of the wide band gap semiconductor substrate; A field effect transistor, wherein a channel region is formed between the first semiconductor region and the gate region, and a gate electrode is formed insulated from the channel region by the gate insulating film. 2. The semiconductor device according to claim 1, wherein said channel region is constituted by a second semiconductor region of a first conductivity type.
3. The field-effect transistor according to claim 1. 3. The field effect transistor according to claim 1, wherein said wide band gap semiconductor substrate is made of SiC.