JP2000216375A - Semiconductor device and its fabrication - Google Patents

Abstract

PROBLEM TO BE SOLVED: To facilitate contact of an electrode metal over the surface of source region and channel region by forming a pair of second active regions in the stripe active region on a semiconductor substrate and employing a zigzag geometry in a mask material for forming the second active regions. SOLUTION: A stripe-like channel region 2 having an exposed width T is formed on a semiconductor substrate 1 using a mask 9 having a zigzag stripe structure where X distance recesses and protrusions alternate geometrically. The width of the mask material is partially set at (C+X) on the exposed surface of the region 2. On the other hand, exposed surface of the channel region has zigzag shape where distances a and b face alternately and a pair of second active regions 3, 3' having a distance width X alternately in the inward direction of a the region 2 are formed when an active region (source) is formed subsequently.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to MOSFETs, IGBTs
The present invention relates to a method for manufacturing a semiconductor device and the structure of a semiconductor device formed by the method, and particularly to a geometric shape of a diffusion mask material.

[0002]

2. Description of the Related Art FIG. 3 is a partial cross-sectional view of a MOSFET of this type. In FIG. 3, reference numeral 1 denotes a semiconductor substrate having an epitaxial growth layer (N-) on the surface, and 2 denotes a channel formed on one surface of the substrate 1. The (or base) regions 3, 3 'are a pair of source (or emitter) regions having a shallow diffusion depth formed in the channel region 2, and 4 is the source region 3, 3', The gate oxide film 5 formed over the channel region 2 and the surface of the base 1 is the gate oxide film 4.
The gate polysilicon layer 6 formed thereon is formed from one surface of the source regions 3 and 3 ′.
Surface interlayer insulating film protective layer (PS
G) and 7 are source (emitter) electrode metals (Al) deposited over one surface of the pair of source regions 3 and 3 ′ and the surface of the channel layer 2 between the regions 3 and 3 ′, and 8 are The base 1
Is another electrode (drain) metal adhered to the other surface.

In the process of forming the above structure, the surface of the semiconductor substrate 1 on which the channel region 2, the gate oxide film 4 and the gate polysilicon layer 5 are formed is usually formed by using a resist as a mask material. The silicon is etched by a predetermined width to expose the surface of the channel region 2 in a stripe shape (not shown). Next, in order to selectively form the source regions 3 and 3 ′ from the exposed surface, first, a resist material is dropped on the exposed surface,
The semiconductor substrate is rotated (not shown), the resist material is uniformly applied, and then the resist material is exposed and developed to form a predetermined mask 9. (FIG. 4)

The mask 9 is rotated while spraying a developing solution, a rinsing liquid or the like at the time of development. If the width S is small, the mask 9 is peeled off, and a mask having a predetermined shape is not formed. Is generated. Therefore, the mask 9
If the width of the source region is enlarged in advance (S → S ′), the adhesion becomes high and the mask material does not peel off, but the width of the source region formed in a later step is smaller than the designed value. At the same time, it may cause a contact failure when the source electrode is attached.

On the other hand, it is conceivable that the width (T) of the exposed surface of the channel region 2 is enlarged (T ') in advance to enlarge the width 5 of the mask material 9, but in this case, the effective width of the semiconductor substrate is reduced. There is a problem that the used area is reduced.

[0006]

SUMMARY OF THE INVENTION According to the present invention, an electrode metal extending between the surface of the source region and the surface of the channel region is formed without decreasing the source region while keeping the exposure width (T) by etching the channel region constant. An object of the present invention is to provide a semiconductor device in which a mask material that facilitates contact is formed and a required region is formed by using the mask material.

[0007]

According to a first aspect of the present invention, a gate oxide film and a gate polysilicon are formed on a semiconductor substrate having a stripe-shaped active region formed thereon. Forming a resist layer on silicon and patterning the resist; and etching the gate oxide film and the gate polysilicon using the resist as a mask material to further form a pair of second active regions in the active region. In a method for manufacturing a semiconductor device including a forming step, a geometrical shape of a mask material for forming the second active region is a zigzag shape having a certain width.

According to a second aspect of the present invention, there is provided a first conductive region in the form of a stripe of the opposite conductivity type formed on a semiconductor substrate of one conductivity type, and the one conductivity type formed in the first conductive region. A pair of conductive regions, and the pair of conductive regions
And a zigzag structure in which wide portions and narrow portions alternately face each other inward of the conductive region.

The semiconductor device according to claim 3, wherein the first conductivity type region is a channel diffusion region and the second conductivity region is a source diffusion region.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a partial perspective view showing an embodiment of the present invention. 9 in the figure
Denotes a mask material having a zigzag shape having a constant width (C). That is, the exposed width of the stripe of the channel region 2 is T
The mask 9 has a zigzag stripe structure in which one of the masks is alternately geometrically alternately set to the (X) distance concave portion and the other is the same convex portion. When formed in this manner, the coating width of the mask material on the exposed surface of the region 2 is partially (C + X). As a result, the mask material is less likely to peel off as compared with a linear mask shape having a constant width (C).

On the other hand, when the mask is applied, the exposed surface of the channel region has a zigzag shape in which the distances b and a are alternately opposed to each other. A pair of active regions 3, 3 'having a difference of X) are formed. In this embodiment, (T: 16 μm, a: 4 μm, b: 6 μm, X: 2
μm).

FIG. 2 shows an MO formed using the above mask.
In the partial cross-sectional view of the SFET, one of the source regions 3 'has a wide shape extending inward relative to the other 3, and the wide region and the narrow region have shapes that are alternately opposed to each other. In the next step, a surface interlayer insulating film protective layer 5 such as PSG is formed on one entire surface of the substrate, and then a window of the PSG is opened using another mask material for electrode metal deposition. In this case, if the window opening width is a linear mask shape having the above-mentioned mask material width C, the window is opened by the width C with the center Ta of the channel region 2 as an intermediate point. Therefore, a window is reliably opened on the wide surface 3 ′ of the source region, and the surface 3 ′ is opened.
Part of is exposed.

On the other hand, the window is not opened on the narrow surface 3 or the surface is barely exposed. Therefore, in the next step of attaching the electrode metal, the contact with the source region 3 or 3 'can be surely made on the surface of the wide portion as shown in FIG. It should be noted that even if the contact in the narrow portion is defective, it may not be used as an electrode function as a whole.

[0014]

As is apparent from the above description, according to the present invention, it is possible to form an active region as a semiconductor device and to provide a stable semiconductor device with electrodes even if the accuracy of the mask material is relatively low. Can be provided.

[Brief description of the drawings]

FIG. 1 is a partial perspective view showing an embodiment of the present invention.

FIG. 2 is a partial sectional view showing an embodiment of the present invention.

FIG. 3 Conventional example

FIG. 4 Conventional example

[Explanation of symbols]

 1: semiconductor substrate 2: channel (base) region 3, 3 ': source (emitter) region 4: gate oxide film 5: gate polysilicon layer 6: surface interlayer insulating film protection layer 7, 8: electrode metal 9: mask Lumber

Claims (3)

[Claims] 1. A step of forming a gate oxide film and a gate polysilicon on a semiconductor substrate having a stripe-shaped active region formed thereon, and forming a resist layer on the gate polysilicon to pattern the resist. Process and
Forming a pair of second active regions in the active region after etching the gate oxide film and the gate polysilicon using the resist as a mask material; A method of manufacturing a semiconductor device, characterized in that a mask material for forming a mask has a zigzag shape having a constant width. 2. A stripe-shaped first conductive region of opposite conductivity type formed on a semiconductor substrate of one conductivity type, and a pair of conductive regions of one conductivity type formed on the first conductive region. Wherein the pair of conductive regions form a zigzag structure in which wide portions and narrow portions alternately face each other inward of the first conductive region. 3. The semiconductor device according to claim 1, wherein the first conductive region is a channel diffusion region, and the second conductive region is a source diffusion region.