JP2000216307A - Amplifying device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an amplifying device, wherein thermorunaway is prevented for good high-frequency characteristics. SOLUTION: On a multilayer substrate 1, a resist layer 2 and a fourth conductor layer 3d of a thickness of about 70-100 μm formed on the resist layer 2 are provided. Further more, a third dielectrics layer 4c of resin is laminated on the fourth conductor layer 3d. A semiconductor chip 11 is placed on a first conductor 3a directly or via mount part 8, comprising a metal plate such as copper alloy. At the multilayer substrate 1, a thermal via 5 running from the first conductor layer 3a formed directly under the semiconductor chip 11 to the fourth conductor layer 3s is formed. Furthermore, a ground/heat-radiating end-surface electrode 6 connected to a metal plate layer 5b of the thermal via 5 is formed at the end surface of the multilayer substrate 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplifying device suitable for amplifying a high frequency signal, and more particularly to an amplifying device having high heat dissipation.

[0002]

2. Description of the Related Art Recently, a high frequency signal is used in a portable telephone or the like, and a high frequency amplifier provided with a field effect transistor (hereinafter, referred to as an FET) formed on a multilayer substrate is used as an amplifier for transmission. Have been. FIG. 3 is a schematic sectional view showing a conventional high-frequency amplifier.

A multilayer substrate 21 used in a conventional high-frequency amplifier has a fourth conductor layer 23d having a thickness of about 5 to 10 μm.
And a third dielectric layer 24c formed on the fourth conductor layer 23d. Further, on the third dielectric layer 24c, a third conductor layer 23c having a thickness of about 5 to 10 μm,
Dielectric layer 24b, second conductor layer 2 having a thickness of about 5 to 10 μm
3b, a first dielectric layer 24a and a first conductor layer 23a having a thickness of about 5 to 10 μm are sequentially laminated. Each of the dielectric layers 24a to 24c is made of ceramics such as glass ceramics.

[0004] On the first conductor layer 23a, a semiconductor chip 31 is mounted on a mount 2 made of a metal plate such as a copper alloy.
8 is placed. The semiconductor chip 31
May be directly mounted on the first conductor layer 23a.

Further, the semiconductor chip 3 is provided on the multilayer substrate 21.
1 to the fourth conductor layer 2 from the first conductor layer 23a to the fourth conductor layer 2
A thermal via 25 reaching up to 3d is formed. The thermal via 25 has a metal plating layer 2 on the side surface of the via hole.
5b are formed, and the inside thereof is filled with a resin material 25a.

Further, an end surface electrode 26 for grounding and heat radiation is formed on the end surface of the multilayer substrate 21. In addition, the multilayer substrate 2
On the other end face, an end face electrode for an input / output terminal and an end face electrode (not shown) for a power supply terminal are formed.

Further, the multi-layer substrate 21 has a metal cover 2
7 and are electromagnetically shielded.

Further, on the multilayer substrate 21, a matching bias circuit provided with elements 29 such as a chip capacitor, a chip resistor, a chip inductor and a microstrip line and connected to a semiconductor chip 31 is provided.

In some cases, the semiconductor chip may be formed with cavities in the first and second dielectric layers 24a and 24b and mounted thereon.

When the high-frequency amplifying device thus configured is mounted on a set substrate of a mobile phone or the like, each end surface electrode such as a grounding / radiating end surface electrode 26 is soldered to the set substrate. Further, in order to dissipate the heat generated from the semiconductor chip 31, the part of the multilayer substrate 21 opposite to the part on which the semiconductor chip 31 is mounted is also directly soldered to the set substrate.

When a high frequency signal is input from the outside, the signal is input to the input stage FET section of the semiconductor chip 31 via the input stage matching bias circuit. Then, the signal is amplified and output by the input stage FET unit. Thereafter, this output signal is output to the output stage F via an interstage matching bias circuit.
Input to the ET section. Then, it is amplified and output by the output stage FET unit. Further, this output signal is output to the outside via the output stage matching bias circuit.

At this time, the input stage FET section and the output stage FE
Heat is generated from the T portion, and this heat is transmitted to the second, third, and fourth conductor layers 23b to 23d via the thermal via 25. Further, the light is transmitted to a set substrate such as a mobile phone directly soldered to a portion opposite to the portion on which the semiconductor chip 31 is mounted, the grounding / radiating end face electrode 26, and the like, and is discharged therefrom to the outside air.

[0013]

However, when the conventional high frequency amplifying device is mounted on a set board of a mobile phone or the like, unless the above-mentioned direct soldering is performed, the input stage FET unit and the Insufficient heat radiation of the output stage FET unit causes the high frequency amplifier to run out of heat. Furthermore,
Since the inductances at the sources of the input-stage FET unit and the output-stage FET unit increase, good high-frequency characteristics cannot be obtained. In addition, when soldering is performed directly, there is a problem that pattern design cannot be performed on that portion of the set substrate.

The present invention has been made in view of the above problems, and an object of the present invention is to provide an amplifier capable of preventing thermal runaway and obtaining good high-frequency characteristics.

[0015]

An amplifying device according to the present invention is a high-frequency amplifying device having a multilayer substrate and a semiconductor chip provided on the multilayer substrate and having an amplifier circuit. A conductor layer having a thickness of 70 μm or more;
A resin layer formed on the conductor layer, a thermal via extending from the surface directly below the semiconductor chip to the conductor layer, and a grounding / radiating end face electrode formed on the end face and connected to the conductor layer. It is characterized by the following.

In the present invention, since the thermal via is connected to the end face electrode through a conductor layer having a thickness of 70 μm or more, heat generated from the amplifier circuit is radiated with high efficiency. Therefore, thermal runaway is suppressed. Further, the high frequency characteristics of the amplifier circuit are improved. Further, when mounting on a set substrate, it is not necessary to directly solder the back surface side, so that a pattern can be designed in a region of the set substrate to be joined to the amplification device.

The thermal via may include a resin material or a conductive material, and a metal plating layer formed on the surface of the resin material or the conductive material and connected to the conductor layer.

Further, a thickness of 70 formed on the resin layer.
It can have a second conductor layer of at least μm. With the second conductor layer, higher heat dissipation and higher frequency characteristics can be obtained.

Further, the semiconductor device may have a resist layer formed below the conductor layer.

Further, the amplifier circuit may include a field effect transistor.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a high-frequency amplifier according to an embodiment of the present invention will be specifically described with reference to the accompanying drawings. FIG. 1 is a schematic plan view showing a high-frequency amplifier according to an embodiment of the present invention.

In this embodiment, a semiconductor chip 11 having an amplifier circuit provided with an input-stage FET section 11a and an output-stage FET section 11b is provided on a multilayer substrate 1. The input stage FET unit 11a is provided with a circuit such as an input stage FET and a gate connected thereto, and the output stage FET unit 11b is provided with a circuit such as an output stage FET and another gate connected thereto. Is provided.

On the multilayer substrate 1, an input stage matching bias circuit 12a connected between the input terminal of the input stage FET section 11a and the input terminal 13 is provided. Further, an interstage matching bias circuit 12b connected between the output terminal of the input stage FET unit 11a and the input terminal of the output stage FET unit 11b.
Is provided. Further, an output stage matching bias circuit 12c is provided between the output terminal of the output stage FET section 11b and the output terminal 14. The matching bias circuit 1
Reference numerals 2a to 12c each include a chip capacitor, a chip resistor, a chip inductor, a microstrip line, and the like, and supply a DC voltage or current to the input-stage FET unit 11a and the output-stage FET unit 11b, and reduce their impedance. This is a circuit for matching.

Further, a plurality of curved cuts are formed in the end face of the multilayer substrate 1 and the end face electrode 15 is formed therein.
Is provided. One of these electrodes is an input terminal 13, one is an output terminal 14, and three are power supply terminals 16. The multilayer substrate 1 is covered with a metal cover (not shown).

Next, the structure of the multilayer substrate 1 will be described. FIG. 2 is a schematic sectional view showing a high-frequency amplifier according to an embodiment of the present invention.

The multilayer substrate 1 is provided with a resist layer 2 and a fourth conductor layer 3d formed on the resist layer 2 and having a thickness of about 70 to 100 μm. Further, the fourth conductor layer 3
d, a third dielectric layer 4c, a third conductor layer 3c having a thickness of about 70 μm, a second dielectric layer 4b, and a second dielectric layer 4c having a thickness of about 18 μm.
The conductor layer 3b, the first dielectric layer 4a, and the thickness of about 18 to 48
μm first conductor layers 3a are sequentially laminated. Thus, the thicknesses of the third and fourth conductor layers 3c and 3d are larger than the thicknesses of the first and second conductor layers 3a and 3b. Each of the dielectric layers 4a to 4c is made of resin.

The semiconductor chip 11 is mounted on the first conductor layer 3a via a mount 8 made of a metal plate such as a copper alloy. Similarly, an element 9 constituting a matching bias circuit is mounted on the first conductor layer 3a.
Note that the semiconductor chip 11 may be directly mounted on the first conductor layer 3a.

The multilayer substrate 1 has a semiconductor chip 11
Are formed immediately below the first conductor layer 3a and extend from the first conductor layer 3a to the fourth conductor layer 3d. The thermal via 5 is formed by forming a metal plating layer 5b on the side surface of a via hole and filling the inside thereof with a resin material 5a.

Further, on the end face of the multilayer substrate 1, a grounding / radiating end face electrode 6 connected to the metal plating layer 5b of the thermal via 5 via the second to fourth conductor layers 3b to 3d is formed. On the other end face of the multilayer substrate 1, an input / output terminal end face electrode and a power supply terminal end face electrode are formed.
These are not connected to the thermal via 5. These end electrodes correspond to the end electrodes 15 in FIG.

Further, the multilayer substrate 1 is covered with a metal cover 7 and is electromagnetically shielded.

When the high-frequency amplifying device thus configured is mounted on a set board of a mobile phone or the like, each end face electrode such as the grounding / radiating end face electrode 6 is soldered to the set board. However, at this time, in order to dissipate the heat generated from the semiconductor chip 11, the portion of the multilayer substrate 1 on the fourth conductor layer 3d side opposite to the portion on which the semiconductor chip 11 is mounted is directly soldered to the set substrate. do not have to.

Next, the operation of the high-frequency amplifier according to the present embodiment will be described.

A high-frequency signal externally input to the input terminal 13 is input to the input-stage FET section 11a via the input-stage matching bias circuit 12a. Then, the signal is amplified and output by the input stage FET unit 11a. Thereafter, this output signal is output to the output stage F via the interstage matching bias circuit 12b.
It is input to the ET section 11b. Then, the output stage FET unit 1
The signal is amplified and output by 1b. Further, this output signal is output to the output terminal 1 via the output stage matching bias circuit 12c.
4 to the outside. As described above, a signal externally input to the high-frequency amplifier circuit according to the present embodiment is amplified and output in two stages.

At this time, heat is generated from the input-stage FET section 11a and the output-stage FET section 11b, and this heat is transmitted to the second, third and fourth conductor layers 3b to 3d via the thermal via 5. Further, it is transmitted to the grounding / radiating end face electrode 6. Since the grounding / radiating end electrode 6 is soldered to a set substrate of a mobile phone or the like, it is discharged from there to the outside air.

As described above, according to the present embodiment, since the dielectric layers 4a to 4c are made of resin, each of the conductor layers 3a to 3c is formed.
d can be formed thicker than conventional ones. In particular, since the thickness of the third and fourth conductor layers 3c and 3d can be increased to 70 μm or more, the thermal resistance of the multilayer substrate 1 with respect to the semiconductor chip 11 can be reduced. Therefore, instead of directly soldering the portion of the multilayer substrate 1 opposite to the portion on which the semiconductor chip 11 is mounted to a set substrate such as a mobile phone, the grounding / radiating end electrode 6 can be soldered to the set substrate. In addition, heat generated from the input stage FET unit 11a and the output stage FET unit 11b can be released.

Further, since each of the conductor layers 3a to 3d is formed thicker than the conventional one, the inductance of the source with respect to the input stage FET unit 11a and the output stage FET unit 11b is reduced. Therefore, good high-frequency characteristics can be obtained.

Further, since it is not necessary to directly solder the portion of the multilayer substrate 1 opposite to the portion on which the semiconductor chip 11 is mounted to a set substrate such as a mobile phone, an insulating resist layer is formed on the back surface of the multilayer substrate 1. Since the substrate 2 is formed, a pattern can be designed at a portion to be joined to the resist layer 2 of a set substrate such as a mobile phone. For this reason, redundancy is obtained in the pattern design of the set board.

Although the resin material 5a is filled in the thermal via 5 in the above-described embodiment, the same effect can be obtained if the thermal via 5 is filled with a metal material.

Although the multilayer substrate 1 has a four-layered conductor layer structure, the multilayer substrate may be formed of five or more layers. In this case, the same effect can be obtained.

Further, even if a structure in which these structures are combined is adopted, the same effect can be obtained.

[0041]

As described in detail above, according to the present invention,
Since a conductor layer having a thickness of 70 μm or more is provided on the multilayer substrate and the thermal via is connected to the end face electrode via the conductor layer, heat generated from the amplifier circuit can be released to the outside with high efficiency. Therefore, thermal runaway can be suppressed. Further, the high frequency characteristics of the amplifier circuit can be improved. Further, when mounting on the set substrate, it is not necessary to directly solder the rear surface side, so that it is possible to design a pattern in a region where the set substrate is joined to the amplifier.

[Brief description of the drawings]

FIG. 1 is a schematic plan view showing a high-frequency amplifier according to an embodiment of the present invention.

FIG. 2 is a schematic sectional view showing a high-frequency amplifier according to an embodiment of the present invention.

FIG. 3 is a schematic sectional view showing a conventional high frequency amplifying device.

[Explanation of symbols]

1, 21; multilayer substrate 2; resist layers 3a, 3b, 3c, 3d, 23a, 23b, 23c, 2
3d; conductor layers 4a, 4b, 4c, 24a, 24b, 24c; dielectric layers 5, 25; thermal vias 5a, 25a; resin materials 5b, 25b; metal plating layers 6, 26; 27; metal cover 8, 28; mount portion 11, 31; semiconductor chip 11a; input stage FET portion 11b; output stage FET portion 12a, 12b, 12c; matching bias circuit 13; input terminal 14; output terminal 15; Power supply terminal

Claims (6)

[Claims] 1. A high-frequency amplifier comprising a multilayer substrate and a semiconductor chip provided on the multilayer substrate and having an amplifier circuit, wherein the multilayer substrate has a conductor layer having a thickness of 70 μm or more; It has a resin layer formed thereon, a thermal via extending from the surface to the conductor layer immediately below the semiconductor chip, and a grounding / radiating end face electrode formed on the end face and connected to the conductor layer. Amplifying device. 2. The amplifying device according to claim 1, wherein the thermal via has a resin material and a metal plating layer formed on a surface of the resin material and connected to the conductor layer. 3. The amplifying device according to claim 1, wherein the thermal via has a conductive material and a metal plating layer formed on a surface of the conductive material and connected to the conductive layer. 4. A thickness of 70 μm formed on the resin layer
2. The method according to claim 1, further comprising the second conductor layer.
The amplification device according to any one of claims 3 to 3. 5. The semiconductor device according to claim 1, further comprising a resist layer formed below the conductor layer.
Item 14. The amplification device according to Item 1. 6. The amplifier according to claim 1, wherein the amplifier circuit has a field-effect transistor.
Item 14. The amplification device according to Item 1.