JP2000151081A - Discontinued wiring repairing method for wiring board - Google Patents

Discontinued wiring repairing method for wiring board

Info

Publication number
JP2000151081A
JP2000151081A JP10322448A JP32244898A JP2000151081A JP 2000151081 A JP2000151081 A JP 2000151081A JP 10322448 A JP10322448 A JP 10322448A JP 32244898 A JP32244898 A JP 32244898A JP 2000151081 A JP2000151081 A JP 2000151081A
Authority
JP
Japan
Prior art keywords
wiring board
resist
disconnection
conductive paste
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10322448A
Other languages
Japanese (ja)
Inventor
Keiko Ikegami
恵子 池上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Ibaraki Ltd
Original Assignee
NEC Ibaraki Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Ibaraki Ltd filed Critical NEC Ibaraki Ltd
Priority to JP10322448A priority Critical patent/JP2000151081A/en
Publication of JP2000151081A publication Critical patent/JP2000151081A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To realize a wiring repairing method for a wiring board by preventing excess application of conductive paste that causes short-circuiting in a manufacturing process of the wiring board for a computer and so on. SOLUTION: A repairing method for a discontinued wire of a wiring board is constituted to provide a step of forming resist 6 at a circuit pattern excepting the discontinued wiring part, a step of applying conductive paste 7 at the discontinued part on the resist 6 formed, a step of hardening the conductive paste 7 and a step of eliminating the resist 6 from the wiring board. The step of forming the resist 7 can form the resist 6 at a part excepting the discontinued wiring correctly and easily by using a step of applying the resist 6 on the wiring board, a step of again exposing the circuit pattern of the wiring board, and a step of developing the exposed region.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は配線基板の断線修正方法
に関し、特に、電子機器の配線基板の製造工程におい
て、回路導体に断線が発生した場合の修正方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of correcting a disconnection of a wiring board, and more particularly to a method of correcting a disconnection of a circuit conductor in a process of manufacturing a wiring board of an electronic device.

【0002】[0002]

【従来の技術】コンピュータ等に用いられている多層配
線基板は、基板上に絶縁層と配線層を交互に積層して構
成されている。また、このような配線基板においては、
近年の電子機器業界における技術水準の向上に伴い、回
路導体パターンの高密度・狭ピッチ化が図られ、回路導
体の線幅はどんどん細くなる傾向にある。
2. Description of the Related Art A multilayer wiring board used in a computer or the like is formed by alternately stacking insulating layers and wiring layers on a board. Also, in such a wiring board,
As the technical level in the electronic equipment industry has been improved in recent years, the circuit conductor pattern has been increased in density and narrower, and the line width of the circuit conductor has tended to become thinner.

【0003】このため、レジスト塗布−露光−現像−エ
ッチング−レジスト剥離といった一連の回路パターン形
成プロセスの中に、ゴミや異物の混入等により回路パタ
ーンの断線不良(パターンオープン)が生じることが少
なくない。従来、このような多層配線基板の製造工程に
おいてパターンオープンが生じた場合には、配線層を形
成する毎に、極細の筆を用いて導体ペーストを断線箇所
に塗布することにより断線を結線して修正していた。
For this reason, in a series of circuit pattern forming processes such as resist coating, exposure, development, etching and resist peeling, disconnection failure (pattern open) of the circuit pattern often occurs due to mixing of dust or foreign matter. . Conventionally, when a pattern open occurs in the manufacturing process of such a multilayer wiring board, each time a wiring layer is formed, the disconnection is connected by applying a conductive paste to the disconnection portion using a very fine brush. Had to fix it.

【0004】[0004]

【発明が解決すべき課題】しかしながら、このように極
細の筆を用いて導体ペーストを塗布する修正方法では、
前述したような高密度・狭ピッチ化された回路パターン
環境においては、往々にして断線部分より広範囲に導体
ペーストを塗布してしまい、隣接するパターンと短絡さ
せてしまう場合があった。このような場合は新たに生じ
た短絡箇所をへら等で除去して修正するが、一度塗布し
た導体ペーストを除去するのは困難且つ面倒な作業であ
り、完全に導体ペーストを除去しきれずに短絡が直らな
い場合もある。
However, in such a correction method of applying a conductor paste using a very fine brush,
In a circuit pattern environment with a high density and a narrow pitch as described above, a conductor paste is often applied to a wider area than a broken portion, and a short circuit may occur between adjacent patterns. In such a case, the newly created short-circuited portion is removed and corrected with a spatula, but it is difficult and troublesome work to remove the conductor paste once applied, and short-circuiting occurs because the conductor paste cannot be completely removed. May not be fixed.

【0005】本発明は、コンピュータ等の配線基板の製
造工程において断線不良が生じた場合に、高密度・狭ピ
ッチ化された回路パターンであっても、回路短絡の原因
となる導体ペーストの過剰塗布を防いで断線を修正する
配線基板の断線修正方法を提供することを目的とする。
According to the present invention, when a disconnection failure occurs in a manufacturing process of a wiring board of a computer or the like, even if the circuit pattern has a high density and a narrow pitch, an excessive application of a conductive paste that causes a short circuit is caused. It is an object of the present invention to provide a method for correcting a disconnection of a wiring board that corrects a disconnection while preventing the occurrence of a disconnection.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
に、本発明の配線基板の断線修正方法は、断線部分を含
む回路パターン以外の部分にレジストを形成する工程
と、前記レジストを形成した上から前記断線部分に導電
ペーストを塗布する工程と、前記導電ペーストを固化さ
せる工程と、前記配線基板から前記レジストを除去する
工程と、を具えることを特徴とする。
In order to achieve the above object, a method for correcting a disconnection of a wiring board according to the present invention comprises the steps of forming a resist on a portion other than a circuit pattern including a disconnected portion, and forming the resist. A step of applying a conductive paste to the broken portion from above, a step of solidifying the conductive paste, and a step of removing the resist from the wiring board.

【0007】このように、予め導電ペーストを塗布する
ことを希望しない部分にレジストを形成してマスキング
を行うことにより、塗布した導電ペーストが余計な部分
に付着して回路短絡の原因となることを防ぐことができ
る。
As described above, by masking by forming a resist in a portion where it is not desired to apply the conductive paste in advance, it is possible to prevent the applied conductive paste from adhering to an unnecessary portion and causing a short circuit. Can be prevented.

【0008】本発明の配線基板の断線修正方法において
は、前記断線部分を含む回路パターン以外の部分にレジ
ストを形成する工程が、前記配線基板にレジストを塗布
する工程と、当該配線基板の回路パターンを再度露光す
る工程と、この露光した領域を現像する工程と、を具え
ることを特徴とする。
In the method of repairing a disconnection of a wiring board according to the present invention, the step of forming a resist on a portion other than the circuit pattern including the broken portion includes the steps of applying a resist to the wiring board, And a step of developing the exposed area.

【0009】このように、断線以外の部分にレジストを
形成するのは、この断線のある回路パターンを形成した
工程を再度繰返すことにより簡単に実現できる。即ち、
断線部分をカバーするようにレジストを塗布した後に当
該回路パターンを再び露光し、更にこれを現像すること
により、断線箇所を含む回路パターン以外の部分のみに
正確にレジストが形成される。従って、回路パターンが
高密度・狭ピッチ化されている場合でも、断線部分を含
む回路パターン部を残してそれ以外の部分を正確にマス
キングすることができ、このマスキングによって断線の
あるパターン以外の回路に短絡させることなく、簡単に
断線を修正することができる。
As described above, the formation of the resist in a portion other than the disconnection can be easily realized by repeating the step of forming the circuit pattern having the disconnection again. That is,
After the resist is applied so as to cover the broken portion, the circuit pattern is exposed again, and further developed, so that the resist is accurately formed only in portions other than the circuit pattern including the broken portion. Therefore, even when the circuit pattern has a high density and a narrow pitch, it is possible to accurately mask other portions except for the circuit pattern portion including the broken portion, and this masking allows a circuit other than the pattern having the broken wire to be formed. The disconnection can be easily corrected without causing a short circuit.

【0010】また、本発明の配線基板の断線修正方法
は、更に、前記導電ペーストを塗布した後に余分に付着
した前記導電ペーストを除去する工程を具えることを特
徴とする。このように、レジストを形成した上から導電
ペーストを塗布した後にへら等で余分な導電ペーストを
除去するようにすれば、より確実に修正後の回路短絡を
防ぐことができる。
Further, the method for correcting a disconnection of a wiring board according to the present invention is characterized in that the method further comprises a step of removing the excessively attached conductive paste after applying the conductive paste. As described above, if the conductive paste is applied from the top of the resist and the excess conductive paste is removed with a spatula or the like, a short circuit after the correction can be more reliably prevented.

【0011】前記導電ペーストを固化させる工程は、前
記配線基板を加熱して前記導電ペーストの溶剤分をとば
して固化させることが望ましい。例えばオーブン等で配
線基板を加熱して前記導電ペーストの溶剤分をとばして
焼き固めるようにすれば、修正工程の迅速化を図ること
ができる。
In the step of solidifying the conductive paste, it is preferable that the wiring substrate is heated to solidify the conductive paste by blowing off the solvent. For example, if the wiring board is heated in an oven or the like to blow off and harden the solvent in the conductive paste, the repair process can be sped up.

【0012】前記配線基板から前記レジストを除去する
工程には、前記配線基板を前記レジストを溶解可能な溶
剤に浸積して除去する方法を好適に用いることができ
る。
In the step of removing the resist from the wiring board, a method of immersing the wiring board in a solvent capable of dissolving the resist and removing the resist can be suitably used.

【0013】更に、本発明の配線基板の断線修正方法
は、前記配線基板が絶縁層と配線層を交互に積層してな
る多層配線基板であると共に、前記配線層を形成する毎
に前記断線部分の有無を確認し、断線箇所があれば随時
修正して多層配線基板を構成していくことを特徴とす
る。このように多層配線基板の製造工程においても、配
線層を一層形成する毎に断線を修正していけば、断線不
良のない多層配線基板を構成することができる。
Further, the method for correcting a disconnection of a wiring board according to the present invention is characterized in that the wiring board is a multilayer wiring board in which insulating layers and wiring layers are alternately laminated, and the disconnection portion is formed each time the wiring layer is formed. It is characterized by confirming the presence or absence of any breaks and correcting any breaks as needed to form a multilayer wiring board. As described above, even in the manufacturing process of the multilayer wiring board, if the disconnection is corrected each time a wiring layer is formed, a multilayer wiring board having no disconnection failure can be configured.

【0014】[0014]

【発明の実施の形態】本発明に係る配線基板の断線修正
方法の実施の形態を、添付の図面を参照しながら以下に
説明する。図1は、多層配線基板1の構成を示す図であ
る。図1に示すように、多層配線基板1は、基板2の上
に、絶縁層3と配線層4とを交互に積層して形成され
る。このような多層配線基板の製造工程において、パタ
ーン形成時にゴミや異物が付着することにより、配線層
4にパターンオープンが生じる場合がある。図2は本発
明の断線修正工程を示す正面図であり、図3はその断面
図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a method for correcting a disconnection of a wiring board according to the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a diagram showing a configuration of the multilayer wiring board 1. As shown in FIG. 1, the multilayer wiring board 1 is formed by alternately stacking insulating layers 3 and wiring layers 4 on a substrate 2. In the manufacturing process of such a multilayer wiring board, a pattern open may occur in the wiring layer 4 due to attachment of dust or foreign matter during pattern formation. FIG. 2 is a front view showing a disconnection correcting step of the present invention, and FIG. 3 is a sectional view thereof.

【0015】図2(a)及び図3(a)に示すように、
回路上にパターンオープン5がある場合には、先ずパタ
ーンオープン5を含む回路パターン以外の部分にレジス
ト6を形成する。この工程は、当該配線層の配線パター
ンを形成した工程を再度用いることにより、正確かつ容
易に行うことができる。即ち、先ずパターンオープン5
を含む広範囲にレジスト6を塗布してから、この配線層
の回路パターンを露光し、その後現像処理を行うと、こ
の配線層の回路パターンに該当する部分のレジストが除
去されて、配線パターン以外の部分のみにレジスト6が
形成される。ここで、パターンオープン5は回路パター
ン上に存在するため、図2(b)及び図3(b)に示す
ように、パターンオープン5を含む回路パターン以外の
部分に正確にレジスト6が形成される
As shown in FIGS. 2A and 3A,
If there is a pattern open 5 on the circuit, first, a resist 6 is formed on a portion other than the circuit pattern including the pattern open 5. This step can be performed accurately and easily by using the step of forming the wiring pattern of the wiring layer again. That is, first, pattern open 5
After the resist 6 is applied over a wide area including the wiring pattern, the circuit pattern of this wiring layer is exposed, and then the development processing is performed. Then, the resist corresponding to the circuit pattern of this wiring layer is removed, and the wiring pattern other than the wiring pattern is removed. The resist 6 is formed only on the portion. Here, since the pattern open 5 exists on the circuit pattern, the resist 6 is accurately formed on a portion other than the circuit pattern including the pattern open 5 as shown in FIGS. 2B and 3B.

【0016】次に、図2(c)及び図3(c)に示すよ
うに、レジスト6の上からパターンオープン5を橋絡す
るように導体ペースト7を塗布する。この導電ペースト
7は例えば銅などの伝導性素材に溶剤を練成して構成す
る。ここで、図2(d)及び図3(d)に示すように、
余分に付着した導体ペースト7はへら等できれいに除去
し、レジスト6上に残らないようにする。こうすること
により、修正個所と、これに隣接するパターンとの短絡
を確実に防ぐことができる。導体ペースト7を塗布した
後に、オーブン等で加熱して導体ペースト7の溶剤分を
飛ばして固化させる。
Next, as shown in FIGS. 2C and 3C, a conductive paste 7 is applied from above the resist 6 so as to bridge the pattern open 5. The conductive paste 7 is formed by kneading a conductive material such as copper with a solvent. Here, as shown in FIGS. 2D and 3D,
Excessive conductive paste 7 is removed with a spatula or the like so as not to remain on resist 6. By doing so, it is possible to reliably prevent a short-circuit between the correction location and the pattern adjacent thereto. After the conductive paste 7 is applied, the conductive paste 7 is heated in an oven or the like to remove the solvent of the conductive paste 7 and solidify.

【0017】最後に、図2(e)及び図3(e)に示す
ように、基板を溶剤に浸積させて基板からレジスト6を
剥離する。以上の工程により、パターンオープン5が生
じた箇所のみを正確に結線して、回路短絡を生ずること
なく配線基板の断線不良を修正することができる。
Finally, as shown in FIGS. 2E and 3E, the substrate is immersed in a solvent to remove the resist 6 from the substrate. According to the above steps, only the portion where the pattern open 5 has occurred can be accurately connected, and the disconnection failure of the wiring board can be corrected without causing a short circuit.

【0018】このように、多層配線基板の製造工程にお
いて、配線層を形成する毎にパターンオープン発生の有
無を確認し、パターンオープンがある場合には、上述の
方法を用いて随時修正するようにする。なお、この断線
修正方法は、多層配線基板の製造工程中に限らず、基板
上に一層のみの配線層を形成した単層基板の断線を修正
する場合にも適用できることは自明である。また、配線
基板の製造工程中のみならず、使用中の電子機器におい
て配線基板の断線不良が生じて修理を行う場合にも本発
明の修正方法を用いることができる。
As described above, in the manufacturing process of the multilayer wiring board, the presence or absence of occurrence of a pattern open is checked each time a wiring layer is formed, and if there is a pattern open, it is corrected as needed using the above-described method. I do. It is obvious that this disconnection correction method can be applied not only during the manufacturing process of the multilayer wiring substrate but also when the disconnection of a single-layer substrate having only one wiring layer formed on the substrate is corrected. Further, the repair method of the present invention can be used not only during the manufacturing process of the wiring board but also when the wiring board is repaired due to a disconnection failure of the wiring board in the electronic device in use.

【0019】[0019]

【発明の効果】以上に詳細に説明したように、本発明に
係る配線基板の断線修正方法によれば、配線基板の製造
工程中にゴミや異物の付着を原因とする断線不良が生じ
た場合に、予め断線以外の部分にレジストを形成し、そ
の上から導体ペーストを塗布して前記断線箇所を橋絡さ
せた後、レジストパターン上の余分に塗布した導体ペー
ストを除去するようにしているため、高密度・狭ピッチ
化されたパターン環境の配線基板においても確実に、隣
接する回路導体パターンと短絡させることなく断線を修
正することができる。
As described above in detail, according to the method for correcting a disconnection of a wiring board according to the present invention, when a disconnection failure due to adhesion of dust or foreign matter occurs during the manufacturing process of the wiring board. On the other hand, a resist is formed in a portion other than the disconnection in advance, and a conductive paste is applied thereon to bridge the broken portion, and then the excess applied conductive paste on the resist pattern is removed. Further, even in a wiring board having a pattern environment with a high density and a narrow pitch, disconnection can be surely corrected without causing a short circuit with an adjacent circuit conductor pattern.

【図面の簡単な説明】[Brief description of the drawings]

【図1】図1は、多層配線基板の構成を示す図である。FIG. 1 is a diagram illustrating a configuration of a multilayer wiring board;

【図2】図2は、本発明に係る断線修正方法の工程を示
す正面図である。
FIG. 2 is a front view showing steps of a disconnection correction method according to the present invention.

【図3】図3は、図2に示す本発明の断線修正方法の工
程を示す断面図である。
FIG. 3 is a cross-sectional view showing a step of the disconnection correction method of the present invention shown in FIG. 2;

【符号の説明】[Explanation of symbols]

1 多層配線基板 2 基板 3 絶縁層 4 配線層 5 パターンオープン 6 レジスト 7 導体ペースト DESCRIPTION OF SYMBOLS 1 Multilayer wiring board 2 Substrate 3 Insulating layer 4 Wiring layer 5 Pattern open 6 Resist 7 Conductor paste

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 配線基板の断線部分を修正する方法であ
って、前記断線部分を含む回路パターン以外の部分にレ
ジストを形成する工程と、前記レジストを形成した上か
ら前記断線部分に導電ペーストを塗布する工程と、前記
導電ペーストを固化させる工程と、前記配線基板から前
記レジストを除去する工程と、を具えることを特徴とす
る配線基板の断線修正方法。
1. A method for repairing a broken portion of a wiring board, comprising the steps of: forming a resist on a portion other than a circuit pattern including the broken portion; and forming a conductive paste on the broken portion after forming the resist. A method for correcting a disconnection of a wiring board, comprising: a step of applying; a step of solidifying the conductive paste; and a step of removing the resist from the wiring board.
【請求項2】 請求項1に記載の配線基板の断線修正方
法において、断線部分を含む回路パターン以外の部分に
レジストを形成する工程が、前記配線基板にレジストを
塗布する工程と、当該配線基板の回路パターンを再度露
光する工程と、この露光した領域を現像する工程と、を
具えることを特徴とする配線基板の断線修正方法。
2. The method according to claim 1, wherein the step of forming a resist on a portion other than the circuit pattern including the broken portion includes the steps of: applying a resist to the wiring substrate; A step of exposing the circuit pattern again, and a step of developing the exposed area.
【請求項3】 請求項1又は2に記載の配線基板の断線
修正方法において、更に、前記導電ペーストを塗布した
後に余分に付着した前記導電ペーストを除去する工程を
具えることを特徴とする配線基板の断線修正方法。
3. The method according to claim 1, further comprising a step of removing the excess conductive paste after applying the conductive paste. How to fix a broken board.
【請求項4】 請求項1乃至3に記載の配線基板の断線
修正方法において、前記導電ペーストを固化させる工程
が、前記配線基板を加熱して前記導電ペーストの溶剤分
をとばして固化させることを特徴とする配線基板の断線
修正方法。
4. The method for correcting a disconnection of a wiring board according to claim 1, wherein the step of solidifying the conductive paste includes heating the wiring board to solidify the conductive paste by blowing a solvent component. Characteristic method of correcting disconnection of wiring board.
【請求項5】 請求項1乃至4のいずれかに記載の配線
基板の断線修正方法において、前記配線基板から前記レ
ジストを除去する工程が、前記配線基板を前記レジスト
が溶解可能な溶剤に浸積させて除去することを特徴とす
る配線基板の断線修正方法。
5. The method according to claim 1, wherein the step of removing the resist from the wiring board comprises immersing the wiring board in a solvent capable of dissolving the resist. A method for correcting a disconnection of a wiring board, the method comprising:
【請求項6】 請求項1乃至5のいずれかに記載の配線
基板の断線修正方法において、前記配線基板が絶縁層と
配線層を交互に積層してなる多層配線基板であると共
に、前記配線層を形成する毎に前記断線部分の有無を確
認し、断線箇所があれば随時修正して多層配線基板を構
成していくことを特徴とする配線基板の断線修正方法。
6. The method according to claim 1, wherein the wiring board is a multilayer wiring board in which insulating layers and wiring layers are alternately stacked. A method for correcting the disconnection of a wiring board, wherein the presence or absence of the disconnection portion is checked each time a pattern is formed, and if there is a disconnection, the multilayer wiring board is corrected as needed to form a multilayer wiring board.
JP10322448A 1998-11-12 1998-11-12 Discontinued wiring repairing method for wiring board Pending JP2000151081A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10322448A JP2000151081A (en) 1998-11-12 1998-11-12 Discontinued wiring repairing method for wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10322448A JP2000151081A (en) 1998-11-12 1998-11-12 Discontinued wiring repairing method for wiring board

Publications (1)

Publication Number Publication Date
JP2000151081A true JP2000151081A (en) 2000-05-30

Family

ID=18143785

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10322448A Pending JP2000151081A (en) 1998-11-12 1998-11-12 Discontinued wiring repairing method for wiring board

Country Status (1)

Country Link
JP (1) JP2000151081A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103517572A (en) * 2012-06-25 2014-01-15 揖斐电株式会社 Wiring board, method for repairing disconnection in wiring board, method for forming wiring in wiring board, and method for manufacturing wiring board

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05211385A (en) * 1992-01-06 1993-08-20 Nec Corp Manufacture of printed wiring board
JPH0580837B2 (en) * 1983-11-18 1993-11-10 Hitachi Ltd
JPH0743320A (en) * 1993-03-15 1995-02-14 Hitachi Ltd X-ray inspection method and its system, and inspection method for prepreg and production of multi-layer wiring board
JPH07336020A (en) * 1994-06-10 1995-12-22 Sumitomo Metal Ind Ltd Forming method of conductor pattern

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0580837B2 (en) * 1983-11-18 1993-11-10 Hitachi Ltd
JPH05211385A (en) * 1992-01-06 1993-08-20 Nec Corp Manufacture of printed wiring board
JPH0743320A (en) * 1993-03-15 1995-02-14 Hitachi Ltd X-ray inspection method and its system, and inspection method for prepreg and production of multi-layer wiring board
JPH07336020A (en) * 1994-06-10 1995-12-22 Sumitomo Metal Ind Ltd Forming method of conductor pattern

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103517572A (en) * 2012-06-25 2014-01-15 揖斐电株式会社 Wiring board, method for repairing disconnection in wiring board, method for forming wiring in wiring board, and method for manufacturing wiring board

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