JP2000150571A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JP2000150571A
JP2000150571A JP31382098A JP31382098A JP2000150571A JP 2000150571 A JP2000150571 A JP 2000150571A JP 31382098 A JP31382098 A JP 31382098A JP 31382098 A JP31382098 A JP 31382098A JP 2000150571 A JP2000150571 A JP 2000150571A
Authority
JP
Japan
Prior art keywords
semiconductor element
substrate
semiconductor device
back surface
insulating adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31382098A
Other languages
Japanese (ja)
Inventor
Yoichiro Ishida
洋一郎 石田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP31382098A priority Critical patent/JP2000150571A/en
Publication of JP2000150571A publication Critical patent/JP2000150571A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

Landscapes

  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device made of an opaque substrate having high strength and easily handled with a few pressing jigs and manufactured with high productivity because of a short pressing time and with low cost because of reduced installation cost and a manufacture thereof. SOLUTION: A photocuring insulating adhesive resin 4 is supplied to the packaging position of a semiconductor device 5 of a substrate 2. Transparent bumps 6a, 6b formed on the reverse surface of the semiconductor device 5 are faced toward the substrate 2 and are put into contact with and electrically connected to wiring patterns 3a, 3b of the substrate 2. Then, light 10 from a light source 9 is applied between the substrate 2 and the semiconductor device 5 from the outer peripheral portion of the semiconductor device 5 to cure the insulating adhesive resin 4, and the insulating adhesive resin 4 at the back side of the bumps 6a, 6b against the incident direction of the light 10 is cured by light passing through the bumps 6a, 6b to fix the semiconductor device 5 to the substrate 2.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、基板に形成された
配線パターンの上に、実装すべき半導体素子の裏面に形
成された突起電極を当接させて電気的に接続し、前記基
板と半導体素子の裏面との間に介装された絶縁性接着樹
脂によって半導体素子を基板に位置固定した半導体装置
およびその製造方法に関する。
BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device to be mounted on a wiring pattern formed on a substrate by bringing a protruding electrode formed on the back surface of a semiconductor element to be mounted into contact with the wiring pattern and electrically connecting the semiconductor element to the substrate. The present invention relates to a semiconductor device in which a semiconductor element is fixed to a substrate by an insulating adhesive resin interposed between the element and a back surface of the element, and a method of manufacturing the semiconductor device.

【0002】[0002]

【従来の技術】半導体装置は、配線パターンの形成され
た基板に絶縁性接着樹脂を用いて半導体素子を実装する
ことにより構成され、その製造工程は、使用する絶縁性
接着樹脂が紫外線硬化型樹脂である場合と熱硬化型樹脂
である場合とによって異なる。
2. Description of the Related Art A semiconductor device is constructed by mounting a semiconductor element on a substrate on which a wiring pattern is formed by using an insulating adhesive resin. And the case of a thermosetting resin.

【0003】従来の半導体装置の製造工程を図7と図8
に示す。図7は、紫外線硬化型樹脂を用いた半導体装置
の製造工程を示し、図8は、熱硬化型樹脂を用いた半導
体装置の製造工程を示している。
FIGS. 7 and 8 show a conventional semiconductor device manufacturing process.
Shown in FIG. 7 shows a manufacturing process of a semiconductor device using an ultraviolet curable resin, and FIG. 8 shows a manufacturing process of a semiconductor device using a thermosetting resin.

【0004】絶縁性接着樹脂としてエポキシ系、シリコ
ン系、あるいはアクリル系などの紫外線硬化型樹脂を用
いる場合には、図7(a)に示すように、半導体素子5
を実装する基板として、ガラスなどのように光や紫外線
などを透過する光透過性の透明基板15を用いる。
When an ultraviolet-curable resin such as an epoxy-based, silicon-based, or acrylic-based resin is used as the insulating adhesive resin, as shown in FIG.
Is used as the substrate on which is mounted a light-transmissive transparent substrate 15, such as glass, which transmits light, ultraviolet light, and the like.

【0005】この透明基板15にCr−Au,Al,C
u,ITOなどをスパッタリング法や蒸着法により基板
配線用金属を形成した後、フォト・レジスト法によりレ
ジストを基板配線を形成する部分に残して基板配線用金
属をエッチングする、あるいは印刷法を用いて配線パタ
ーン3a,3bを形成し、配線基板1を形成する。
On this transparent substrate 15, Cr-Au, Al, C
After a metal for substrate wiring is formed by sputtering or vapor deposition of u, ITO, etc., the metal for substrate wiring is etched by a photo-resist method while leaving a resist in a portion where the substrate wiring is to be formed, or a printing method is used. The wiring patterns 3a and 3b are formed, and the wiring board 1 is formed.

【0006】得られた配線基板1を加圧治具7の上に配
置し、配線基板1の半導体素子5の実装位置に紫外線硬
化型樹脂4を供給する。半導体素子5の裏面には、アル
ミ電極の上に電気めっき法などにより形成されたAu,
Ag,Cuなどからなる突起電極12a,12bが形成
されている。この突起電極12a,12bを配線基板1
の側に向けて、配線パターン3a,3bと重なるように
位置合わせし、図7(b)に示すように加圧治具7,8
にて加圧して、配線パターン3aと突起電極12a、配
線パターン3bと突起電極12bとを当接させ電気的に
接続する。
The obtained wiring board 1 is placed on a pressing jig 7, and ultraviolet curing resin 4 is supplied to the mounting position of the semiconductor element 5 on the wiring board 1. On the back surface of the semiconductor element 5, Au, which is formed on an aluminum electrode by electroplating or the like,
Protruding electrodes 12a and 12b made of Ag, Cu or the like are formed. The projecting electrodes 12a and 12b are connected to the wiring board 1
, So as to overlap with the wiring patterns 3a and 3b, and as shown in FIG.
Then, the wiring pattern 3a and the protruding electrode 12a are brought into contact with each other, and the wiring pattern 3b and the protruding electrode 12b are brought into contact with each other to be electrically connected.

【0007】そして、加圧治具7,8による加圧を保持
した状態で、加圧治具7の下部に配置された紫外線照射
器9より紫外線硬化型樹脂4に向けて紫外線10を照射
する。照射された紫外線10は、透明基板15を透過し
て紫外線硬化型樹脂4を硬化する。その後、加圧治具
7,8を取り外し、加圧を解除することにより半導体装
置が得られる。
[0007] Then, while holding the pressurization by the pressurizing jigs 7, 8, ultraviolet rays 10 are irradiated toward the ultraviolet curable resin 4 from an ultraviolet irradiator 9 arranged below the pressurizing jig 7. . The irradiated ultraviolet rays 10 pass through the transparent substrate 15 to cure the ultraviolet curing resin 4. Thereafter, the pressing jigs 7 and 8 are removed, and the pressure is released to obtain a semiconductor device.

【0008】一方、絶縁性接着樹脂としてエポキシ系、
シリコン系、あるいはアクリル系などの熱硬化型樹脂を
用いる場合には、図8(a)に示すように、半導体素子
5を実装する基板として、セラミックやガラスエポキシ
などのように光や紫外線などを透過しない不透明基板2
を用いる。
On the other hand, epoxy-based insulating resin,
When a thermosetting resin such as a silicon-based or acrylic-based resin is used, as shown in FIG. 8A, a substrate on which the semiconductor element 5 is mounted is exposed to light or ultraviolet light such as ceramic or glass epoxy. Opaque substrate 2 that does not transmit
Is used.

【0009】この不透明基板2に上記と同様にして配線
パターン3a,3bを形成した配線基板1を加圧治具1
7の上に配置し、配線基板1の半導体素子5の実装位置
に熱硬化型樹脂16を供給する。
The wiring board 1 having the wiring patterns 3a and 3b formed on the opaque substrate 2 in the same manner as described above
7, and the thermosetting resin 16 is supplied to the mounting position of the semiconductor element 5 on the wiring board 1.

【0010】半導体素子5は上記と同様の構成であり、
この半導体素子5の突起電極12a,12bを上記と同
様にして配線パターン3a,3bと当接させ、加圧治具
17,18にて加圧し、ねじ19a,19bと留め金2
0a,20bにて加圧状態を保持する。
The semiconductor element 5 has the same configuration as described above.
The protruding electrodes 12a, 12b of the semiconductor element 5 are brought into contact with the wiring patterns 3a, 3b in the same manner as described above, and pressurized by pressurizing jigs 17, 18, and the screws 19a, 19b and the clasp 2 are pressed.
The pressurized state is maintained at 0a and 20b.

【0011】そして、加圧状態を保持したまま半導体装
置5を電気炉などに入れて外周部より加熱し、熱硬化型
樹脂16を硬化する。その後、加圧治具17,18を取
り外して加圧を解除することにより半導体装置が得られ
る。
Then, the semiconductor device 5 is placed in an electric furnace or the like while maintaining the pressurized state, and is heated from the outer peripheral portion to cure the thermosetting resin 16. Thereafter, the semiconductor devices are obtained by removing the pressure jigs 17 and 18 and releasing the pressure.

【0012】[0012]

【発明が解決しようとする課題】しかしながら、上記従
来の半導体装置の製造方法には、以下のような問題点が
ある。
However, the above-described conventional method for manufacturing a semiconductor device has the following problems.

【0013】図7に示す半導体装置の製造方法では、ガ
ラスなどの透明基板15を使用する際には容易に製造で
きるものの、この透明基板15よりも強度の高いセラミ
ックやガラスエポキシからなる不透明基板2を用いて半
導体装置を製造することが難しい。
In the method of manufacturing a semiconductor device shown in FIG. 7, when the transparent substrate 15 made of glass or the like can be easily manufactured, the opaque substrate 2 made of ceramic or glass epoxy having higher strength than the transparent substrate 15 is used. It is difficult to manufacture a semiconductor device using the semiconductor device.

【0014】すなわち、不透明基板2を用いた配線基板
1の背後から紫外線10を照射すると、紫外線10が透
過しにくくなり紫外線硬化型樹脂4を充分に硬化するこ
とができず、信頼性が高く、耐久性の良い半導体装置を
得ることができない。
That is, when the ultraviolet ray 10 is irradiated from behind the wiring substrate 1 using the opaque substrate 2, the ultraviolet ray 10 is hardly transmitted, and the ultraviolet curable resin 4 cannot be sufficiently cured. A semiconductor device with good durability cannot be obtained.

【0015】また、図8に示す半導体装置の製造方法で
は、強度の高い不透明基板2は使用できるものの、熱可
塑性樹脂16を固定するためには、図8(b)に示すよ
うに多数の加熱治具にて固定した状態で電気炉などに入
れて加熱する必要があり、ハンドリング性が悪く、設備
費がかかりコスト高になる。また、一般に熱硬化型樹脂
の硬化には数十分から数時間かかることから加圧時間が
長くなり、生産性に劣るものである。
Further, in the method of manufacturing a semiconductor device shown in FIG. 8, although the opaque substrate 2 having high strength can be used, a large number of heating steps are required to fix the thermoplastic resin 16 as shown in FIG. It is necessary to heat the device by fixing it with a jig in an electric furnace or the like, which is inferior in handleability and increases equipment cost and cost. Further, since it generally takes tens of minutes to several hours to cure the thermosetting resin, the pressurizing time becomes longer and the productivity is poor.

【0016】本発明は前記問題点を解決し、強度の高い
不透明基板が使用でき、加圧治具が少なくてハンドリン
グ性が良く、加圧時間が短いため生産性が良く、しかも
設備投資費用が少なくコストの削減が図れる半導体装置
およびその製造方法を提供するものである。
The present invention solves the above-mentioned problems, can use a high-strength opaque substrate, has a small number of pressing jigs, has good handling properties, and has a short pressurizing time, so that productivity is good and equipment investment costs are low. An object of the present invention is to provide a semiconductor device and a method for manufacturing the same, which can reduce the cost with less.

【0017】[0017]

【課題を解決するための手段】本発明の半導体装置は、
半導体素子の裏面の構成を特殊にしたことを特徴とす
る。
According to the present invention, there is provided a semiconductor device comprising:
It is characterized in that the configuration of the back surface of the semiconductor element is special.

【0018】この本発明によると、光硬化型樹脂を使用
しても不透明基板の使用が可能となり、信頼性が高く耐
久性の良い半導体装置が得られる。また本発明の半導体
装置の製造方法は、半導体装置の突起電極の周囲の樹脂
を完全に硬化できるように光を照射することを特徴とす
る。
According to the present invention, an opaque substrate can be used even if a photocurable resin is used, and a highly reliable and highly durable semiconductor device can be obtained. Further, the method of manufacturing a semiconductor device according to the present invention is characterized in that light is applied so that the resin around the protruding electrodes of the semiconductor device can be completely cured.

【0019】この本発明によると、加圧治具を少なくし
てハンドリング性を向上させ、加圧時間を短縮して生産
性を良好にし、しかも大掛りな設備を必要としないため
コストの削減を図ることができる。
According to the present invention, the handling efficiency is improved by reducing the number of pressing jigs, the pressurizing time is shortened, the productivity is improved, and the cost is reduced because no large-scale equipment is required. Can be planned.

【0020】[0020]

【発明の実施の形態】請求項1記載の半導体装置は、基
板に形成された配線パターンの上に、実装すべき半導体
素子の裏面に形成された突起電極を当接させて電気的に
接続し、前記基板と半導体素子の裏面との間に介装され
た絶縁性接着樹脂によって半導体素子を基板に位置固定
した半導体装置において、前記絶縁性接着樹脂を光硬化
型樹脂とするとともに、半導体素子の前記突起電極を光
透過性の材料で形成したことを特徴とする。
In a semiconductor device according to the present invention, a projection electrode formed on a back surface of a semiconductor element to be mounted is brought into contact with a wiring pattern formed on a substrate to be electrically connected. In a semiconductor device in which a semiconductor element is fixed to a substrate by an insulating adhesive resin interposed between the substrate and the back surface of the semiconductor element, the insulating adhesive resin is a photocurable resin, The projection electrode is formed of a light transmissive material.

【0021】この構成によると、突起電極の周囲の絶縁
性接着樹脂を完全に硬化し、突起電極と配線パターンと
の電気的接続を良好で信頼性の高いものとすることがで
きる。
According to this structure, the insulating adhesive resin around the protruding electrode can be completely cured, and the electrical connection between the protruding electrode and the wiring pattern can be made good and highly reliable.

【0022】請求項2記載の半導体装置は、基板に形成
された配線パターンの上に、実装すべき半導体素子の裏
面に形成された突起電極を当接させて電気的に接続し、
前記基板と半導体素子の裏面との間に介装された絶縁性
接着樹脂によって半導体素子を基板に位置固定した半導
体装置において、前記絶縁性接着樹脂を光硬化型樹脂と
するとともに、前記基板と半導体素子の裏面との間で半
導体素子の前記突起電極よりも半導体素子の外周部から
内側に配設されて半導体素子の外周部から入射した光を
前記突起電極の背面に反射させる凸部を設けたことを特
徴とする。
According to a second aspect of the present invention, there is provided a semiconductor device, wherein a projection electrode formed on a back surface of a semiconductor element to be mounted is brought into contact with a wiring pattern formed on a substrate to be electrically connected,
In a semiconductor device in which a semiconductor element is fixed to a substrate by an insulating adhesive resin interposed between the substrate and the back surface of the semiconductor element, the insulating adhesive resin is a photocurable resin, and the substrate and the semiconductor A convex portion is provided between the outer surface of the semiconductor element and the back surface of the semiconductor device to reflect light incident from the outer region of the semiconductor device to the back surface of the semiconductor device. It is characterized by the following.

【0023】この構成によっても上記と同様の効果が得
られる。請求項3記載の半導体装置は、請求項1におい
て、突起電極の先端で配線パターンとの接触面に、突起
電極の材質よりも低抵抗の材質の薄膜層を形成したこと
を特徴とする。
With this configuration, the same effect as described above can be obtained. According to a third aspect of the present invention, there is provided the semiconductor device according to the first aspect, wherein a thin film layer made of a material having a lower resistance than the material of the protruding electrode is formed on a contact surface of the protruding electrode with the wiring pattern at the tip.

【0024】この構成によると、突起電極の焼き付き不
良を解消してさらに信頼性の高い半導体装置を得ること
ができる。請求項4記載の半導体装置は、請求項2にお
いて、半導体素子の外周部から入射した光を突起電極の
背面に反射させる凸部を、半導体素子の裏面に設けたこ
とを特徴とする。
According to this structure, a defective burn-in of the protruding electrode can be eliminated, and a more reliable semiconductor device can be obtained. According to a fourth aspect of the present invention, in the semiconductor device according to the second aspect, a convex portion for reflecting light incident from an outer peripheral portion of the semiconductor element to a rear surface of the projecting electrode is provided on a rear surface of the semiconductor element.

【0025】請求項5記載の半導体装置の製造方法は、
基板に形成された配線パターンの上に、実装すべき半導
体素子の裏面に形成された突起電極を当接させて電気的
に接続し、前記基板と半導体素子の裏面との間に介装さ
れた絶縁性接着樹脂によって半導体素子を基板に位置固
定した半導体装置を製造するに際し、基板の前記半導体
素子の実装位置に光硬化型の絶縁性接着樹脂を供給し、
半導体素子の裏面に形成された光透過性の突起電極を前
記基板の側に向けて前記基板の配線パターンの上に半導
体素子の突起電極を当接させて電気的に接続し、半導体
素子の外周部から前記基板と前記半導体素子の間に光源
から光を照射して、半導体素子の外周部と前記突起電極
の間の前記絶縁性接着樹脂を硬化させるとともに、前記
光の入射方向に対して前記突起電極の背面の前記絶縁性
接着樹脂を前記突起電極を透過した光で硬化させ半導体
素子を基板に位置固定することを特徴とする。
According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device.
On the wiring pattern formed on the substrate, a protruding electrode formed on the back surface of the semiconductor element to be mounted was brought into contact and electrically connected, and was interposed between the substrate and the back surface of the semiconductor element. When manufacturing a semiconductor device in which a semiconductor element is fixed to a substrate by an insulating adhesive resin, a photocurable insulating adhesive resin is supplied to a mounting position of the semiconductor element on the substrate,
The light-transmitting projection electrode formed on the back surface of the semiconductor element faces the substrate, and the projection electrode of the semiconductor element is brought into contact with the wiring pattern of the substrate so as to be electrically connected to the outer periphery of the semiconductor element. Irradiating light from a light source between the substrate and the semiconductor element from the portion, and curing the insulating adhesive resin between the outer peripheral portion of the semiconductor element and the protruding electrode, and applying the light to the incident direction of the light. The insulating adhesive resin on the back surface of the protruding electrode is cured by light transmitted through the protruding electrode, and the semiconductor element is fixed on the substrate.

【0026】この構成によると、上記の半導体装置が容
易に実現できる。請求項6記載の半導体装置の製造方法
は、基板に形成された配線パターンの上に、実装すべき
半導体素子の裏面に形成された突起電極を当接させて電
気的に接続し、前記基板と半導体素子の裏面との間に介
装された絶縁性接着樹脂によって半導体素子を基板に位
置固定した半導体装置を製造するに際し、基板の前記半
導体素子の実装位置に光硬化型の絶縁性接着樹脂を供給
し、半導体素子の裏面に形成された光透過性の突起電極
を前記基板の側に向けて前記基板の配線パターンの上に
半導体素子の突起電極を当接させて電気的に接続し、半
導体素子の外周部から前記基板と前記半導体素子の間に
光源から光を照射して、半導体素子の外周部と前記突起
電極の間の前記絶縁性接着樹脂を硬化させるとともに、
前記光の入射方向に対して前記突起電極の背面の前記絶
縁性接着樹脂を、前記基板と半導体素子の裏面との間で
半導体素子の前記突起電極よりも半導体素子の外周部か
ら内側に配設された凸部で半導体素子の外周部から入射
した光を前記突起電極の背面に反射させて硬化させ半導
体素子を基板に位置固定することを特徴とする。
According to this configuration, the above-described semiconductor device can be easily realized. 7. The method for manufacturing a semiconductor device according to claim 6, wherein a protruding electrode formed on the back surface of the semiconductor element to be mounted is brought into contact with the wiring pattern formed on the substrate so as to be electrically connected to the wiring pattern. When manufacturing a semiconductor device in which a semiconductor element is fixed to a substrate by an insulating adhesive resin interposed between the semiconductor element and the back surface, a photocurable insulating adhesive resin is applied to the mounting position of the semiconductor element on the substrate. The semiconductor device is provided with a light-transmitting projecting electrode formed on the back surface of the semiconductor element facing the substrate and electrically connecting the projecting electrode of the semiconductor element on the wiring pattern of the substrate by contacting the semiconductor element. Irradiating light from a light source between the substrate and the semiconductor element from the outer peripheral portion of the element, while curing the insulating adhesive resin between the outer peripheral portion of the semiconductor element and the projecting electrode,
The insulating adhesive resin on the back surface of the protruding electrode with respect to the incident direction of the light is provided between the substrate and the back surface of the semiconductor device inside the outer periphery of the semiconductor device with respect to the protruding electrode of the semiconductor device. The light incident from the outer peripheral portion of the semiconductor element at the projected portion is reflected on the back surface of the protruding electrode and cured to fix the position of the semiconductor element on the substrate.

【0027】この構成によっても上記と同様の効果が得
られる。以下、本発明の各実施の形態について図1〜図
6を用いて説明する。なお、上記従来例を示す図7と図
8と同様をなすものについては同一の符号をつけて説明
する。
With this configuration, the same effect as described above can be obtained. Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 6. 7 and 8 showing the above-mentioned conventional example will be described with the same reference numerals.

【0028】(実施の形態1)図1〜図5は本発明の
(実施の形態1)を示す。紫外線硬化型樹脂4を用いる
点は上記従来例を示す図7と同様であるが、この(実施
の形態1)では、配線基板1を構成する基板としてセラ
ミック、ガラスエポキシなどからなる非透過性の不透明
基板2を用いるとともに、半導体装置5の配線基板1と
対向する裏面の構成を特殊にした点で異なる。
(Embodiment 1) FIGS. 1 to 5 show (Embodiment 1) of the present invention. The point of using the ultraviolet curable resin 4 is the same as that of FIG. 7 showing the conventional example, but in this (Embodiment 1), a non-transmissive substrate made of ceramic, glass epoxy, or the like is used as a substrate constituting the wiring substrate 1. The difference is that the opaque substrate 2 is used and the configuration of the back surface of the semiconductor device 5 facing the wiring substrate 1 is special.

【0029】詳しくは、図1(a)に示すように、不透
明基板2に上記従来例と同様にして配線パターン3a,
3bの形成された配線基板1を加圧治具7に載置する。
絶縁性接着樹脂としては紫外線硬化型樹脂4を用い、こ
の紫外線硬化型樹脂4を配線基板1の半導体素子5の実
装位置に厚さが0.5〜50μm程度となるように供給
する。
More specifically, as shown in FIG. 1A, the wiring patterns 3a, 3a,
The wiring board 1 on which 3b is formed is placed on the pressing jig 7.
An ultraviolet-curable resin 4 is used as the insulating adhesive resin, and the ultraviolet-curable resin 4 is supplied to the mounting position of the semiconductor element 5 on the wiring board 1 so that the thickness is about 0.5 to 50 μm.

【0030】半導体素子5の裏面にはITOなどの透明
な導電性材料にて光透過性の突起電極6a,6bを形成
する。この半導体素子5の裏面を配線基板1の側に向け
て、配線パターン3aと突起電極6a、配線パターン3
bと突起電極6bとが当接するように配置し、図1
(b)に示すように加圧治具7、8にて半導体素子5を
加圧して、配線パターン3a,3bと突起電極6a,6
bとを電気的に接続する。
Light-transmissive bump electrodes 6a and 6b are formed on the back surface of the semiconductor element 5 using a transparent conductive material such as ITO. The wiring pattern 3a, the protruding electrode 6a, and the wiring pattern 3
b and the protruding electrode 6b are arranged so as to be in contact with each other.
As shown in (b), the semiconductor elements 5 are pressed by the pressing jigs 7 and 8, and the wiring patterns 3a and 3b and the projecting electrodes 6a and 6 are pressed.
b is electrically connected.

【0031】加圧状態を保った状態で、半導体素子5の
外周部、具体的には半導体素子5の側面から配線基板1
と半導体素子5の間に向けて紫外線照射器9から紫外線
10を照射する。紫外線照射により樹脂が硬化すると、
図2に示すように、突起電極6a,6bと電極パターン
3a,3bとは、矢印Aで示す樹脂の収縮力により固定
される。
While the pressurized state is maintained, the wiring board 1 is removed from the outer periphery of the semiconductor element 5, specifically, from the side of the semiconductor element 5.
Ultraviolet light 10 is irradiated from an ultraviolet irradiator 9 toward between the semiconductor device 5 and the semiconductor device 5. When the resin is cured by UV irradiation,
As shown in FIG. 2, the protruding electrodes 6a, 6b and the electrode patterns 3a, 3b are fixed by the contraction force of the resin indicated by the arrow A.

【0032】ところで、上記図7に示す従来の半導体素
子5の突起電極12a,12bは、一般に半導体素子5
のアルミ電極の上にAu,Ag,Cuなどの不透明な金
属を電気めっき法などにより配置して形成している。
The projection electrodes 12a and 12b of the conventional semiconductor device 5 shown in FIG.
An opaque metal such as Au, Ag, Cu or the like is arranged on the aluminum electrode by electroplating or the like.

【0033】このような突起電極12a,12bを使用
すると、上述のように半導体素子5の側面から紫外線1
0を照射した際に、図3(a)に示すように突起電極1
2a,12bは紫外線10を透過しないため、その前面
で紫外線10は反射され、突起電極12a,12bの背
面には紫外線10が照射されずハッチングで示すように
未硬化の部分14が発生する。
When such projecting electrodes 12a and 12b are used, the ultraviolet rays 1
0, the projecting electrode 1 as shown in FIG.
Since 2a and 12b do not transmit the ultraviolet light 10, the ultraviolet light 10 is reflected on the front surface thereof, and the ultraviolet light 10 is not irradiated on the back surface of the protruding electrodes 12a and 12b, so that an uncured portion 14 is generated as shown by hatching.

【0034】このような未硬化の部分14が発生する
と、加圧を解除した際に、未硬化の樹脂が突起電極12
a,12bと配線パターン3a,3bとの間に入り込
み、接続不良が発生して半導体装置の信頼性が低下する
こととなる。
When such an uncured portion 14 occurs, the uncured resin is removed from the protruding electrode 12 when the pressure is released.
a, 12b and the wiring patterns 3a, 3b, and a connection failure occurs, thereby lowering the reliability of the semiconductor device.

【0035】しかし、この(実施の形態1)では、上述
のように突起電極6a,6bは透明な導電性材料にて形
成されているため、図3(b)に示すように半導体素子
5の側面から照射された紫外線10は、突起電極6a,
6bを透過してその背面にある紫外線硬化型樹脂4を硬
化し、突起電極6a,6bの周囲の樹脂は完全に硬化さ
れる。
However, in this (Embodiment 1), since the projecting electrodes 6a and 6b are formed of a transparent conductive material as described above, as shown in FIG. Ultraviolet rays 10 radiated from the side face are projected electrodes 6a,
The ultraviolet-curable resin 4 on the back surface is transmitted through 6b and cured, and the resin around the protruding electrodes 6a and 6b is completely cured.

【0036】従って、加圧を解除しても未硬化の樹脂が
突起電極6a,6bと配線パターン3a,3bとの間に
入り込むことがなくなり、電気的接続が良好で信頼性の
高い半導体装置が得られる。
Therefore, the uncured resin does not enter between the protruding electrodes 6a, 6b and the wiring patterns 3a, 3b even when the pressure is released, and a highly reliable semiconductor device with good electrical connection is provided. can get.

【0037】なお、この(実施の形態1)で得られた半
導体装置は、通常の動作モードでは矢印Aで示す樹脂の
収縮力が矢印Bで示す樹脂の膨張力を上回っているた
め、図4(a)に示すように突起電極6a,6bと配線
パターン3a,3bとが密着しており、安定な電気的接
続が得られている。
In the semiconductor device obtained in the first embodiment, the contraction force of the resin indicated by arrow A exceeds the expansion force of the resin indicated by arrow B in the normal operation mode. As shown in (a), the protruding electrodes 6a and 6b and the wiring patterns 3a and 3b are in close contact with each other, and a stable electrical connection is obtained.

【0038】しかし、半導体装置の使用中に半導体素子
5の誤動作などにより高温高圧状態にさらされると、突
起電極6a,6bを形成するITOなどの透明な導電性
材料はAu,Ag,Cuなどの金属に比べ2桁ほど抵抗
値が高いため、矢印Aで示す樹脂の収縮力よりも矢印B
で示す樹脂の膨張力が大きくなることがある。
However, when the semiconductor device 5 is exposed to a high temperature and a high pressure due to a malfunction or the like during use of the semiconductor device, the transparent conductive material such as ITO for forming the bump electrodes 6a and 6b is made of Au, Ag, Cu or the like. Since the resistance value is about two orders of magnitude higher than that of metal, the arrow B is smaller than the contraction force of the resin indicated by arrow A.
The expansion force of the resin indicated by may increase.

【0039】このような状態になると、図4(b)に示
すように突起電極6a,6bの配線パターン3a,3b
との接触面が配線パターン3a,3bの側に凸に褶曲し
た形状となり、突起電極6a,6bと配線パターン3
a,3bとの間に隙間が生じてその接触面積が減少し、
電気的接続に不良が生じる。
In this state, as shown in FIG. 4B, the wiring patterns 3a, 3b of the projecting electrodes 6a, 6b
The contact surface with the wiring patterns 3a, 3b is bent in a convex shape on the side of the wiring patterns 3a, 3b.
a, 3b, a gap is generated, and the contact area decreases,
Poor electrical connection occurs.

【0040】その結果、突起電極6a,6bと配線パタ
ーン3a,3bとの接触部は高抵抗での電気的接続状態
となり、最終的にこの突起電極6a,6bが焼け付いて
不導体となり電気的接続を失ってしまう。
As a result, the contact portions between the protruding electrodes 6a, 6b and the wiring patterns 3a, 3b are in an electrically connected state with high resistance, and finally, the protruding electrodes 6a, 6b are burned to become non-conductive and become electrically non-conductive. You lose your connection.

【0041】このような半導体装置の使用中の接続不良
を解消する手法として、この(実施の形態1)では、図
5に示すように、突起電極6a,6bの先端で配線パタ
ーン3a,3bとの接触面にITOなどの透明な導電性
材料よりも低抵抗の材質からなる薄膜層11を形成する
ことが好ましい。
As a method for solving such a connection failure during use of the semiconductor device, in this (Embodiment 1), as shown in FIG. 5, the wiring patterns 3a, 3b are connected to the tips of the projecting electrodes 6a, 6b. It is preferable to form a thin film layer 11 made of a material having a lower resistance than a transparent conductive material such as ITO on the contact surface of.

【0042】低抵抗の薄膜層11を突起電極6a,6b
の先端部に形成することで、上記のように半導体装置が
誤動作し予想の温度以上になり樹脂の膨張が起こった場
合でも、高抵抗の突起電極6a,6bと配線パターン3
a,3bとは低抵抗の薄膜層11を介して接続している
ためこの部分での抵抗値は変化せず、突起電極6a,6
bの焼き付きを防止することができる。
The low-resistance thin film layer 11 is formed on the protruding electrodes 6a and 6b.
In the case where the semiconductor device malfunctions as described above and the temperature exceeds the expected temperature and the resin expands, the protruding electrodes 6a and 6b having high resistance and the wiring pattern 3 are formed.
a and 3b are connected via the low-resistance thin film layer 11, so that the resistance value at this portion does not change and the protruding electrodes 6a and 6b are connected.
b can be prevented from burning.

【0043】薄膜層11は、透明な導電性材料よりも低
抵抗の材質であれば特に限定されるものではないが、A
u,Ag,Cuなどの金属が好適に使用でき、このよう
な金属薄膜を使用すると、酸化などの変質を防ぐことが
可能となる。
The thin film layer 11 is not particularly limited as long as it has a lower resistance than the transparent conductive material.
Metals such as u, Ag, and Cu can be suitably used. When such a metal thin film is used, it is possible to prevent deterioration such as oxidation.

【0044】薄膜層11の厚さは0.2μm程度であれ
ば良く、このような金属層は突起電極6a,6bをスパ
ッタリング法で形成した後、この突起電極6a,6bの
上にAuなどの材質をスパッタリング法またはめっき法
によって形成することにより得られる。
The thickness of the thin film layer 11 may be about 0.2 μm. Such a metal layer is formed by forming the projecting electrodes 6a and 6b by sputtering, and then depositing Au or the like on the projecting electrodes 6a and 6b. It is obtained by forming the material by a sputtering method or a plating method.

【0045】(実施の形態2)図6は、本発明の(実施
の形態2)を示す。上記(実施の形態1)では、半導体
素子5として透明な導電性材料からなる光透過性の突起
電極6a,6bが形成されたものを用いたが、この(実
施の形態2)では、上記従来例を示す図7と同様に金属
からなる非透過性の突起電極12a,12bが形成され
た半導体素子5を用いるとともに、突起電極12a,1
2bの周辺部の紫外線硬化型樹脂を充分に硬化させる反
射手段を設けた点で異なり、その他の点については上記
(実施の形態1)とほぼ同様の構成である。
(Embodiment 2) FIG. 6 shows (Embodiment 2) of the present invention. In the above (Embodiment 1), the semiconductor element 5 having the light-transmitting bump electrodes 6a and 6b made of a transparent conductive material is used. As in the example shown in FIG. 7, the semiconductor element 5 having the non-transparent projecting electrodes 12a and 12b made of metal is used.
The difference is that a reflecting means for sufficiently curing the ultraviolet curable resin in the peripheral portion of 2b is provided, and the other points are almost the same as those of the above (Embodiment 1).

【0046】具体的には、図6に示すように、反射手段
として半導体素子5の裏面に突起電極12a,12bよ
りも半導体素子5の外周部から内側に配設されて光源か
らの光を突起電極12a,12bの背面に反射させる凸
部13a,13bを設けた。
More specifically, as shown in FIG. 6, the reflecting means is provided on the back surface of the semiconductor element 5 from the outer periphery of the semiconductor element 5 to the inside of the outer periphery of the semiconductor element 5 to project light from the light source. Protrusions 13a and 13b for reflecting light were provided on the back surfaces of the electrodes 12a and 12b.

【0047】この凸部13a,13bは、突起電極12
a,12bと同じ材質であり、具体的にはAu等の金属
からなり、厚さ5〜30μm程度の円柱形状で入射光を
突起電極12a,12bに対して反射させるものであ
る。また、この凸部13a,13bは、突起電極12
a,12bを形成する際に、スパッタリング法またはめ
っき法により同時に形成したものである。
The protruding portions 13a and 13b are
It is made of the same material as a and 12b, specifically made of a metal such as Au, and reflects incident light to the protruding electrodes 12a and 12b in a cylindrical shape having a thickness of about 5 to 30 μm. Also, the projections 13a and 13b are
When a and 12b are formed, they are simultaneously formed by a sputtering method or a plating method.

【0048】このような構成とすると、紫外線照射器9
から紫外線10が照射された際に、突起電極12a〜1
2cの前面および側面の紫外線硬化樹脂4は、外部から
直接入射した紫外線10および突起電極12a〜12c
の前面にて反射された紫外線10にて硬化される。
With such a configuration, the ultraviolet irradiator 9
When the projections 12a-1
The ultraviolet curable resin 4 on the front and side surfaces of 2c is composed of ultraviolet rays 10 directly incident from the outside and projection electrodes 12a to 12c.
Is cured by the ultraviolet rays 10 reflected on the front surface of the substrate.

【0049】また、突起電極12a〜12cの背面側の
紫外線硬化樹脂4は、凸部13a,13bにて反射され
た光にて硬化されるため、突起電極12a,12bの周
囲に位置する紫外線硬化樹脂4は完全に硬化され、良好
な電気的接続が得られる。
Further, since the ultraviolet curing resin 4 on the back side of the protruding electrodes 12a to 12c is cured by the light reflected by the projections 13a and 13b, the ultraviolet curing resin located around the protruding electrodes 12a and 12b is cured. The resin 4 is completely cured, and a good electrical connection is obtained.

【0050】なお、光の入射側に対し凸部13a,13
bの背面側には、紫外線10が届かないためハッチング
14で示すように樹脂が未硬化の部分が発生するが、突
起電極12a〜12cの周囲、すなわち電気的接続を保
証する必要がある部分では紫外線硬化型樹脂4は完全に
硬化している。このように突起電極12a〜12cの周
囲の樹脂は完全に硬化されているため、突起電極12a
〜12cと配線パターンとの間に未硬化の樹脂が入り込
むことがなくなり、良好な電気的接続が実現できる。ま
た、ハッチング14で示される未硬化の樹脂は、紫外線
10を照射した後に加圧を解除せずにそのまま電気炉に
入れて硬化し、加圧を解除することで、良好な物理的接
続が実現できる。
The projections 13a and 13a are located on the light incident side.
On the back side of b, since the ultraviolet rays 10 do not reach, a portion where the resin is not cured occurs as shown by hatching 14, but around the protruding electrodes 12a to 12c, that is, in the portion where electrical connection needs to be guaranteed. The ultraviolet curable resin 4 is completely cured. As described above, since the resin around the protruding electrodes 12a to 12c is completely cured, the protruding electrodes 12a to 12c are hardened.
Uncured resin does not enter between the wiring patterns 12c and the wiring pattern, and good electrical connection can be realized. In addition, the uncured resin indicated by hatching 14 is irradiated with the ultraviolet light 10 and then cured without being released from the pressure without being released from the pressure in the electric furnace, and a good physical connection is realized by releasing the pressure. it can.

【0051】また、紫外線10を照射した後に電気炉を
使用する必要は生じるが、上記従来例を示す図8とは異
なり、突起電極12a〜12cの周囲の樹脂の硬化によ
り半導体素子5と配線基板1とが仮固定された状態とな
り大掛りな加圧治具を必要としないため、ハンドリング
性が低下することはない。さらに、電気炉のみを使用し
て樹脂を硬化する場合に較べてその硬化時間も短いもの
であるため、生産性が低下することもない。
Although it is necessary to use an electric furnace after irradiating the ultraviolet rays 10, unlike the conventional example shown in FIG. 8, the semiconductor element 5 and the wiring board are hardened by curing the resin around the protruding electrodes 12a to 12c. 1 is temporarily fixed and does not require a large pressurizing jig, so that the handleability does not decrease. Furthermore, since the curing time is shorter than when the resin is cured using only an electric furnace, productivity does not decrease.

【0052】また、上記(実施の形態2)では凸部13
a,13bを半導体素子5の裏面に形成したが、本発明
はこれに限定されるものではなく、配線基板1の側に形
成しても同様の効果が得られる。
In the above (Embodiment 2), the protrusion 13
Although a and 13b are formed on the back surface of the semiconductor element 5, the present invention is not limited to this, and similar effects can be obtained by forming them on the wiring substrate 1 side.

【0053】また、上記(実施の形態2)では、凸部1
3a,13bを円柱形状としたが、本発明はこれに限定
されるものではなく、例えば凸部13a,13bの形状
を三角柱にしてその頂点を入射光に対して配置する、あ
るいはその形状を四角柱として角部を入射光に対して配
置し、入射光を突起電極12a,12bの背面に反射す
るよう構成しても良い。
In the above (Embodiment 2), the protrusion 1
3a and 13b are cylindrical, but the present invention is not limited to this. For example, the shapes of the protrusions 13a and 13b may be triangular prisms and their vertices may be arranged with respect to incident light, or the shape may be four. The prism may be configured such that a corner portion is arranged for incident light and the incident light is reflected on the back surfaces of the protruding electrodes 12a and 12b.

【0054】[0054]

【発明の効果】以上のように本発明の半導体装置による
と、配線基板に半導体素子を実装する絶縁性接着樹脂を
光硬化型樹脂とするとともに、半導体素子の突起電極を
光透過性の材料で形成することで、突起電極の周囲の絶
縁性接着樹脂を完全に硬化し、突起電極と配線パターン
との電気的接続を良好で信頼性の高いものとすることが
できる。
As described above, according to the semiconductor device of the present invention, the insulating adhesive resin for mounting the semiconductor element on the wiring board is made of a photocurable resin, and the projecting electrodes of the semiconductor element are made of a light transmitting material. By forming, the insulating adhesive resin around the protruding electrode can be completely cured, and the electrical connection between the protruding electrode and the wiring pattern can be made good and highly reliable.

【0055】あるいは、半導体素子の突起電極を光透過
性の材料で形成する代りに配線基板と半導体素子の裏面
との間で半導体素子の前記突起電極よりも半導体素子の
外周部から内側に配設されて半導体素子の外周部から入
射した光を前記突起電極の背面に反射させる凸部を設け
ることによっても上記と同様の効果が得られる。
Alternatively, instead of forming the protruding electrodes of the semiconductor element from a light-transmitting material, the protruding electrodes of the semiconductor element are disposed between the wiring substrate and the back surface of the semiconductor element inward from the outer peripheral portion of the semiconductor element. The same effect as described above can also be obtained by providing a convex portion for reflecting light incident from the outer peripheral portion of the semiconductor element on the back surface of the bump electrode.

【0056】このような半導体装置は、ガラスなどの透
明基板よりも強度の高いセラミックやガラスエポキシか
らなる不透明基板を使用することができるため、耐久性
の良い半導体装置とすることができる。
Since such a semiconductor device can use an opaque substrate made of ceramic or glass epoxy, which has higher strength than a transparent substrate such as glass, a semiconductor device having good durability can be obtained.

【0057】また、本発明の半導体装置の製造方法によ
ると、半導体素子の外周部から前記基板と前記半導体素
子の間に光源から光を照射して、半導体素子の外周部と
前記突起電極の間の前記絶縁性接着樹脂を硬化させると
ともに、前記光の入射方向に対して前記突起電極の背面
の前記絶縁性接着樹脂を前記突起電極を透過した光で硬
化させて半導体素子を基板に位置固定することで、上記
の半導体装置が容易に実現できる。
According to the method of manufacturing a semiconductor device of the present invention, light is emitted from a light source between the substrate and the semiconductor element from an outer peripheral portion of the semiconductor element, and a light is irradiated between the outer peripheral portion of the semiconductor element and the projecting electrode. Curing the insulating adhesive resin, and curing the insulating adhesive resin on the back surface of the projecting electrode with the light transmitted through the projecting electrode in the incident direction of the light to fix the position of the semiconductor element to the substrate. Thus, the above-described semiconductor device can be easily realized.

【0058】あるいは、半導体素子の外周部から前記基
板と前記半導体素子の間に光源から光を照射して、半導
体素子の外周部と前記突起電極の間の前記絶縁性接着樹
脂を硬化させるとともに、前記光の入射方向に対して前
記突起電極の背面の前記絶縁性接着樹脂を、前記基板と
半導体素子の裏面との間で半導体素子の前記突起電極よ
りも半導体素子の外周部から内側に配設された凸部で半
導体素子の外周部から入射した光を前記突起電極の背面
に反射させて硬化させ半導体素子を基板に位置固定する
ことで、上記の半導体装置が容易に実現できる。
Alternatively, light is irradiated from a light source from the outer periphery of the semiconductor element to between the substrate and the semiconductor element to cure the insulating adhesive resin between the outer periphery of the semiconductor element and the protruding electrode. The insulating adhesive resin on the back surface of the protruding electrode with respect to the incident direction of the light is provided between the substrate and the back surface of the semiconductor device inside the outer periphery of the semiconductor device with respect to the protruding electrode of the semiconductor device. The semiconductor device described above can be easily realized by fixing the semiconductor element to the substrate by reflecting the light incident from the outer peripheral portion of the semiconductor element to the rear surface of the protruding electrode and curing the semiconductor element on the substrate.

【0059】上記のような半導体装置の製造方法による
と、加圧治具を少なくしてハンドリング性を向上させ、
加圧時間を短縮して生産性を良好にし、しかも大掛りな
設備を必要としないためコストの削減を図ることができ
る。
According to the method of manufacturing a semiconductor device as described above, the handling efficiency is improved by reducing the number of pressing jigs,
The pressurizing time is shortened to improve the productivity, and the cost can be reduced because no large-scale equipment is required.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(実施の形態1)における半導体素子の実装工
程を示す図
FIG. 1 is a diagram showing a mounting step of a semiconductor element in (Embodiment 1);

【図2】(実施の形態1)における半導体素子と配線パ
ターンとの接続状態を示す一部拡大図
FIG. 2 is a partially enlarged view showing a connection state between a semiconductor element and a wiring pattern in Embodiment 1;

【図3】(実施の形態1)における突起電極近傍の紫外
線の照射状況を示す模式図
FIG. 3 is a schematic view showing an irradiation state of ultraviolet rays near a protruding electrode in (Embodiment 1).

【図4】(実施の形態1)における突起電極と配線パタ
ーンとの接続状況を示す一部拡大図
FIG. 4 is a partially enlarged view showing a connection state between a protruding electrode and a wiring pattern in the first embodiment.

【図5】(実施の形態1)における突起電極と配線パタ
ーンとの接続状況を示す一部拡大図
FIG. 5 is a partially enlarged view showing a connection state between a protruding electrode and a wiring pattern in the first embodiment.

【図6】(実施の形態2)における突起電極近傍の紫外
線の照射状況を示す模式図
FIG. 6 is a schematic diagram showing an irradiation state of ultraviolet rays near a protruding electrode in (Embodiment 2).

【図7】従来の紫外線硬化型樹脂を用いた半導体素子の
実装工程を示す図
FIG. 7 is a view showing a mounting process of a semiconductor element using a conventional ultraviolet curable resin.

【図8】従来の熱硬化型樹脂を用いた半導体素子の実装
工程を示す図
FIG. 8 is a diagram showing a mounting process of a semiconductor element using a conventional thermosetting resin.

【符号の説明】[Explanation of symbols]

1 配線基板 2 不透明基板 3a,3b 配線パターン 4 紫外線硬化型樹脂 5 半導体素子 6a,6b 突起電極 7,8 加圧治具 9 紫外線照射器 10 紫外線 11 導体薄膜 12a,12b 突起電極 13a,13b 凸部 DESCRIPTION OF SYMBOLS 1 Wiring board 2 Opaque board 3a, 3b Wiring pattern 4 Ultraviolet curing resin 5 Semiconductor element 6a, 6b Protruding electrode 7, 8 Pressure jig 9 Ultraviolet irradiator 10 Ultraviolet 11 Conductive thin film 12a, 12b Protruding electrode 13a, 13b Convex part

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】基板に形成された配線パターンの上に、実
装すべき半導体素子の裏面に形成された突起電極を当接
させて電気的に接続し、前記基板と半導体素子の裏面と
の間に介装された絶縁性接着樹脂によって半導体素子を
基板に位置固定した半導体装置において、 前記絶縁性接着樹脂を光硬化型樹脂とするとともに、 半導体素子の前記突起電極を光透過性の材料で形成した
半導体装置。
1. A semiconductor device to be mounted is electrically connected to a wiring pattern formed on a substrate by bringing a protruding electrode formed on the back surface of a semiconductor element to be mounted into contact with the wiring pattern. In a semiconductor device in which a semiconductor element is fixed to a substrate by an insulating adhesive resin interposed therebetween, the insulating adhesive resin is a photocurable resin, and the projecting electrodes of the semiconductor element are formed of a light-transmitting material. Semiconductor device.
【請求項2】基板に形成された配線パターンの上に、実
装すべき半導体素子の裏面に形成された突起電極を当接
させて電気的に接続し、前記基板と半導体素子の裏面と
の間に介装された絶縁性接着樹脂によって半導体素子を
基板に位置固定した半導体装置において、 前記絶縁性接着樹脂を光硬化型樹脂とするとともに、 前記基板と半導体素子の裏面との間で半導体素子の前記
突起電極よりも半導体素子の外周部から内側に配設され
て半導体素子の外周部から入射した光を前記突起電極の
背面に反射させる凸部を設けた半導体装置。
2. A wiring pattern formed on a substrate is electrically connected to a protruding electrode formed on a back surface of a semiconductor element to be mounted on the wiring pattern formed between the substrate and the back surface of the semiconductor element. In a semiconductor device in which a semiconductor element is fixed to a substrate by an insulating adhesive resin interposed therebetween, the insulating adhesive resin is a photocurable resin, and the semiconductor element is disposed between the substrate and the back surface of the semiconductor element. A semiconductor device provided with a convex portion disposed on the inner side from the outer peripheral portion of the semiconductor element with respect to the protruding electrode and reflecting light incident from the outer peripheral portion of the semiconductor element to the back surface of the protruding electrode.
【請求項3】突起電極の先端で配線パターンとの接触面
に、突起電極の材質よりも低抵抗の材質の薄膜層を形成
した請求項1記載の半導体装置。
3. The semiconductor device according to claim 1, wherein a thin film layer made of a material having a lower resistance than the material of the projecting electrode is formed on a contact surface of the projecting electrode with a wiring pattern at a tip end.
【請求項4】半導体素子の外周部から入射した光を突起
電極の背面に反射させる凸部を、半導体素子の裏面に設
けた請求項2記載の半導体装置。
4. The semiconductor device according to claim 2, wherein a convex portion for reflecting light incident from an outer peripheral portion of the semiconductor element to a rear surface of the projection electrode is provided on a rear surface of the semiconductor element.
【請求項5】基板に形成された配線パターンの上に、実
装すべき半導体素子の裏面に形成された突起電極を当接
させて電気的に接続し、前記基板と半導体素子の裏面と
の間に介装された絶縁性接着樹脂によって半導体素子を
基板に位置固定した半導体装置を製造するに際し、 基板の前記半導体素子の実装位置に光硬化型の絶縁性接
着樹脂を供給し、 半導体素子の裏面に形成された光透過性の突起電極を前
記基板の側に向けて前記基板の配線パターンの上に半導
体素子の突起電極を当接させて電気的に接続し、 半導体素子の外周部から前記基板と前記半導体素子の間
に光源から光を照射して、半導体素子の外周部と前記突
起電極の間の前記絶縁性接着樹脂を硬化させるととも
に、前記光の入射方向に対して前記突起電極の背面の前
記絶縁性接着樹脂を前記突起電極を透過した光で硬化さ
せ半導体素子を基板に位置固定する半導体装置の製造方
法。
5. A wiring pattern formed on a substrate, and a protruding electrode formed on a back surface of a semiconductor element to be mounted is brought into contact with and electrically connected to the wiring pattern formed between the substrate and the back surface of the semiconductor element. When manufacturing a semiconductor device in which a semiconductor element is fixed to a substrate by an insulating adhesive resin interposed in the substrate, a photocurable insulating adhesive resin is supplied to a mounting position of the semiconductor element on the substrate, and a back surface of the semiconductor element is provided. The protruding electrode of the semiconductor element is brought into contact with the protruding electrode of the semiconductor element on the wiring pattern of the substrate with the light-transmitting protruding electrode formed on the substrate facing the substrate and electrically connected to the substrate. Irradiating light from a light source between the semiconductor element and the semiconductor element to cure the insulating adhesive resin between the outer peripheral portion of the semiconductor element and the projecting electrode, and the back surface of the projecting electrode with respect to the light incident direction. The insulating connection of The method of manufacturing a semiconductor device for position fixing the resin to the semiconductor element on the substrate is cured with light transmitted through the projection electrodes.
【請求項6】基板に形成された配線パターンの上に、実
装すべき半導体素子の裏面に形成された突起電極を当接
させて電気的に接続し、前記基板と半導体素子の裏面と
の間に介装された絶縁性接着樹脂によって半導体素子を
基板に位置固定した半導体装置を製造するに際し、 基板の前記半導体素子の実装位置に光硬化型の絶縁性接
着樹脂を供給し、 半導体素子の裏面に形成された光透過性の突起電極を前
記基板の側に向けて前記基板の配線パターンの上に半導
体素子の突起電極を当接させて電気的に接続し、 半導体素子の外周部から前記基板と前記半導体素子の間
に光源から光を照射して、半導体素子の外周部と前記突
起電極の間の前記絶縁性接着樹脂を硬化させるととも
に、前記光の入射方向に対して前記突起電極の背面の前
記絶縁性接着樹脂を、前記基板と半導体素子の裏面との
間で半導体素子の前記突起電極よりも半導体素子の外周
部から内側に配設された凸部で半導体素子の外周部から
入射した光を前記突起電極の背面に反射させて硬化させ
半導体素子を基板に位置固定する半導体装置の製造方
法。
6. A wiring pattern formed on a substrate, and a protruding electrode formed on a back surface of a semiconductor element to be mounted is brought into contact with and electrically connected to the wiring pattern formed between the substrate and the back surface of the semiconductor element. When manufacturing a semiconductor device in which a semiconductor element is fixed to a substrate by an insulating adhesive resin interposed in the substrate, a photocurable insulating adhesive resin is supplied to a mounting position of the semiconductor element on the substrate, and a back surface of the semiconductor element is provided. The protruding electrode of the semiconductor element is brought into contact with the protruding electrode of the semiconductor element on the wiring pattern of the substrate with the light-transmitting protruding electrode formed on the substrate facing the substrate and electrically connected to the substrate. Irradiating light from a light source between the semiconductor element and the semiconductor element to cure the insulating adhesive resin between the outer peripheral portion of the semiconductor element and the projecting electrode, and the back surface of the projecting electrode with respect to the light incident direction. The insulating connection of The resin is provided between the substrate and the back surface of the semiconductor element, and a projection provided on the inside of the outer periphery of the semiconductor element with respect to the projection electrode of the semiconductor element. A method of manufacturing a semiconductor device in which a semiconductor element is fixed on a substrate by being reflected on the back surface of the substrate and cured.
JP31382098A 1998-11-05 1998-11-05 Semiconductor device and manufacture thereof Pending JP2000150571A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31382098A JP2000150571A (en) 1998-11-05 1998-11-05 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31382098A JP2000150571A (en) 1998-11-05 1998-11-05 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JP2000150571A true JP2000150571A (en) 2000-05-30

Family

ID=18045915

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31382098A Pending JP2000150571A (en) 1998-11-05 1998-11-05 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JP2000150571A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011082582A (en) * 2011-01-25 2011-04-21 Sony Chemical & Information Device Corp Method of manufacturing connection structure, method of anisotropic conductive connection, and connection structure
JP2014103378A (en) * 2012-07-06 2014-06-05 Hitachi Chemical Co Ltd Semiconductor device manufacturing method, semiconductor device and application device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011082582A (en) * 2011-01-25 2011-04-21 Sony Chemical & Information Device Corp Method of manufacturing connection structure, method of anisotropic conductive connection, and connection structure
JP2014103378A (en) * 2012-07-06 2014-06-05 Hitachi Chemical Co Ltd Semiconductor device manufacturing method, semiconductor device and application device

Similar Documents

Publication Publication Date Title
JP2730357B2 (en) Electronic component mounted connector and method of manufacturing the same
WO2010050209A1 (en) Method and apparatus for bonding electronic component and flexible film substrate
JPH03290936A (en) Method of mounting semiconductor device
JP2002246418A (en) Method for mounting semiconductor element and optical information processing unit
JP2744476B2 (en) Semiconductor device and manufacturing method thereof
JP2000150571A (en) Semiconductor device and manufacture thereof
JP4241457B2 (en) Manufacturing method of light emitting element with lens
JP5449041B2 (en) Optical device manufacturing method
JPH0282633A (en) Mounting structure of semiconductor element
JP2903697B2 (en) Semiconductor device manufacturing method and semiconductor device manufacturing apparatus
JPH07101691B2 (en) Method of forming electrodes
CN101562144B (en) Method for manufacturing a semiconductor device, method and structure for mounting the semiconductor device
JPS62132331A (en) Manufacture of semiconductor device
JPS62252946A (en) Manufacture of semiconductor device
JP3287871B2 (en) Printed circuit board manufacturing method
JP3167907B2 (en) Method and apparatus for bonding solar cell and cover glass
JP2532720B2 (en) Circuit board and semiconductor device
JP3270773B2 (en) Semiconductor element mounting method
JPH0671027B2 (en) Semiconductor element mounting method
JPH03195033A (en) Manufacture of semiconductor device
US20230027892A1 (en) Electronic device and its repair method
JPH11223819A (en) Production of liquid crystal display device
JP3238256B2 (en) Semiconductor device, image sensor device, and manufacturing method thereof
JPS63240036A (en) Manufacture of semiconductor device
JPH0671029B2 (en) Semiconductor device mounting method