JP2000101068A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a method of manufacturing a semiconductor device which can be scaled down with avoiding deteriorating the reliability of the element. SOLUTION: The manufacturing method comprises forming a polycrystalline Si film 3 through a gate oxide film 2 on a semiconductor substrate 1, patterning a photo resist 6 on a forming region 4 of the polycrystalline Si film 3, implanting an impurity ion 7 in a non-forming region 5 of the polycrystalline Si film 3, using the photoresist 6 as a mask, heat-treating to diffuse the impurity ion 7 into the forming region 4, etching and removing the non-forming region 5 with the photoresist 6 used as a mask, and forming a gate electrode wiring 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device such as a MOS transistor.

[0002]

2. Description of the Related Art In recent years, with the miniaturization of semiconductor elements, it has become necessary to reduce the chip area. To that end, the processing dimensions and pitch must be reduced. FIG. 8 shows a cross-sectional structure of a gate electrode wiring of a semiconductor device.
As shown in FIG. 8, even if the processing size and the pitch are reduced, the aspect ratio (element height / element interval) in embedding becomes large unless the height of the gate electrode wiring 23 is reduced.
It is difficult to bury the interlayer insulating film 24 between the elements. Furthermore, even when the contact holes 25 are formed on the source and the drain by dry etching, radicals required for etching do not enter the lower part of the contact holes because the aspect ratio (hole height / hole diameter) in dry etching is large. , Making etching very difficult. Therefore, it is necessary to reduce the height of the gate electrode wiring 23.

A gate electrode wiring 23 is formed on a semiconductor substrate 21 via a gate oxide film 22 of a silicon oxide film as shown in FIG. 9, and as shown in FIG. 10, a polycrystalline silicon film 23 'is formed. Is formed by implanting impurity ions 26 so as to have conductivity, and then removing portions 27 other than the formation region of the gate electrode wiring.

[0004]

However, when the height of the gate electrode wiring 23 (the height of the polycrystalline silicon film 23 ') is reduced in accordance with the reduction of the processing size and the pitch, the implantation of the impurity ions 26 is difficult. Since the polycrystalline silicon film 23 'is thin, impurity ions 26 penetrate through the gate oxide film 22. Through this penetration, the gate oxide film 22
And the reliability of the semiconductor device is greatly reduced.

An object of the present invention is to provide a method of manufacturing a semiconductor device which can be miniaturized while preventing a decrease in element reliability.

[0006]

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a polycrystalline silicon film on a semiconductor substrate via a gate oxide film; The impurity in the gate electrode wiring non-forming region is diffused to the gate electrode wiring forming region by heat treatment to make the gate electrode wiring forming region conductive, and the gate electrode wiring non-forming region is removed. To form a gate electrode wiring.

According to the method of manufacturing a semiconductor device according to the first aspect of the present invention, impurities are implanted into the gate electrode wiring non-forming region of the polycrystalline silicon film, and heat treatment is performed to remove impurities in the gate electrode wiring non-forming region. Since the gate electrode wiring formation region is made conductive by diffusing it to the gate electrode wiring formation region, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurities are implanted even if the polycrystalline silicon film is thinned.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device.
A polycrystalline silicon film is formed on a semiconductor substrate via a gate oxide film, a mask is formed on a gate electrode wiring forming region of the polycrystalline silicon film, and a gate electrode wiring non-forming region of the polycrystalline silicon film is formed using the mask. The impurity in the gate electrode wiring non-forming region is diffused to the gate electrode wiring forming region by heat treatment to make the gate electrode wiring forming region conductive, and the gate electrode wiring non-forming region is formed using a mask. The gate electrode wiring is formed by etching and removing.

According to the method of manufacturing a semiconductor device of the present invention, impurities are implanted into the gate electrode wiring non-forming region of the polycrystalline silicon film, and the impurities in the gate electrode wiring non-forming region are removed by heat treatment. Since the gate electrode wiring formation region is made conductive by diffusing it to the gate electrode wiring formation region, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurities are implanted even if the polycrystalline silicon film is thinned.

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device.
A polycrystalline silicon film is formed on a semiconductor substrate via a gate oxide film, and a first photoresist is patterned on a region where a gate electrode wiring forming region of the polycrystalline silicon film is enlarged in a plane parallel to the semiconductor substrate. Impurity ions are implanted into regions other than the enlarged region of the polycrystalline silicon film using the patterned first photoresist as a mask, and the impurity ions in regions other than the enlarged region by heat treatment are introduced into the gate electrode wiring formation region. To make the gate electrode wiring formation region conductive, remove the first photoresist,
Patterning a second photoresist on a gate electrode wiring formation region and forming a gate electrode wiring by etching and removing a gate electrode wiring non-forming region of a polycrystalline silicon film using the patterned second photoresist as a mask; It is.

According to the method of manufacturing a semiconductor device according to the third aspect, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurity ions are implanted even if the polycrystalline silicon film is thinned. Further, since the first photoresist is patterned and an impurity ion is implanted in a region where the gate electrode wiring formation region of the polycrystalline silicon film is enlarged in a plane parallel to the semiconductor substrate, the gate electrode wiring formation region and the gate electrode are formed. It is possible to reliably prevent the gate oxide film near the boundary of the wiring non-forming region from being deteriorated when impurity ions are implanted.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device.
A polycrystalline silicon film and an insulating film are sequentially formed on a semiconductor substrate via a gate oxide film, and the insulating film is patterned on a gate electrode wiring formation region of the polycrystalline silicon film, and the patterned insulating film is masked. Implant impurity ions into the gate electrode wiring non-forming region of the polycrystalline silicon film as
Heat treatment is performed to diffuse the impurity ions in the gate electrode wiring non-forming region to the gate electrode wiring forming region to make the gate electrode wiring forming region conductive, and to form the gate electrode wiring non-forming region using the patterned insulating film as a mask. The gate electrode wiring is formed by etching and removing.

Note that a silicon oxide film or a silicon nitride film is used as the insulating film. According to the method of manufacturing a semiconductor device according to the fourth aspect, even if the polycrystalline silicon film is thinned, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurity ions are implanted. A method of manufacturing a semiconductor device according to claim 7, wherein a polycrystalline silicon film and a first insulating film are sequentially formed on a semiconductor substrate via a gate oxide film, and the polycrystalline silicon film is formed on a gate electrode wiring formation region of the polycrystalline silicon film. Patterning the first insulating film, forming a second insulating film on the polycrystalline silicon film and the patterned first insulating film;
Forming a sidewall on the side surface of the patterned first insulating film by etching the insulating film, and using the patterned first insulating film and the side wall as a mask to form a gate electrode wiring of a polycrystalline silicon film. Impurity ions are implanted into the formation region, and heat treatment is performed to diffuse the impurity ions in the non-gate electrode line formation region to the gate electrode line formation region, thereby making the gate electrode line formation region conductive, removing sidewalls, and patterning. The gate electrode wiring is formed by removing the region where the gate electrode wiring is not formed by etching using the formed first insulating film as a mask.

Note that a silicon oxide film or a silicon nitride film is used for the first insulating film or the second insulating film.
According to the method of manufacturing a semiconductor device of the present invention, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurity ions are implanted even if the polycrystalline silicon film is thinned.
Furthermore, since the first insulating film is patterned on the gate electrode wiring forming region of the polycrystalline silicon film and sidewalls are formed on the side surfaces of the first insulating film and impurity ions are implanted, the gate electrode wiring is formed. It is possible to reliably prevent the gate oxide film near the boundary between the region and the region where the gate electrode wiring is not formed from deteriorating when impurity ions are implanted.

According to a tenth aspect of the present invention, in the method of manufacturing a semiconductor device, a polycrystalline silicon film, a metal film, and an insulating film are sequentially formed on a semiconductor substrate via a gate oxide film, and a gate electrode wiring of the polycrystalline silicon film is formed. Patterning the insulating film on the region, patterning the metal film using the patterned insulating film as a mask, and using the patterned insulating film and the metal film as a mask to form impurities in the gate electrode wiring non-formed region of the polycrystalline silicon film. Ions are implanted, and heat treatment is performed to diffuse impurity ions in the gate electrode wiring non-forming region to the gate electrode wiring forming region, thereby making the gate electrode wiring forming region conductive, and using the patterned insulating film as a mask to form the gate electrode. The gate electrode wiring is formed by removing the wiring non-forming region by etching.

According to the semiconductor device manufacturing method of the present invention, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurity ions are implanted even if the polycrystalline silicon film is thinned. Further, since the metal film is patterned on the gate electrode wiring formation region of the polycrystalline silicon film, the conductivity of the gate electrode wiring is improved. 12. The method of manufacturing a semiconductor device according to claim 11, wherein a polycrystalline silicon film and a thin insulating film having a thickness of about 20 nm are sequentially formed on the semiconductor substrate via a gate oxide film, and a gate electrode wiring of the polycrystalline silicon film is formed. A thin insulating film is patterned on the region, and impurity ions are implanted into the gate electrode wiring non-forming region and the gate electrode wiring forming region of the polycrystalline silicon film using the patterned thin insulating film as a mask, and heat treatment is performed. The impurity ions in the non-electrode wiring formation region are diffused to the gate electrode wiring formation region, and the impurity ions in the upper portion of the gate electrode wiring formation region are diffused in the direction of the gate oxide film to make the gate electrode wiring formation region conductive and patterned. The gate electrode wiring is formed by etching away the region where the gate electrode wiring is not formed using the thin insulating film as a mask.

According to the semiconductor device manufacturing method of the present invention, the gate oxide film in the gate electrode wiring formation region does not deteriorate even when the impurity ions are implanted even if the polycrystalline silicon film is thinned. Further, by implanting impurity ions using the thin insulating film patterned on the gate electrode wiring formation region of the polycrystalline silicon film as a mask, the impurity ions are formed not only in the gate electrode wiring non-formation region but also in the upper portion of the gate electrode wiring formation region. Is implanted, and the conductivity of the gate electrode wiring is improved.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment A first embodiment of the present invention will be described with reference to FIG. FIG. 1 shows a process chart for forming a gate electrode wiring of a MOS transistor. In FIG. 1A, a 5 nm gate oxide film 2 serving as an insulating layer and a 100 nm polycrystalline silicon film 3 serving as a wiring forming layer are deposited on a semiconductor (silicon) substrate 1. A region indicated by a dotted line in the polycrystalline silicon film 3 is a gate electrode wiring formation region (formation region) 4, and the other region is a gate electrode wiring non-formation region (non-formation region) 5.

In FIG. 1B, a photoresist 6 is patterned on the formation region 4 by using a lithography technique.
Using the patterned photoresist 6 as a mask, n-type (for example, phosphorus) or p-type (for example, boron) impurity ions (in this embodiment, n-type) are implanted into the non-formation region 5 of the polycrystalline silicon film 3 by ion implantation. (Type impurity ions) 7 to make the non-formed region 5 conductive.

In FIG. 1C, by performing the heat treatment at 750 ° C., the impurity ions 7 in the non-forming region 5 diffuse laterally to the forming region 4, and the forming region 4 also becomes conductive. FIG.
4D, the non-formed region 5 in the polycrystalline silicon film 3 is formed using the patterned photoresist 6 as a mask.
Is removed by dry etching, and the photoresist 6 is removed.
Is removed to form a gate electrode wiring 9 including the conductive formation region 4.

According to the method of manufacturing a semiconductor device having the above-described structure, the impurity ions 7 are implanted into the non-formation region 5 of the polycrystalline silicon film 3 and then subjected to a heat treatment. 7 is diffused to the formation region 4 to make the formation region 4 conductive.
Even when the thickness is reduced, the gate oxide film 2 in the formation region 4 does not deteriorate when the impurity ions 7 are implanted, and miniaturization can be achieved without lowering the reliability of the device.

The mask to be used is not limited to a photoresist, and the impurities to be implanted are not limited to impurity ions. Second Embodiment FIGS. 2 and 3 show a second embodiment of the present invention.
This will be described with reference to FIG. FIG. 2 shows a process chart of forming a gate electrode wiring of a MOS transistor.

In FIG. 2A, after forming a 5 nm gate oxide film 2 on a semiconductor (silicon) substrate 1 by thermal oxidation,
1 by CVD (Low Pressure Chemical Vapor Deposition) method
A polycrystalline silicon film 3 of 00 nm is deposited. A region indicated by a dotted line in the polycrystalline silicon film 3 is a gate electrode wiring formation region (formation region) 4, and the other region is a gate electrode wiring non-formation region (non-formation region) 5.

In FIG. 2B, a first photoresist 10 is patterned by lithography on a region 11 in which the formation region 4 is enlarged by 0.07 μm in the X and Y directions as shown in FIG. , Its patterned first
Using the photoresist 10 as a mask, n-type (for example, phosphorus) or p-type (for example, boron) impurity ions (in this embodiment, n-type) are ion-implanted into regions other than the enlarged region 11 of the polycrystalline silicon film 3. Type impurity ion)
Inject 7

In FIG. 2C, a heat treatment at about 750 ° C. is performed to diffuse the impurity ions 7 in the polycrystalline silicon film 3 from the region other than the enlarged region 11 to the formation region 4 in the lateral direction. Sex. In FIG. 2D, the first
Of the photoresist 10 is removed by etching, and the formation region 4 is removed.
The second photoresist 1 is formed thereon using a lithography technique.
2 is patterned.

In FIG. 2E, the patterned second
Using the photoresist 12 as a mask, the non-formation region 5 of the polycrystalline silicon film 3 is removed by dry etching, and the second photoresist 12 is removed, so that the gate electrode wiring 9 comprising the conductive formation region 4 is removed. Form. According to the method of manufacturing a semiconductor device configured as described above, even if the polycrystalline silicon film 3 is thinned, the gate oxide film 2 in the formation region 4 does not deteriorate when the impurity ions 7 are implanted, and the reliability of the element is reduced. It can be miniaturized without any problem. Further, the first photoresist 1 is formed on a region 11 in which the formation region 4 of the polycrystalline silicon film 3 is enlarged in a plane parallel to the semiconductor substrate 1.
Since 0 is patterned and impurity ions 7 are implanted,
Gate oxide film 2 near the boundary between formation region 4 and non-formation region 5
Can be surely prevented from deteriorating when the impurity ions 7 are implanted.

Third Embodiment A third embodiment of the present invention will be described with reference to FIG. FIG. 4 shows a process chart for forming a gate electrode wiring of a MOS transistor. In FIG. 4A, after a 5 nm gate oxide film 2 is formed on a semiconductor (silicon) substrate 1 by thermal oxidation, LPCVD (Low Pressure Chemical Vapor) is performed.
or Deposition method, a 100 nm polycrystalline silicon film 3 is deposited, and a 100 nm silicon oxide film 13 serving as an insulating film is further deposited by an LPCVD method. A region indicated by a dotted line in the polycrystalline silicon film 3 is a gate electrode wiring formation region (formation region) 4, and the other region is a gate electrode wiring non-formation region (non-formation region) 5.

In FIG. 4B, a photoresist is patterned on the silicon oxide film 13 using a lithography technique, and the silicon oxide film 13 is dry-etched using the photoresist as a mask to form Perform patterning. In FIG. 4C, n is formed in the non-formation region 5 using the patterned silicon oxide film 13 as a mask.
A type (for example, phosphorus) or p-type (for example, boron) impurity ion (in this embodiment, an n-type impurity ion) 7 is implanted.

In FIG. 4D, a heat treatment at about 750 ° C. is performed to diffuse the impurity ions in the lateral direction from the non-forming region 5 to the forming region 4, thereby making the forming region 4 conductive. In FIG. 4E, the non-formation region 5 is formed using the silicon oxide film 13 as a mask.
Is dry-etched to remove the silicon oxide film 13 to form the gate electrode wiring 9. According to the method of manufacturing a semiconductor device configured as described above, even if the polycrystalline silicon film 3 is thinned, the gate oxide film 2 in the formation region 4 does not deteriorate when the impurity ions 7 are implanted, and the reliability of the element is reduced. It can be miniaturized without any problem.

Further, the formation region 4 of the polycrystalline silicon film 3
Impurity ions 7 are implanted into the non-formation region 5 using the silicon oxide film 13 patterned thereon as a mask, and the non-formation region 5 is removed by etching using the silicon oxide film 13 as a mask. Thus, the number of manufacturing steps can be reduced. The insulating film is a silicon oxide film 1
It is not limited to 3 but may be a silicon nitride film.

In FIG. 4A, a metal film is deposited on the polycrystalline silicon film 3 and a silicon oxide film 1 is formed.
3 is deposited, and in FIG. 4B, the silicon oxide film 13 is patterned, and then the metal film is patterned by using the patterned silicon oxide film 13 as a mask to form a metal film on the gate electrode wiring 9. This may improve conductivity.

Fourth Embodiment FIGS. 5 and 6 show a fourth embodiment of the present invention.
This will be described with reference to FIG. FIG. 5 shows a process chart of forming a gate electrode wiring of a MOS transistor. FIG.
1A, after a first silicon oxide film 13 serving as an insulating film is patterned on a formation region 4, LPCVD (Low Pressurization) is performed.
e Chemical Vapor Deposition) method to become an insulating film 50
A second silicon oxide film 14 of nm is deposited.

In FIG. 5B, the second silicon oxide film 1
4 is anisotropically dry-etched to form side walls 14 ′ of the silicon oxide film on the side surfaces of the patterned first silicon oxide film 13. In FIG. 5C, n is formed in the non-formation region 5 using the patterned first silicon oxide film 13 and the side wall 14 'as a mask.
A type (for example, phosphorus) or p-type (for example, boron) impurity ion (in this embodiment, an n-type impurity ion) 7 is implanted.

In FIG. 5D, after removing the side wall 14 ', a heat treatment at about 750 ° C. is performed to diffuse the impurity ions from the non-formation region 5 to the formation region 4 in the lateral direction, thereby making the formation region 4 conductive. I do. In FIG. 5E, the non-formation region 5 is dry-etched using the first silicon oxide film 13 as a mask, the first silicon oxide film 13 is removed, and the gate electrode wiring 9 is formed.

According to the method of manufacturing the semiconductor device thus configured, even if the polycrystalline silicon film 3 is thinned, the gate oxide film 2 in the formation region 4 does not deteriorate when the impurity ions 7 are implanted. Miniaturization can be achieved without reducing the density. Further, the first silicon oxide film 13 is patterned on the formation region 4 of the polycrystalline silicon film 3 and the first silicon oxide film 13 is formed.
Since the side wall 14 'is formed on the side surface of the silicon oxide film 13 and the impurity ions 7 are implanted, the gate oxide film 2 near the boundary between the formation region 4 and the non-formation region 5 deteriorates when the impurity ions 7 are implanted. Can be reliably prevented. That is, as shown in FIG.
If there is no 4 ', the impurity ions 7 are implanted by using only the first silicon oxide film 13 as a mask.
May penetrate the gate oxide film 2 near the boundary between the formation region 4 and the non-formation region 5, and the gate oxide film 2 in the formation region 4 may be deteriorated. However, the formation of the sidewalls 14 'solves such a problem. Disappears.

The first and second insulating films are not limited to the silicon oxide films 13 and 14, but may be silicon nitride films. Fifth Embodiment A fifth embodiment of the present invention will be described with reference to FIG. FIG. 7 shows a process chart of forming a gate electrode wiring of a MOS transistor.

In FIG. 7A, after a 5 nm gate oxide film 2 is formed on a semiconductor (silicon) substrate 1 by thermal oxidation,
1 by PCVD (Low Pressure Chemical Vapor Deposition) method
A polycrystalline silicon film 3 having a thickness of 00 nm is deposited, and a thin silicon nitride film 15 having a thickness of 20 nm serving as a thin insulating film is deposited by LPCVD. A region indicated by a dotted line in the polycrystalline silicon film 3 is a gate electrode wiring formation region (formation region) 4, and the other region is a gate electrode wiring non-formation region (non-formation region) 5.

In FIG. 7B, a photoresist is patterned on the formation region 4 in the polycrystalline silicon film 3 using a lithography technique, and the silicon nitride film 15 is dry-etched using the photoresist as a mask. In FIG. 7C, an n-type (for example, phosphorus) or p-type silicon nitride film 15 is used as a mask.
A type (for example, boron) impurity ion (in this embodiment, an n-type impurity ion) 7 is implanted. At this time, impurity ions 7 are implanted into the non-formation region 5 to such an extent that the impurity ions become conductive. In the formation region 4, the thin silicon nitride film 15 serves as a write stopper, and the impurity ions 7 are implanted into the upper portion of the formation region. .

In FIG. 7D, a heat treatment at about 750 ° C. is performed to diffuse the impurity ions 7 above the formation region 4 toward the gate oxide film 2 and to remove the impurity ions 7 in the non-formation region 5 from the non-formation region. 5 is diffused laterally from the formation region 4 to make the formation region 4 conductive. In FIG. 7E, the silicon nitride film 1
Using the mask 5 as a mask, the non-formation region 5 is dry-etched, the silicon nitride film 15 is removed, and the gate electrode wiring 9 is formed.

According to the method of manufacturing a semiconductor device having such a structure, the gate oxide film 2 in the formation region 4 is not deteriorated when the impurity ions 7 are implanted even if the polycrystalline silicon film 3 is thinned, and the reliability of the element is reduced. Miniaturization can be achieved without reducing the density. Further, by implanting impurity ions 7 using the thin silicon nitride film 15 patterned on the formation region 4 of the polycrystalline silicon film 3 as a mask, the non-formation region 5 is formed.
In addition, impurity ions 7 are also implanted in the upper portion of the formation region 4, and the impurity ions 7 in the formation region 4 after the heat treatment increase,
The conductivity of the gate electrode wiring 9 is improved.

It should be noted that the thin insulating film is not limited to a thin silicon nitride film having a thickness of 20 nm, but may have a thickness of about 20 nm, or may be a silicon oxide film.

[0042]

According to the method of manufacturing a semiconductor device according to the first aspect of the present invention, impurities are implanted into a region where a gate electrode wiring is not formed in a polycrystalline silicon film, and a heat treatment is performed. Since the impurity is diffused to the gate electrode wiring formation region to make the gate electrode wiring formation region conductive, even if the polycrystalline silicon film is thinned, the gate oxide film in the gate electrode wiring formation region does not deteriorate when the impurity is implanted. In addition, miniaturization can be achieved without lowering the reliability of the device.

According to the method of manufacturing a semiconductor device of the present invention, impurities are implanted into the gate electrode wiring non-forming region of the polycrystalline silicon film, and the impurities in the gate electrode wiring non-forming region are removed by heat treatment. Since the gate electrode wiring formation region is made conductive by diffusing it to the gate electrode wiring formation region, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurities are implanted even if the polycrystalline silicon film is thinned. Can be miniaturized without lowering the reliability of the device.

According to the method of manufacturing a semiconductor device according to the third aspect, even if the polycrystalline silicon film is thinned, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurity ions are implanted, and the reliability of the device is reduced. It is possible to achieve miniaturization without performing the process. Further, since the first photoresist is patterned and an impurity ion is implanted in a region where the gate electrode wiring formation region of the polycrystalline silicon film is enlarged in a plane parallel to the semiconductor substrate, the gate electrode wiring formation region and the gate electrode are formed. It is possible to reliably prevent the gate oxide film near the boundary of the wiring non-forming region from being deteriorated when impurity ions are implanted.

According to the method of manufacturing a semiconductor device of the present invention, even if the polycrystalline silicon film is thinned, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurity ions are implanted, and the reliability of the device is reduced. It is possible to achieve miniaturization without performing the process. According to the method of manufacturing a semiconductor device according to the seventh aspect, even if the polycrystalline silicon film is thinned, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurity ions are implanted, and the reliability of the element is not reduced. And miniaturization can be achieved. Furthermore, since the first insulating film is patterned on the gate electrode wiring forming region of the polycrystalline silicon film and sidewalls are formed on the side surfaces of the first insulating film and impurity ions are implanted, the gate electrode wiring is formed. It is possible to reliably prevent the gate oxide film near the boundary between the region and the region where the gate electrode wiring is not formed from deteriorating when impurity ions are implanted.

According to the method of manufacturing a semiconductor device of the present invention, even if the polycrystalline silicon film is thinned, the gate oxide film in the gate electrode wiring formation region does not deteriorate when impurity ions are implanted, and the reliability of the device is reduced. It is possible to achieve miniaturization without performing the process. Further, since the metal film is patterned on the gate electrode wiring formation region of the polycrystalline silicon film, the conductivity of the gate electrode wiring is improved.

According to the semiconductor device manufacturing method of the present invention, even if the polycrystalline silicon film is thinned, the gate oxide film in the gate electrode wiring formation region is not deteriorated when impurity ions are implanted, and the reliability of the device is reduced. It is possible to achieve miniaturization without performing the process. Further, by implanting impurity ions using the thin insulating film patterned on the gate electrode wiring formation region of the polycrystalline silicon film as a mask, the impurity ions are formed not only in the gate electrode wiring non-formation region but also in the upper portion of the gate electrode wiring formation region. Is implanted, and the conductivity of the gate electrode wiring is improved.

[Brief description of the drawings]

FIG. 1 is a manufacturing process diagram of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a manufacturing process diagram of a semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a partial plan view of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a manufacturing process diagram of a semiconductor device according to a third embodiment of the present invention.

FIG. 5 is a manufacturing process diagram of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 6 is a sectional view illustrating advantages of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 7 is a manufacturing process diagram of a semiconductor device according to a fifth embodiment of the present invention.

FIG. 8 is a sectional view of a semiconductor device in a conventional example.

FIG. 9 is a cross-sectional view of a conventional semiconductor device.

FIG. 10 is a cross-sectional view of a conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 2 gate oxide film (insulating layer) 3 polycrystalline silicon film (wiring forming layer) 4 gate electrode wiring forming region 5 gate electrode wiring non-forming region 6, 10, 12 photoresist 7 impurity ion 9 gate electrode wiring 11 gate Region in which electrode wiring formation region is enlarged 13, 14 Silicon oxide film (insulating film) 14 'Side wall 15 Thin silicon nitride film (thin insulating film)

Claims (11)

[Claims] A step of forming a polycrystalline silicon film on a semiconductor substrate via a gate oxide film; a step of selectively implanting impurities into a region of the polycrystalline silicon film where a gate electrode wiring is not formed; Diffusing the impurities in the non-gate-electrode-wiring-forming region to the gate-electrode-wiring-forming region to make the gate-electrode-wiring-forming region conductive; Forming a wiring. 2. A step of forming a polycrystalline silicon film on a semiconductor substrate via a gate oxide film, a step of forming a mask on a gate electrode wiring formation region of the polycrystalline silicon film, and using the mask Implanting an impurity into a region where the gate electrode wiring is not formed in the polycrystalline silicon film; and performing heat treatment to diffuse the impurity in the region where the gate electrode wiring is not formed to the region where the gate electrode wiring is formed. A method for manufacturing a semiconductor device, comprising: a step of making a formation region conductive; and a step of forming a gate electrode wiring by etching and removing the gate electrode wiring non-forming region using the mask. 3. A step of forming a polycrystalline silicon film on a semiconductor substrate via a gate oxide film, and forming a gate electrode wiring forming region of the polycrystalline silicon film on a region enlarged in a plane parallel to the semiconductor substrate. Patterning a first photoresist; implanting impurity ions into a region other than the enlarged region of the polycrystalline silicon film using the patterned first photoresist as a mask; Diffusing the impurity ions in a region other than the region to the gate electrode wiring formation region to make the gate electrode wiring formation region conductive; removing the first photoresist; Patterning a second photoresist on the wiring formation region, and using the patterned second photoresist as a mask Forming a gate electrode wiring by etching and removing a region where the gate electrode wiring is not formed in the polycrystalline silicon film. 4. A step of sequentially forming a polycrystalline silicon film and an insulating film on a semiconductor substrate via a gate oxide film, and patterning the insulating film on a gate electrode wiring formation region of the polycrystalline silicon film. A step of implanting impurity ions into a gate electrode wiring non-forming region of the polycrystalline silicon film using the patterned insulating film as a mask; and performing a heat treatment to remove the impurity ions in the gate electrode wiring non-forming region. Making the gate electrode wiring formation region conductive by diffusing to the gate electrode wiring formation region; and removing the gate electrode wiring non-formation region by etching using the patterned insulating film as a mask. Forming a semiconductor device. 5. The method according to claim 4, wherein the insulating film comprises a silicon oxide film. 6. The method according to claim 4, wherein the insulating film comprises a silicon nitride film. 7. A step of sequentially forming a polycrystalline silicon film and a first insulating film on a semiconductor substrate via a gate oxide film, and forming the first insulating film on a gate electrode wiring formation region of the polycrystalline silicon film. Patterning an insulating film, forming a second insulating film on the polycrystalline silicon film and the patterned first insulating film, and etching the second insulating film. The patterned first
Forming a sidewall on the side surface of the insulating film of
Using the patterned first insulating film and the sidewalls as a mask to implant impurity ions into the gate electrode wiring non-forming region of the polycrystalline silicon film; Diffusing the impurity ions to the gate electrode wiring formation region to make the gate electrode wiring formation region conductive, removing the sidewalls, and masking the patterned first insulating film. Forming a gate electrode wiring by removing the gate electrode wiring non-forming region by etching. 8. The method according to claim 7, wherein the first insulating film or the second insulating film comprises a silicon oxide film. 9. The method according to claim 7, wherein the first insulating film or the second insulating film is made of a silicon nitride film. 10. A step of sequentially forming a polycrystalline silicon film, a metal film, and an insulating film on a semiconductor substrate via a gate oxide film, and forming the insulating film on a gate electrode wiring formation region of the polycrystalline silicon film. Patterning, patterning the metal film using the patterned insulating film as a mask, and forming a gate electrode wiring non-forming region of the polycrystalline silicon film using the patterned insulating film and the metal film as a mask. Implanting impurity ions into the, and heat treatment to diffuse the impurity ions in the gate electrode wiring non-forming region to the gate electrode wiring forming region to make the gate electrode wiring forming region conductive, A step of forming a gate electrode wiring by etching and removing the gate electrode wiring non-forming region using the patterned insulating film as a mask; And a method of manufacturing a semiconductor device. 11. A step of sequentially forming a polycrystalline silicon film and a thin insulating film having a thickness of about 20 nm on a semiconductor substrate with a gate oxide film interposed therebetween, and forming the polycrystalline silicon film on a gate electrode wiring formation region of the polycrystalline silicon film. Patterning a thin insulating film; and implanting impurity ions into the gate electrode wiring non-forming region and the gate electrode wiring forming region of the polycrystalline silicon film using the patterned thin insulating film as a mask, The heat treatment is performed to diffuse the impurity ions in the non-gate electrode wiring formation region to the gate electrode wiring formation region and to diffuse the impurity ions in the upper portion of the gate electrode wiring formation region in the direction of the gate oxide film to form the gate electrode. Making the wiring forming region conductive; and forming the gate electrode wiring non-forming region using the patterned thin insulating film as a mask. The method of manufacturing a semiconductor device including the step of forming a gate electrode wiring and etching removal.