JP2000100746A - Forming of diffused layer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a method for forming a source/drain diffused layer which has low resistance. SOLUTION: This method for forming a source/drain diffused layer on a semiconductor substrate includes steps of implanting BF2 ions into the semiconductor substrate to form a diffused layer, subjecting the substrate to a first activating heat treatment at a temperature not higher than 900 deg.C in an atmosphere having low oxygen concentration of 100 ppm or less to diffuse F outward, and subjecting the substrate to a second activating heat treatment at a temperature of 900 deg.C or more in the oxygen-mixed atmosphere to form a B-doped diffused layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a method for forming a diffusion layer, and more particularly to a method for forming a diffusion layer having a low parasitic resistance, which is optimal as a source / drain region of a MOSFET.

[0002]

2. Description of the Related Art Miniaturization of semiconductor devices, especially MOSFETs
The miniaturization has contributed to an improvement in the degree of integration of transistors and an increase in operation speed. Although the operating speed is determined by the size of the carrier transfer time between the source and the drain,
The operation speed is also improved by reducing the gate length due to miniaturization. However, when the gate length is reduced to the submicron region, the influence of the parasitic resistance of the source and drain regions cannot be ignored, and improvement in the operation speed cannot be expected only by simply reducing the gate length. Therefore, in such an ultra-fine MOSFET, it is important to develop a technique for reducing the resistance of the source / drain regions.

Here, a conventional method for forming a diffusion layer will be described with reference to FIG. FIGS. 5A and 5B are cross-sectional views each showing a configuration of a substrate when a diffusion layer is formed according to a conventional method. As shown in FIG.
BF ₂ ions are implanted into the substrate 102 to form a BF implanted layer 1
01 is formed. Next, an activation heat treatment at 1000 ° C. is performed on the Si substrate 102 in an oxygen atmosphere to dissipate F outward, and as shown in FIG.
It is formed on the upper layer of the i-substrate 102.

[0004]

In the formation of a source / drain of a PMOS, a lamp heating is performed after implanting boron fluoride (BF ₂ ) or boron (B) ions to electrically activate the implanted ions. Conventionally, a process of heating a substrate temperature to about 1000 ° C. in a furnace and performing a heat treatment for several tens of seconds has been widely used.

With the miniaturization of devices, it is necessary to form a junction between source / drain regions shallowly.
In ion implantation, low acceleration implantation of several keV (kilo electron volts) or several hundred eV (electron volts) is used. Since the BF ₂ ion implantation has a higher mass number than B, it is possible to introduce B into a shallower region when the same energy is used. It is also recognized that BF ₂ implantation has an advantage that, unlike B implantation, there is little phenomenon called channeling in which ions are deeply implanted into the crystal along the crystal axis.

However, when BF ₂ ions are used, a problem has been pointed out that F is introduced into the crystal simultaneously with B, and the resistance of the diffusion layer obtained by the influence of F increases.
Further, in the activation heat treatment of implanted ions, in an oxygen-added atmosphere, the diffusion rate of B increases due to oxidation of the Si crystal surface,
Alternatively, there is a problem that the resistance of the diffusion layer increases due to the incorporation of B into the oxide film. However, when the heat treatment is performed at a high temperature required for the activation heat treatment and in a low oxygen concentration atmosphere, there is a problem of generation of particles due to etching of the substrate surface.

The present invention provides a method of solving the adverse effects of fluorine (F) and oxygen (O) to form a low-resistance source / drain diffusion layer, and using this process to improve the device performance of a PMOSFET. It is intended to improve.

[0008]

In order to achieve the above object, a method of forming a diffusion layer according to the present invention is a method of forming a diffusion layer by ion implantation into a semiconductor substrate. Implanting two-element ions into the semiconductor substrate to form a diffusion layer; and subjecting the semiconductor substrate to a first activation heat treatment at a first predetermined temperature in a low-oxygen atmosphere to remove one of the two-element ions. Dissipating in a second direction at a second predetermined temperature higher than the first predetermined temperature in an oxygen mixed atmosphere.
Applying a heat treatment for activation to the semiconductor substrate.

[0009] The method of the present invention is based on the source /
This is an optimal method for forming a diffusion layer having a low parasitic resistance as a drain region, and is a method for forming a p-type diffusion layer on the surface of a semiconductor substrate. Boron fluoride (BF) is used as the ion of the same conductivity type as the diffusion layer. ₂ ) Implant ions into the semiconductor substrate,
Performing a first activation heat treatment at a first predetermined temperature of less than 00 ° C., for example, 800 ° C., and 900 ° C. or more, for example, 1000 ° C.
A second activation heat treatment is performed at a second predetermined temperature. Also,
The oxygen concentration in the annealing furnace is adjusted by flowing an inert gas. For example, the oxygen concentration in the annealing furnace during the second activation heat treatment is adjusted by setting the ratio of the nitrogen flow rate to the oxygen flow rate to 10: 1. By removing F from the surface of the Si substrate by out-diffusion in a low oxygen concentration atmosphere, the amount of surface oxidation in the subsequent heat treatment in a high-temperature oxygen-added atmosphere can be reduced, and as a result, the resistance of the diffusion layer can be reduced.

Although the method of the present invention can be applied without limitation to the use of the diffusion layer, preferably, the diffusion layer is a source / drain region of a MOSFET.

[0011]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. Embodiment Example This embodiment is an example of an embodiment of a method for forming a diffusion layer according to the present invention. FIGS. 1A and 1B show a case where a diffusion layer is formed according to the embodiment. It is sectional drawing which shows the structure of a board | substrate. First, as shown in FIG.
For an As-doped N-type Si substrate 102 of 0 Ωcm,
Accelerate boron fluoride (BF ₂ ) ion at 5 keV, dose 1
B ions and F ions are introduced into the Si substrate surface by implantation under the condition of × 10 ¹⁴ / cm ² . Next, using a lamp heating furnace,
Nitrogen gas is introduced into the heating furnace to reduce the oxygen concentration in the furnace to 100 pp.
After controlling the substrate temperature to 800 ° C. and performing a heat treatment for 10 seconds as shown in FIG.
Outward diffusion of F on the surface.

Thereafter, the substrate temperature is raised to 1000 ° C. in an atmosphere in which a trace amount of oxygen gas is added to nitrogen gas, and a heat treatment is further performed for 10 seconds under the same gas condition to electrically activate B ions. As shown in (c), a B diffusion layer is formed.

FIG. 2 shows the relationship between the amount of added oxygen and the sheet resistance of the obtained surface B diffusion layer in the oxygen-added atmosphere heat treatment step shown in FIG. 1C. For comparison, the case of the conventional method is also described. In the conventional method, FIG.
No low-temperature heat treatment under low oxygen concentration. FIG.
From the above, it can be seen that the sheet resistance increases with an increase in the oxygen concentration. However, it was confirmed that the use of the method of the present invention enables a lower resistance to be obtained as compared with the conventional method. FIG. 3 shows the relationship between the heat treatment temperature under the low oxygen concentration in FIG. 1B and the concavities and convexities of the finally obtained surface B diffusion layer. If the heat treatment temperature exceeds 900 ° C., the surface irregularities increase significantly.

This is because the Si surface is etched by a high-temperature heat treatment under a low oxygen concentration, and the etched Si grains become particles that have a bad influence on the device process. Therefore, boron fluoride (BF ₂ )
In order to form a low-resistance diffusion layer on the Si surface by ion implantation using BF2, after performing BF ₂ ion implantation, a short-time heat treatment in a low-oxygen atmosphere at a temperature of 900 ° C. or less is performed. The fact that the process of the present invention for performing heat treatment at a high temperature of about 1000 ° C. in an oxygen-added atmosphere is excellent
It is confirmed.

The heat treatment in the oxygen-added atmosphere slightly oxidizes the surface of the Si substrate, and the implantation B is taken into the oxide film. Since B taken into the oxide film is electrically inactive, when the surface oxide thickness increases, the concentration of electrically active B in the Si crystal decreases, and the sheet resistance of the diffusion layer increases. Become. In BF ₂ injection, F is introduced simultaneously with B. Since this F accelerates the oxidation of the substrate surface during the heat treatment in the oxygen atmosphere, the implantation of BF ₂ significantly increases the diffusion layer resistance.

In this embodiment, the amount of surface oxidation in the subsequent high-temperature oxygen-added atmosphere heat treatment is reduced by removing F from the Si substrate surface by out-diffusion in advance in a low oxygen concentration atmosphere. The resistance of the diffusion layer can be reduced.

Embodiment 2 In this embodiment, a method for forming a diffusion layer according to the present invention
FIG. 4A and FIG. 4B are cross-sectional views showing the configuration of a substrate when a source / drain region is formed according to the embodiment of the present invention. is there. According to a known method, the resistivity 10
As shown in FIG. 4A, an element isolation region 202 and an N-well region are formed on a P-type Si substrate 201 having a Ωcm plane orientation (100), and then a gate insulating film 203 and a gate electrode 20 are formed.
4 is formed. Then, after implanting BF ₂ ions under the conditions of, for example, an energy of 5 keV and a dose of 2 × 10 ¹⁴ / cm ² , first, using a lamp heating furnace, nitrogen is supplied at a flow rate of 10 slm so that the oxygen concentration in the furnace is 100 ppm. After confirming that the substrate temperature has dropped to below, the substrate temperature was increased to 800 ° C.
A heat treatment is applied for a second.

Subsequently, at the same time as supplying 10 lm of nitrogen and 1 slm of oxygen into the furnace, the substrate temperature was raised to 1000 ° C. and a heat treatment was performed for 10 seconds, and as shown in FIG.
A B-doped P-type diffusion layer 205 serving as a source / drain (S / D) is formed. Hereinafter, according to a known method, MO
Form an SFET. The MO formed by the conventional method, that is, the method of not performing the low-oxygen-concentration, low-temperature heat treatment shown in FIG.
In the SFET, the P-type ions introduced into the S / D region are taken into the oxide film during a heat treatment in a later step, so that the sheet resistance of the S / D portion increases. On the other hand, in the case of this embodiment,
Oxidation in post heat treatment is suppressed, sheet resistance does not increase,
The increase in resistance in the S / D region is reduced as compared with the prior art.

For this reason, the MOS formed in this embodiment is
The device characteristics of the FET are improved. For example, a 50% improvement in on-current was confirmed. When the impurity (B) is doped into the gate electrode at the same time as the S / D is formed, F introduced into the gate electrode at the same time as B during the post-heat treatment is taken into the gate insulating film. B has been pointed out as a problem that it passes through the gate insulating film to reach the channel region and fluctuates the threshold voltage of the MOSFET. By using the method of the present embodiment, F can be diffused outward, so that the effect of solving the problem of the gate dropout of B in the conventional process was also recognized.

As shown in this embodiment, after boron fluoride (BF ₂ ) ions are implanted, a first heat treatment is performed at a substrate temperature of less than 900 ° C. in a low oxygen atmosphere, and then 900 ° C. in an oxygen mixed atmosphere. By performing the second heat treatment at the above substrate temperature, the resistance of the P type diffusion layer can be reduced. This effect is obtained because, as described above, the F concentration on the substrate surface decreases during the first heat treatment due to outward diffusion.
F has the function of accelerating the oxidation of the surface of the Si substrate during the second heat treatment. As the oxidation of the surface proceeds, B introduced by implantation is taken into the oxide film and is electrically inactivated, thereby increasing the resistance of the diffusion layer.

[0021]

According to the present invention, the amount of F on the surface is reduced by the first activation heat treatment, thereby suppressing surface oxidation during the heat treatment and increasing the concentration of active B to lower the resistance of the diffusion layer. can do. Further, by reducing the F concentration in the gate insulating film, there is an effect of suppressing the phenomenon that B passes through the gate insulating film during the heat treatment.
The effect of suppressing the threshold voltage fluctuation of T was also recognized.

[Brief description of the drawings]

FIGS. 1A to 1C are cross-sectional views each showing a configuration of a substrate when a diffusion layer is formed according to a first embodiment.

FIG. 2 is a graph showing a relationship between an oxygen concentration (%) in a heating furnace and a sheet resistance (Ω · cm) of a diffusion layer.

FIG. 3 is a graph showing a relationship between a heat treatment temperature (° C.) and a surface roughness (nm).

FIGS. 4A and 4B are cross-sectional views each showing a configuration of a substrate when a source / drain region is formed according to a second embodiment.

FIGS. 5A and 5B are cross-sectional views each showing a configuration of a substrate when a diffusion layer is formed according to a conventional method.

[Explanation of symbols]

 Reference Signs List 101 BF diffusion layer 102 Si substrate 103 Low F concentration B layer 104 B diffusion layer 201 p-type Si substrate 202 element isolation region 203 gate insulating film 204 gate electrode 205 B-doped p-type diffusion layer

Claims (7)

[Claims] 1. A method for forming a diffusion layer by implanting ions into a semiconductor substrate, comprising the steps of: implanting two element ions of the same conductivity type as the diffusion layer into the semiconductor substrate to form the diffusion layer; Subjecting the semiconductor substrate to a first activation heat treatment at a first predetermined temperature to dissipate one of the two element ions outward; and a second predetermined temperature higher than the first predetermined temperature in an oxygen-mixed atmosphere. Subjecting the semiconductor substrate to a second activation heat treatment at a temperature. 2. A method of forming a p-type diffusion layer on a surface of a semiconductor substrate, wherein boron fluoride (BF ₂ ) is used as ions of the same conductivity type as the diffusion layer.
Ions are implanted into the semiconductor substrate, a first activation heat treatment is performed at a first predetermined temperature lower than 900 ° C., and a second activation heat treatment is performed at a second predetermined temperature equal to or higher than 900 ° C. A method for forming a diffusion layer according to claim 1. 3. The method according to claim 1, wherein the oxygen concentration in the annealing furnace during the first activation heat treatment is 100 ppm or less. 4. The method according to claim 1, wherein the oxygen concentration in the annealing furnace during the second activation heat treatment is 100 ppm or more. 5. The method for forming a diffusion layer according to claim 1, wherein the oxygen concentration in the annealing furnace is adjusted by flowing an inert gas. 6. The oxygen concentration in the annealing furnace at the time of the second activation heat treatment by adjusting the ratio of the nitrogen flow rate to the oxygen flow rate to 10: 1. A method for forming a diffusion layer. 7. The method for forming a diffusion layer according to claim 1, wherein the diffusion layer is a source / drain region of a MOSFET.