JP2000080496A - Filling plating method for base material having fine pore and/or fine groove - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily execure copper plating free from voids in fine pores, grooves or the like with high efficiency without requiring special equipment, on a base material having fine pores or fine grooves, at first, by executing plating at low electric current in a short time, next increasing the electric current and executing plating to a prescribed film thickness. SOLUTION: The surface of a base material in which wiring grooves composed of fine pores and/or fine grooves with different sizes, widths and depths are formed is plated, at first, at low current density in a short time, e.g. at the average cathode current density of 0.03 to 0.5 A/dm2 for 10 sec to 10 min. In this way, the metal is precipitated to the inside of the wiring grooves. Next, the electric current is increased, and plating is executed, e.g. at the current density of about 0.5 to 10 A/dm2 to a prescribed thickness. In this way, the metal is precipitated without the clogging in the vicinities of the inlets of the pores and grooves, and the wiring grooves are filled with copper with hardly generating voids. Thus, the wiring pattern on the substrate obtd. thereby shows good copper plating volume resistivity.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for filling a substrate having fine holes and / or fine grooves, and more particularly, to a method for forming fine holes or grooves having different diameters, widths or depths. An object of the present invention is to provide a method capable of filling a hole in a substrate for a semiconductor device by electrolytic plating in a short time.

[0002]

2. Description of the Related Art Microscopic holes and / or
Alternatively, a wiring pattern is formed by fine grooves (hereinafter, referred to as “wiring grooves”). Conventionally, aluminum or an aluminum alloy has been used as a wiring material for filling the wiring grooves. However, as the degree of integration of the wiring pattern increases, the current density increases, and the temperature rises and the resulting thermal stress. As for these phenomena, problems such as disconnection due to stress migration or electromigration in aluminum or aluminum alloy used as a wiring material cannot be ignored. As means for avoiding such a problem, addition of copper to aluminum or the like, which is a wiring material, or lamination with a high-melting-point metal has been performed, but it has not been sufficient.

Therefore, in order to suppress heat generation due to energization,
Filling the wiring groove with a wiring material having better conductivity than aluminum has been studied. Copper and silver are examples of materials having a lower specific resistance than aluminum. Among them, silver is a material that is expensive, has low strength and corrosion resistance, and has the disadvantage that constituent atoms are easily diffused. Attention has been focused on copper and copper alloys.

Conventionally, as a method for embedding aluminum or the like in a wiring groove formed on the surface of a semiconductor wafer (hereinafter, referred to as a “damascene method”), there is a method using a combination of sputtering film formation and chemical dry etching. I have been. However, this method uses an aspect ratio (ratio of depth to diameter or width) in sputtering film formation.
It is difficult to fill and bury metal in fine grooves or holes for high wiring, and there is a problem that chemical etching of copper or copper alloy has not been established technically, and practical application is difficult Is determined.

On the other hand, as a technique for embedding a metal into a fine wiring groove in the damascene method, a CVD method is known, but this method cannot avoid incorporation of carbon derived from an organic material into a deposited metal layer. There was a drawback that.

As described above, the conventional damascene method cannot be applied to the case where copper or a copper alloy is used for the purpose of high integration, and development of another method has been required.

[0007] Recently, a plating method has attracted attention as a method of embedding copper or a copper alloy in fine wiring grooves on a semiconductor wafer (hereinafter referred to as "copper damascene method"). Copper electroplating has the advantages of low process cost and high film deposition rate, but on the other hand, bubbles may be generated during electrodeposition, and these bubbles remain attached to the electrodeposited surface. In this case, there is a problem that this portion becomes a void (void).

For example, when plating with a normal constant current,
At 0.5 A / dm ² or more, the deposition rate is fast, but holes and grooves with a diameter and width of 0.3 μm or less are closed near the entrance before being completely filled with plating, and There is a great risk that voids (voids) will be generated in the holes. On the other hand, 0.5 A / d
If the current is lower than m ^{2, the} fine holes can be filled, but it takes much time to fill the large holes, which is not preferable in terms of production efficiency.

[0009] Pulse plating has also been proposed.
Pulses tend to cause voids because of the flow of a large current. PR
Pulses can prevent voids under certain conditions,
In the bath using the additive, not only is it difficult to set the conditions, but also there is a risk of breaking the contact, and plating is also formed on the void side.

[0010]

SUMMARY OF THE INVENTION Under such circumstances,
There is a need for the development of a method to fill the wiring grooves on the base material by efficiently performing copper plating while preventing the generation of voids in fine grooves or holes without the need for special electrical equipment. I was

[0011]

The present inventor conducted a number of tests on the relationship between the electroplating conditions and the occurrence of voids and studied them. The inventors have found that when the current is increased after the metal is deposited, the vicinity of the entrance of the hole or groove is hardly closed and almost no void is generated, and the present invention has been completed.

That is, the present invention has a wiring groove which is characterized in that plating is first performed on a base material having a wiring groove at a low current for a short time, and then the current is increased to a predetermined film thickness. This is a plating method for filling a hole in a substrate.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION The method of the present invention is to prepare a metal plating bath containing highly conductive metal ions such as copper and silver and to make a substrate having wiring grooves conductive by a conventional method. The second plating is performed by plating for a short time with a very low current, depositing a metal into a small hole or groove, increasing the current, filling a large hole, and plating to a predetermined film thickness. .

Preferred examples of the substrate having a wiring groove to be subjected to the method of the present invention include fine holes or fine grooves having a diameter or width of 0.3 μm or less, and fine holes or fine grooves having a diameter or width larger than 0.3 μm. Is a substrate having Examples of such a base material include a logic LSI silicon wafer.

The metal plating bath containing highly conductive metal ions is not particularly limited as long as it is a metal having good conductivity which can replace aluminum in the damascene method, but a copper or silver plating bath is preferable. In view of the above, copper is particularly preferable.

In the method of the present invention, the first plating is preferably performed at a low current of about 0.03 to 0.5 A / dm ^{2 for} about 10 seconds to 10 minutes.
Further, the subsequent plating may be performed in a general condition range of a metal plating bath, and for example, plating can be performed at a current density of about 0.5 to 10 A / dm ² . In addition, the subsequent plating does not necessarily need to be performed under a constant current condition, and may be performed by increasing the current density in multiple steps or continuously.

The method of the present invention described above has a great advantage in that wiring grooves having different hole diameters and groove diameters can be easily filled with metal plating with one kind of metal plating solution, and can be used as a metal damascene method. .

[0018]

Next, the present invention will be described in more detail with reference to Examples, but the present invention is not limited to these Examples.

Example 1 Filling plating with a copper sulfate plating bath: (1) 0.13 to 0.25 μm hole, 0.5 μm deep hole, 0.5 to 1.0 μm hole diameter, 0.5 μm depth A silicon wafer substrate having a hole having a groove width of 0.13 to 0.25 μm and a depth of 0.5 μm and a groove having a groove width of 0.5 to 1.0 μm and a depth of 0.5 μm is prepared by a conventional method. After being made conductive, copper plating was performed using the following copper sulfate plating bath 1.

For the first 5 minutes, plating was performed at an average of 0.1 A / dm ² , and then plating was performed at 1 A / dm ² for 5 minutes to deposit a total of 1100 nm copper plating on the flat portion.
This base material was cut by FIB so as to include holes and grooves, and the cross section was observed by FE-SEM. As a result, no voids were generated and all the holes and grooves were filled with copper plating. Further, the volume resistivity of the copper plating measured in the average part was 1.9 μΩ.
-Cm and good.

(Copper sulfate plating bath 1) Copper sulfate pentahydrate 75 g / l Sulfuric acid 180 g / l Hydrochloric acid 0.14 ml / l (60 mg / l as chloride ion) Additive ^* 5 ml / l Bath temperature 28 ℃ * Cu-Brite THS (EBARA Eugerite Co., Ltd.)
Made)

(2) Using the following copper sulfate plating bath 2, the same substrate as used in the above (1) was subjected to copper sulfate plating. Plating at a current density of 0.05 A / dm ² for 1 minute in the beginning, the following 1 minute 0.1 A / dm ^2, and more following 1 minute 0.2 A / dm ^2, the last two minutes Is 2A / dm ²
Performed in As a result, a total of 900 nm
With copper plating.

A cross section was observed in the same manner as in the above (1). As a result, all the holes having a diameter of 0.13 μmφ, an aspect ratio of 4 and a diameter of 0.6 μm, and all the grooves having the same width were well filled without voids. . Further, the volume resistivity of the copper film is 1.85 μΩ ·
cm.

(Copper sulfate plating bath 2) Copper sulfate pentahydrate 200 g / l Sulfuric acid 60 g / l Hydrochloric acid 0.14 ml / l (60 mg / l as chlorine ion) Additive ^* 5 ml / l Bath temperature 25 ℃ * Cu-Brite THS (EBARA Eugerite Co., Ltd.)
Made)

EXAMPLE 2 Filling plating with copper pyrophosphate plating bath: The following copper pyrophosphate plating bath containing no organic additives was used.
Copper plating was performed on the same substrate as in (1) of Example 1. The plating was performed at a current density of 0.2 A / dm ² for the first 30 seconds, at 0.5 A / dm ² for the next 30 seconds, and then at 3 A / dm ^2.
The current was increased to 2 A / dm ² over 0 seconds, and plating was continued for 2 minutes. As a result, a total of about 110
Copper plating of 0 nm was deposited.

As a result of observing the cross section in the same manner as (1) of Example 1, all the holes and grooves from 0.15 to 1.0 μm of the base material were filled, and no voids were observed. .
The volume resistivity of the copper plating film is 2.0 μΩ · cm.
And good values. In addition, almost the same excellent hole filling plating was obtained when a commercially available organic additive was used in combination.

(Copper pyrophosphate plating bath) Copper pyrophosphate trihydrate 90 g / l Potassium pyrophosphate 340 g / l Ammonia water (28%) 3 ml / l Bath temperature 55 ° C. pH 8.5

Comparative Example 1 Using the copper sulfate plating bath 2 used in (2) of Example 1,
The same substrate as used in Example 1 (2) was plated at ^{2 A} / dm ² for 3 minutes. The plating thickness at the flat part is about 120
At 0 nm, the volume resistivity was 1.85 μΩ · cm.

As a result of observing the cross section after plating by FE-SEM, holes and grooves having a diameter and a width of 0.6 μm or more were satisfactorily filled, but holes having a diameter of 0.13 μm and a 0.2 μm square having an aspect ratio of 4 were obtained. In the holes, many voids were observed from the center to the entrance of the holes. In addition, 0.1 A / dm
^When plating was performed in No. ² , no voids were observed, but a plating time of 60 minutes or more was required to obtain a required plating thickness.

Comparative Example 2 Using the same copper pyrophosphate bath as in Example 2, the same substrate as in (1) of Example 1 was plated at 1 A / dm ² for 5 minutes to obtain a copper plating of about 1000 nm on a flat portion. Was. The volume resistivity of the copper plating film was 2.0 μΩ · cm.

As a result of the cross-sectional observation, the hole having a diameter of 0.5 μmφ or more was buried well despite the seam.
In the hole of 5 to 0.3 μmφ, many elongated voids were observed from the center of the hole to the entrance. that's all

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Akihisa Hongo 11-1 Haneda Asahimachi, Ota-ku, Tokyo Ebara Corporation (72) Inventor Kanji Ohno 1-1-6 Yoshiyukizaka, Fujisawa-shi, Kanagawa Prefecture Yu Ebara (72) Inventor Ryoichi Kimizuka 1-1-6 Yoshiyukizaka, Fujisawa-shi, Kanagawa Prefecture Ebaralight Inc. (72) Inventor Emi Maruyama 1-1-6, Yoshiyukizaka, Fujisawa-shi, Kanagawa Eiji Light Elite Inc. Company F term (reference) 4K024 AA09 AB19 BA01 BB11 BC10 CA06 CA07 CB05 GA01 GA04 4M104 BB04 BB08 DD52

Claims (3)

[Claims] 1. A microporous substrate characterized in that a substrate having micropores and / or microgrooves is first plated with a low current for a short period of time, and then the current is increased to a predetermined thickness. And / or a method for filling a hole in a substrate having fine grooves. 2. The filling of a substrate having micropores and / or microgrooves according to claim 1, wherein the micropores and / or microgrooves on the substrate have different diameters, widths or depths. Plating method. 3. The method of claim 1, wherein the first plating is carried out at an average cathode current density of 0.5.
03-0.5A / dm ²For 10 seconds to 10 minutes
Item 3. Micropores and / or microgrooves according to item 1 or 2.
And a method of filling a hole in a substrate having a hole.