JP2000049306A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法

Info

Publication number
JP2000049306A
JP2000049306A JP10213599A JP21359998A JP2000049306A JP 2000049306 A JP2000049306 A JP 2000049306A JP 10213599 A JP10213599 A JP 10213599A JP 21359998 A JP21359998 A JP 21359998A JP 2000049306 A JP2000049306 A JP 2000049306A
Authority
JP
Japan
Prior art keywords
capacitor
semiconductor device
electrode
semiconductor substrate
mos transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10213599A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000049306A5 (enExample
Inventor
Misuzu Kanai
美鈴 金井
Yuzuru Oji
譲 大路
Takuya Fukuda
琢也 福田
Shinpei Iijima
晋平 飯島
Ryoichi Furukawa
亮一 古川
Yasuhiro Sugawara
安浩 菅原
Hideji Yahata
秀治 矢幡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10213599A priority Critical patent/JP2000049306A/ja
Priority to US09/356,705 priority patent/US6576946B1/en
Publication of JP2000049306A publication Critical patent/JP2000049306A/ja
Publication of JP2000049306A5 publication Critical patent/JP2000049306A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/01—Manufacture or treatment
    • H10D1/041—Manufacture or treatment of capacitors having no potential barriers
    • H10D1/042—Manufacture or treatment of capacitors having no potential barriers using deposition processes to form electrode extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H10D1/716—Electrodes having non-planar surfaces, e.g. formed by texturisation having vertical extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line

Landscapes

  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP10213599A 1998-07-29 1998-07-29 半導体装置およびその製造方法 Pending JP2000049306A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP10213599A JP2000049306A (ja) 1998-07-29 1998-07-29 半導体装置およびその製造方法
US09/356,705 US6576946B1 (en) 1998-07-29 1999-07-20 Semiconductor device comprising capacitor cells, bit lines, word lines, and MOS transistors in a memory cell area over a semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10213599A JP2000049306A (ja) 1998-07-29 1998-07-29 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2000049306A true JP2000049306A (ja) 2000-02-18
JP2000049306A5 JP2000049306A5 (enExample) 2005-04-28

Family

ID=16641865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10213599A Pending JP2000049306A (ja) 1998-07-29 1998-07-29 半導体装置およびその製造方法

Country Status (2)

Country Link
US (1) US6576946B1 (enExample)
JP (1) JP2000049306A (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004031950A (ja) * 2002-06-27 2004-01-29 Samsung Electronics Co Ltd 半導体メモリ素子及びその製造方法
JP2004047999A (ja) * 2002-07-08 2004-02-12 Samsung Electronics Co Ltd Ｄｒａｍセル
JP2004095638A (ja) * 2002-08-29 2004-03-25 Fujitsu Ltd 薄膜デカップリングキャパシタとその製造方法
US8715891B2 (en) 2011-11-24 2014-05-06 Kabushiki Kaisha Toshiba Mask and pattern forming method
CN114284270A (zh) * 2021-12-09 2022-04-05 长鑫存储技术有限公司 存储单元、存储器及其制作方法

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6410955B1 (en) * 2001-04-19 2002-06-25 Micron Technology, Inc. Comb-shaped capacitor for use in integrated circuits
US6888217B2 (en) * 2001-08-30 2005-05-03 Micron Technology, Inc. Capacitor for use in an integrated circuit
US6974994B1 (en) * 2004-06-22 2005-12-13 Advanic Technologies Inc. Capacitor with a geometrical layout
US8212238B2 (en) * 2005-12-27 2012-07-03 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
KR20120133137A (ko) * 2011-05-30 2012-12-10 에스케이하이닉스 주식회사 반도체 소자의 제조 방법
JP2013102008A (ja) 2011-11-08 2013-05-23 Toshiba Corp 不揮発性半導体記憶装置
KR101748949B1 (ko) * 2015-09-18 2017-06-21 서울대학교산학협력단 반도체 메모리 소자 및 이의 제조 방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960003864B1 (ko) * 1992-01-06 1996-03-23 삼성전자주식회사 반도체 메모리장치 및 그 제조방법
US5340763A (en) * 1993-02-12 1994-08-23 Micron Semiconductor, Inc. Multi-pin stacked capacitor utilizing micro villus patterning in a container cell and method to fabricate same
US5278091A (en) * 1993-05-04 1994-01-11 Micron Semiconductor, Inc. Process to manufacture crown stacked capacitor structures with HSG-rugged polysilicon on all sides of the storage node
JP3466851B2 (ja) * 1997-01-20 2003-11-17 株式会社東芝 半導体装置及びその製造方法
US6025624A (en) * 1998-06-19 2000-02-15 Micron Technology, Inc. Shared length cell for improved capacitance

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004031950A (ja) * 2002-06-27 2004-01-29 Samsung Electronics Co Ltd 半導体メモリ素子及びその製造方法
JP2004047999A (ja) * 2002-07-08 2004-02-12 Samsung Electronics Co Ltd Ｄｒａｍセル
JP2004095638A (ja) * 2002-08-29 2004-03-25 Fujitsu Ltd 薄膜デカップリングキャパシタとその製造方法
US8715891B2 (en) 2011-11-24 2014-05-06 Kabushiki Kaisha Toshiba Mask and pattern forming method
CN114284270A (zh) * 2021-12-09 2022-04-05 长鑫存储技术有限公司 存储单元、存储器及其制作方法
CN114284270B (zh) * 2021-12-09 2024-07-12 长鑫存储技术有限公司 存储单元、存储器及其制作方法

Also Published As

Publication number Publication date
US6576946B1 (en) 2003-06-10

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