ITVA980001A0 - Protezione da effetti di sottomassa o di sovralimentazione per circuiti integrati ad isolamento a giunzione - Google Patents
Protezione da effetti di sottomassa o di sovralimentazione per circuiti integrati ad isolamento a giunzioneInfo
- Publication number
- ITVA980001A0 ITVA980001A0 IT98VA000001A ITVA980001A ITVA980001A0 IT VA980001 A0 ITVA980001 A0 IT VA980001A0 IT 98VA000001 A IT98VA000001 A IT 98VA000001A IT VA980001 A ITVA980001 A IT VA980001A IT VA980001 A0 ITVA980001 A0 IT VA980001A0
- Authority
- IT
- Italy
- Prior art keywords
- oversupply
- underground
- junction
- effects
- protection
- Prior art date
Links
- 238000009413 insulation Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT1998VA000001A IT1305634B1 (it) | 1998-01-19 | 1998-01-19 | Protezione da effetti di sottomassa o di sovralimentazione percircuiti integrati ad isolamento a giunzione |
US09/227,946 US6271567B1 (en) | 1998-01-19 | 1999-01-11 | Belowground and oversupply protection of junction isolated integrated circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT1998VA000001A IT1305634B1 (it) | 1998-01-19 | 1998-01-19 | Protezione da effetti di sottomassa o di sovralimentazione percircuiti integrati ad isolamento a giunzione |
Publications (3)
Publication Number | Publication Date |
---|---|
ITVA980001A0 true ITVA980001A0 (it) | 1998-01-19 |
ITVA980001A1 ITVA980001A1 (it) | 1999-07-19 |
IT1305634B1 IT1305634B1 (it) | 2001-05-15 |
Family
ID=11423452
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT1998VA000001A IT1305634B1 (it) | 1998-01-19 | 1998-01-19 | Protezione da effetti di sottomassa o di sovralimentazione percircuiti integrati ad isolamento a giunzione |
Country Status (2)
Country | Link |
---|---|
US (1) | US6271567B1 (it) |
IT (1) | IT1305634B1 (it) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6750489B1 (en) | 2002-10-25 | 2004-06-15 | Foveon, Inc. | Isolated high voltage PMOS transistor |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5377094A (en) * | 1993-05-14 | 1994-12-27 | Siliconix Incorporated | Push-pull output stage for driving motors which generates auxiliary voltage supply |
US5321293A (en) * | 1993-07-12 | 1994-06-14 | Xerox Corporation | Integrated device having MOS transistors which enable positive and negative voltage swings |
US5420532A (en) * | 1993-08-20 | 1995-05-30 | Texas Instruments Incorporated | Synchronous rectifying circuit |
DE69624493T2 (de) * | 1996-12-09 | 2003-06-26 | St Microelectronics Srl | Vorrichtung und Verfahren zur Unterdrückung von parasitären Effekten in einer integrierten Schaltung mit pn-Isolationszonen |
US5925910A (en) * | 1997-03-28 | 1999-07-20 | Stmicroelectronics, Inc. | DMOS transistors with schottky diode body structure |
US5834826A (en) * | 1997-05-08 | 1998-11-10 | Stmicroelectronics, Inc. | Protection against adverse parasitic effects in junction-isolated integrated circuits |
-
1998
- 1998-01-19 IT IT1998VA000001A patent/IT1305634B1/it active
-
1999
- 1999-01-11 US US09/227,946 patent/US6271567B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6271567B1 (en) | 2001-08-07 |
ITVA980001A1 (it) | 1999-07-19 |
IT1305634B1 (it) | 2001-05-15 |
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