ITMI911517A0 - Metodo per la formazione di piste metalliche di un dispositivo a semiconduttore - Google Patents
Metodo per la formazione di piste metalliche di un dispositivo a semiconduttoreInfo
- Publication number
- ITMI911517A0 ITMI911517A0 IT91MI1517A ITMI911517A ITMI911517A0 IT MI911517 A0 ITMI911517 A0 IT MI911517A0 IT 91MI1517 A IT91MI1517 A IT 91MI1517A IT MI911517 A ITMI911517 A IT MI911517A IT MI911517 A0 ITMI911517 A0 IT MI911517A0
- Authority
- IT
- Italy
- Prior art keywords
- semiconductor device
- forming metal
- metal tracks
- tracks
- forming
- Prior art date
Links
- 239000002184 metal Substances 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910001861A KR930006128B1 (ko) | 1991-01-31 | 1991-01-31 | 반도체장치의 금속 배선 형성방법 |
Publications (3)
Publication Number | Publication Date |
---|---|
ITMI911517A0 true ITMI911517A0 (it) | 1991-06-04 |
ITMI911517A1 ITMI911517A1 (it) | 1992-12-04 |
IT1247972B IT1247972B (it) | 1995-01-05 |
Family
ID=19310706
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ITMI911517A IT1247972B (it) | 1991-01-31 | 1991-06-04 | Metodo per la formazione di piste metalliche di un dispositivo a semiconduttore |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPH0789566B2 (it) |
KR (1) | KR930006128B1 (it) |
DE (1) | DE4118380C2 (it) |
FR (1) | FR2672429B1 (it) |
GB (1) | GB2252448B (it) |
IT (1) | IT1247972B (it) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW219407B (it) * | 1992-06-24 | 1994-01-21 | American Telephone & Telegraph | |
KR100352909B1 (ko) * | 2000-03-17 | 2002-09-16 | 삼성전자 주식회사 | 반도체소자의 자기정렬 콘택 구조체 형성방법 및 그에의해 형성된 자기정렬 콘택 구조체 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL7907434A (nl) * | 1979-10-08 | 1981-04-10 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleider- inrichting. |
US4400865A (en) * | 1980-07-08 | 1983-08-30 | International Business Machines Corporation | Self-aligned metal process for integrated circuit metallization |
US4424621A (en) * | 1981-12-30 | 1984-01-10 | International Business Machines Corporation | Method to fabricate stud structure for self-aligned metallization |
US4584761A (en) * | 1984-05-15 | 1986-04-29 | Digital Equipment Corporation | Integrated circuit chip processing techniques and integrated chip produced thereby |
JPS61270870A (ja) * | 1985-05-25 | 1986-12-01 | Mitsubishi Electric Corp | 半導体装置 |
US4789648A (en) * | 1985-10-28 | 1988-12-06 | International Business Machines Corporation | Method for producing coplanar multi-level metal/insulator films on a substrate and for forming patterned conductive lines simultaneously with stud vias |
US4826781A (en) * | 1986-03-04 | 1989-05-02 | Seiko Epson Corporation | Semiconductor device and method of preparation |
US4868138A (en) * | 1988-03-23 | 1989-09-19 | Sgs-Thomson Microelectronics, Inc. | Method for forming a self-aligned source/drain contact for an MOS transistor |
IT1225624B (it) * | 1988-10-20 | 1990-11-22 | Sgs Thomson Microelectronics | Procedimento per formare contatti metallo-semiconduttore autoallineatiin dispositivi integrati contenenti strutture misfet |
-
1991
- 1991-01-31 KR KR1019910001861A patent/KR930006128B1/ko not_active IP Right Cessation
- 1991-06-03 FR FR9106646A patent/FR2672429B1/fr not_active Expired - Lifetime
- 1991-06-04 IT ITMI911517A patent/IT1247972B/it active IP Right Grant
- 1991-06-05 DE DE4118380A patent/DE4118380C2/de not_active Expired - Lifetime
- 1991-06-05 GB GB9112054A patent/GB2252448B/en not_active Expired - Lifetime
- 1991-06-14 JP JP3170608A patent/JPH0789566B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE4118380A1 (de) | 1992-08-13 |
FR2672429A1 (fr) | 1992-08-07 |
DE4118380C2 (de) | 1994-01-20 |
FR2672429B1 (fr) | 1997-03-14 |
JPH04249346A (ja) | 1992-09-04 |
ITMI911517A1 (it) | 1992-12-04 |
KR930006128B1 (ko) | 1993-07-07 |
JPH0789566B2 (ja) | 1995-09-27 |
GB9112054D0 (en) | 1991-07-24 |
IT1247972B (it) | 1995-01-05 |
GB2252448A (en) | 1992-08-05 |
GB2252448B (en) | 1995-03-22 |
KR920015491A (ko) | 1992-08-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
0001 | Granted | ||
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970626 |