ITMI20001567A0 - Processo per fabbricare una cella di memoria non-volatile con una regione di gate flottante autoallineata all'isolamento e con un alto coeff - Google Patents

Processo per fabbricare una cella di memoria non-volatile con una regione di gate flottante autoallineata all'isolamento e con un alto coeff

Info

Publication number
ITMI20001567A0
ITMI20001567A0 IT2000MI001567A ITMI20001567A ITMI20001567A0 IT MI20001567 A0 ITMI20001567 A0 IT MI20001567A0 IT 2000MI001567 A IT2000MI001567 A IT 2000MI001567A IT MI20001567 A ITMI20001567 A IT MI20001567A IT MI20001567 A0 ITMI20001567 A0 IT MI20001567A0
Authority
IT
Italy
Prior art keywords
coeff
isolation
aligned
manufacture
memory cell
Prior art date
Application number
IT2000MI001567A
Other languages
English (en)
Inventor
Emilio Camerlenghi
Roberto Bez
Stefano Ratti
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT2000MI001567A priority Critical patent/IT1318145B1/it
Publication of ITMI20001567A0 publication Critical patent/ITMI20001567A0/it
Priority to EP01114948A priority patent/EP1179839A3/en
Priority to US09/900,501 priority patent/US6537879B2/en
Publication of ITMI20001567A1 publication Critical patent/ITMI20001567A1/it
Priority to US10/337,556 priority patent/US6750505B2/en
Application granted granted Critical
Publication of IT1318145B1 publication Critical patent/IT1318145B1/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
IT2000MI001567A 2000-07-11 2000-07-11 Processo per fabbricare una cella di memoria non-volatile con unaregione di gate flottante autoallineata all'isolamento e con un alto IT1318145B1 (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT2000MI001567A IT1318145B1 (it) 2000-07-11 2000-07-11 Processo per fabbricare una cella di memoria non-volatile con unaregione di gate flottante autoallineata all'isolamento e con un alto
EP01114948A EP1179839A3 (en) 2000-07-11 2001-06-20 Process for manufacturing a non-volatile memory cell
US09/900,501 US6537879B2 (en) 2000-07-11 2001-07-06 Process for manufacturing a non-volatile memory cell with a floating gate region autoaligned to the isolation and with a high coupling coefficient
US10/337,556 US6750505B2 (en) 2000-07-11 2003-01-07 Non-volatile memory cell with floating gate region autoaligned to the isolation and with a high coupling coefficient

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT2000MI001567A IT1318145B1 (it) 2000-07-11 2000-07-11 Processo per fabbricare una cella di memoria non-volatile con unaregione di gate flottante autoallineata all'isolamento e con un alto

Publications (3)

Publication Number Publication Date
ITMI20001567A0 true ITMI20001567A0 (it) 2000-07-11
ITMI20001567A1 ITMI20001567A1 (it) 2002-01-11
IT1318145B1 IT1318145B1 (it) 2003-07-23

Family

ID=11445453

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2000MI001567A IT1318145B1 (it) 2000-07-11 2000-07-11 Processo per fabbricare una cella di memoria non-volatile con unaregione di gate flottante autoallineata all'isolamento e con un alto

Country Status (3)

Country Link
US (2) US6537879B2 (it)
EP (1) EP1179839A3 (it)
IT (1) IT1318145B1 (it)

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Publication number Priority date Publication date Assignee Title
US20020130357A1 (en) * 2001-03-14 2002-09-19 Hurley Kelly T. Self-aligned floating gate flash cell system and method
KR100426487B1 (ko) * 2001-12-28 2004-04-14 주식회사 하이닉스반도체 플래쉬 메모리 소자의 플로팅 게이트 형성 방법
US6475894B1 (en) * 2002-01-18 2002-11-05 Nanya Technology Corporation Process for fabricating a floating gate of a flash memory in a self-aligned manner
US6682977B2 (en) * 2002-02-11 2004-01-27 Winbond Electronics Corporation Method for fabricating a gate structure of a flash memory
KR100436289B1 (ko) * 2002-07-18 2004-06-16 주식회사 하이닉스반도체 플래시 메모리 셀의 게이트 구조와 그 형성방법 및유전체막 형성방법
KR100504691B1 (ko) * 2003-01-10 2005-08-03 삼성전자주식회사 전하저장절연막을 가지는 비휘발성 메모리 소자 및 그제조방법
KR100511598B1 (ko) * 2003-09-24 2005-08-31 동부아남반도체 주식회사 플래시 메모리 제조방법
KR100554516B1 (ko) * 2004-06-29 2006-03-03 삼성전자주식회사 반도체 장치의 제조 방법
US20060046402A1 (en) * 2004-08-31 2006-03-02 Micron Technology, Inc. Flash cell structures and methods of formation
KR100655289B1 (ko) * 2005-01-13 2006-12-08 삼성전자주식회사 플래시 메모리 제조 방법
JP2006303308A (ja) * 2005-04-22 2006-11-02 Toshiba Corp 半導体装置およびその製造方法
KR100608377B1 (ko) * 2005-05-02 2006-08-08 주식회사 하이닉스반도체 메모리 소자의 셀 트랜지스터 제조방법
US20070063319A1 (en) * 2005-09-19 2007-03-22 Bohumil Lojek Film stack and method for fabricating the same
KR100660285B1 (ko) * 2005-12-28 2006-12-20 동부일렉트로닉스 주식회사 스플리트 게이트형 비휘발성 기억 장치의 제조방법
KR100764746B1 (ko) * 2006-09-08 2007-10-08 삼성전자주식회사 비휘발성 메모리 장치 및 그의 제조방법
CN102299092B (zh) * 2010-06-22 2013-10-30 中国科学院微电子研究所 一种半导体器件及其形成方法
CN112185815A (zh) * 2019-07-04 2021-01-05 硅存储技术公司 形成具有间隔物限定的浮栅和离散地形成的多晶硅栅的分裂栅闪存存储器单元的方法

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Publication number Priority date Publication date Assignee Title
JPH09505945A (ja) * 1994-09-13 1997-06-10 マクロニクス インターナショナル カンパニイ リミテッド フラッシュ・イーピーロム・トランジスタ・アレイおよびその製造方法
JPH0897306A (ja) * 1994-09-29 1996-04-12 Toshiba Corp 半導体装置及びその製造方法
JP3366173B2 (ja) * 1995-07-31 2003-01-14 シャープ株式会社 不揮発性半導体メモリの製造方法
JP3583583B2 (ja) * 1997-07-08 2004-11-04 株式会社東芝 半導体装置及びその製造方法
US6258669B1 (en) * 1997-12-18 2001-07-10 Advanced Micro Devices, Inc. Methods and arrangements for improved formation of control and floating gates in non-volatile memory semiconductor devices
US6140184A (en) * 1998-06-01 2000-10-31 Motorola, Inc. Method of changing the power dissipation across an array of transistors
TW407381B (en) * 1999-03-01 2000-10-01 United Microelectronics Corp Manufacture of the flash memory cell
JP2001196476A (ja) * 2000-01-07 2001-07-19 Toshiba Corp 半導体装置及びその製造方法
US6326283B1 (en) * 2000-03-07 2001-12-04 Vlsi Technology, Inc. Trench-diffusion corner rounding in a shallow-trench (STI) process
US6326263B1 (en) * 2000-08-11 2001-12-04 United Microelectronics Corp. Method of fabricating a flash memory cell

Also Published As

Publication number Publication date
ITMI20001567A1 (it) 2002-01-11
EP1179839A2 (en) 2002-02-13
US20020025631A1 (en) 2002-02-28
US20030096477A1 (en) 2003-05-22
US6537879B2 (en) 2003-03-25
IT1318145B1 (it) 2003-07-23
EP1179839A3 (en) 2004-12-15
US6750505B2 (en) 2004-06-15

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