IT959914B - Sistema di memoria perfezionato - Google Patents

Sistema di memoria perfezionato

Info

Publication number
IT959914B
IT959914B IT26072/72A IT2607272A IT959914B IT 959914 B IT959914 B IT 959914B IT 26072/72 A IT26072/72 A IT 26072/72A IT 2607272 A IT2607272 A IT 2607272A IT 959914 B IT959914 B IT 959914B
Authority
IT
Italy
Prior art keywords
cells
memory system
improved memory
line
redundancy
Prior art date
Application number
IT26072/72A
Other languages
English (en)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT959914B publication Critical patent/IT959914B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Hardware Redundancy (AREA)
IT26072/72A 1971-08-18 1972-06-23 Sistema di memoria perfezionato IT959914B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US17280071A 1971-08-18 1971-08-18

Publications (1)

Publication Number Publication Date
IT959914B true IT959914B (it) 1973-11-10

Family

ID=22629301

Family Applications (1)

Application Number Title Priority Date Filing Date
IT26072/72A IT959914B (it) 1971-08-18 1972-06-23 Sistema di memoria perfezionato

Country Status (7)

Country Link
US (1) US3753244A (it)
JP (1) JPS523764B2 (it)
CA (1) CA993994A (it)
DE (1) DE2237671C2 (it)
FR (1) FR2149396B1 (it)
GB (1) GB1398438A (it)
IT (1) IT959914B (it)

Families Citing this family (63)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1461245A (en) * 1973-01-28 1977-01-13 Hawker Siddeley Dynamics Ltd Reliability of random access memory systems
NL7313573A (nl) * 1973-10-03 1975-04-07 Philips Nv Geheugeninrichting.
IT1006973B (it) * 1974-01-18 1976-10-20 Honeywell Inf Systems Apparato di riconfigurazione di memoria
JPS50124923A (it) * 1974-03-20 1975-10-01
JPS5170221A (en) * 1974-12-16 1976-06-17 Asahi Chemical Ind Fukugobanno seizohoho
JPS581077B2 (ja) * 1974-12-19 1983-01-10 旭化成株式会社 ヒフクキヨウカキホウコンクリ−ト
JPS5721799B2 (it) * 1975-02-01 1982-05-10
JPS528025A (en) * 1975-02-13 1977-01-21 Nippon Shiporetsukusu Kougiyou Production of reinforced lighttweight foam concrete
JPS51114832A (en) * 1975-04-02 1976-10-08 Hitachi Ltd Memory chip backup unit
US4070651A (en) * 1975-07-10 1978-01-24 Texas Instruments Incorporated Magnetic domain minor loop redundancy system
JPS5225058U (it) * 1975-08-11 1977-02-22
JPS5245232A (en) * 1975-10-08 1977-04-09 Hitachi Ltd Micro program modification circuit
US4032765A (en) * 1976-02-23 1977-06-28 Burroughs Corporation Memory modification system
JPS52122153U (it) * 1976-03-12 1977-09-17
US4045779A (en) * 1976-03-15 1977-08-30 Xerox Corporation Self-correcting memory circuit
GB1507428A (en) * 1976-03-18 1978-04-12 Int Computers Ltd Data processing systems
JPS536541A (en) * 1976-07-05 1978-01-21 Texas Instruments Inc Defect resisting selffaddressable array
US4250570B1 (en) * 1976-07-15 1996-01-02 Intel Corp Redundant memory circuit
PL116240B1 (en) * 1976-12-22 1981-05-30 Wojewodzka Spoldzielnia Mieszk Prestressed laminar material
JPS5528580A (en) * 1978-08-22 1980-02-29 Nec Corp Memory control circuit
JPS5599891A (en) * 1979-01-24 1980-07-30 Dainippon Screen Mfg Co Ltd Hair style trial check method
FR2453449B1 (fr) * 1979-04-06 1987-01-09 Bull Sa Procede et systeme d'exploitation d'une memoire adressable permettant l'identification de certaines adresses particulieres
JPS563499A (en) * 1979-06-25 1981-01-14 Fujitsu Ltd Semiconductor memory device
JPS5928560Y2 (ja) * 1979-11-13 1984-08-17 富士通株式会社 冗長ビットを有する記憶装置
US4281398A (en) * 1980-02-12 1981-07-28 Mostek Corporation Block redundancy for memory array
US4346459A (en) * 1980-06-30 1982-08-24 Inmos Corporation Redundancy scheme for an MOS memory
JPS57155642A (en) * 1981-03-23 1982-09-25 Nissan Motor Co Ltd Computer capable of using correcting memory
US4503491A (en) * 1981-06-29 1985-03-05 Matsushita Electric Industrial Co., Ltd. Computer with expanded addressing capability
US4422161A (en) * 1981-10-08 1983-12-20 Rca Corporation Memory array with redundant elements
JPS59112399U (ja) * 1981-11-12 1984-07-28 富士通株式会社 半導体記憶装置
JPS58137192A (ja) * 1981-12-29 1983-08-15 Fujitsu Ltd 半導体記憶装置
JPS58145638U (ja) * 1982-03-23 1983-09-30 和泉村 踏竹取替式の健康下駄
GB2129585B (en) * 1982-10-29 1986-03-05 Inmos Ltd Memory system including a faulty rom array
US4546454A (en) * 1982-11-05 1985-10-08 Seeq Technology, Inc. Non-volatile memory cell fuse element
DE3311427A1 (de) * 1983-03-29 1984-10-04 Siemens AG, 1000 Berlin und 8000 München Integrierter dynamischer schreib-lesespeicher
US4644494A (en) * 1984-02-06 1987-02-17 Sundstrand Data Control, Inc. Solid state memory for aircraft flight data recorder systems
JPS6177946A (ja) * 1984-09-26 1986-04-21 Hitachi Ltd 半導体記憶装置
JPS61292296A (ja) * 1985-05-20 1986-12-23 Fujitsu Ltd 半導体記憶装置
JPS6238599A (ja) * 1985-08-13 1987-02-19 Mitsubishi Electric Corp 半導体記憶装置
FR2596933B1 (fr) * 1986-04-08 1988-06-10 Radiotechnique Compelec Dispositif comportant des circuits accordes sur des frequences donnees
DE3685654D1 (de) * 1986-08-22 1992-07-16 Ibm Dekodierverfahren und -schaltungsanordnung fuer einen redundanten cmos-halbleiterspeicher.
FR2611972B1 (fr) * 1987-03-03 1989-05-19 Thomson Semiconducteurs Procede d'adressage d'elements redondants d'une memoire integree et dispositif permettant de mettre en oeuvre le procede
US4922451A (en) * 1987-03-23 1990-05-01 International Business Machines Corporation Memory re-mapping in a microcomputer system
US4866676A (en) * 1988-03-24 1989-09-12 Motorola, Inc. Testing arrangement for a DRAM with redundancy
US4885720A (en) * 1988-04-01 1989-12-05 International Business Machines Corporation Memory device and method implementing wordline redundancy without an access time penalty
US5088066A (en) * 1989-02-10 1992-02-11 Intel Corporation Redundancy decoding circuit using n-channel transistors
US5031142A (en) * 1989-02-10 1991-07-09 Intel Corporation Reset circuit for redundant memory using CAM cells
DE69033438T2 (de) 1989-04-13 2000-07-06 Sandisk Corp Austausch von fehlerhaften Speicherzellen einer EEprommatritze
JPH03101978U (it) * 1990-02-07 1991-10-23
US5134616A (en) * 1990-02-13 1992-07-28 International Business Machines Corporation Dynamic ram with on-chip ecc and optimized bit and word redundancy
JP2842923B2 (ja) * 1990-03-19 1999-01-06 株式会社アドバンテスト 半導体メモリ試験装置
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US5200922A (en) * 1990-10-24 1993-04-06 Rao Kameswara K Redundancy circuit for high speed EPROM and flash memory devices
DE69117926D1 (de) * 1991-03-29 1996-04-18 Ibm Speichersystem mit anpassbarer Redundanz
KR940006922B1 (ko) * 1991-07-11 1994-07-29 금성일렉트론 주식회사 반도체 메모리의 리던던시 회로
GB9305801D0 (en) * 1993-03-19 1993-05-05 Deans Alexander R Semiconductor memory system
US6031771A (en) * 1996-10-28 2000-02-29 Macronix International Co., Ltd. Memory redundancy circuit using single polysilicon floating gate transistors as redundancy elements
US5889711A (en) * 1997-10-27 1999-03-30 Macronix International Co., Ltd. Memory redundancy for high density memory
US5896327A (en) * 1997-10-27 1999-04-20 Macronix International Co., Ltd. Memory redundancy circuit for high density memory with extra row and column for failed address storage
US6288948B1 (en) 2000-03-31 2001-09-11 Cypress Semiconductor Corp. Wired address compare circuit and method
US6567290B2 (en) * 2000-07-05 2003-05-20 Mosaic Systems, Inc. High-speed low-power semiconductor memory architecture
US20090119444A1 (en) * 2007-11-01 2009-05-07 Zerog Wireless, Inc., Delaware Corporation Multiple write cycle memory using redundant addressing
US7839707B2 (en) * 2008-09-09 2010-11-23 Vitesse Semiconductor Corporation Fuses for memory repair

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3245051A (en) * 1960-11-16 1966-04-05 John H Robb Information storage matrices
US3222653A (en) * 1961-09-18 1965-12-07 Ibm Memory system for using a memory despite the presence of defective bits therein
US3422402A (en) * 1965-12-29 1969-01-14 Ibm Memory systems for using storage devices containing defective bits
US3434116A (en) * 1966-06-15 1969-03-18 Ibm Scheme for circumventing bad memory cells
US3588830A (en) * 1968-01-17 1971-06-28 Ibm System for using a memory having irremediable bad bits
US3633175A (en) * 1969-05-15 1972-01-04 Honeywell Inc Defect-tolerant digital memory system
US3654610A (en) * 1970-09-28 1972-04-04 Fairchild Camera Instr Co Use of faulty storage circuits by position coding

Also Published As

Publication number Publication date
JPS4830332A (it) 1973-04-21
FR2149396B1 (it) 1974-12-27
GB1398438A (en) 1975-06-18
DE2237671A1 (de) 1973-03-01
DE2237671C2 (de) 1981-09-17
US3753244A (en) 1973-08-14
JPS523764B2 (it) 1977-01-29
FR2149396A1 (it) 1973-03-30
CA993994A (en) 1976-07-27

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