IT8522287A0 - Struttura di schermatura di porta per dispositivi mos di potenza. - Google Patents

Struttura di schermatura di porta per dispositivi mos di potenza.

Info

Publication number
IT8522287A0
IT8522287A0 IT8522287A IT2228785A IT8522287A0 IT 8522287 A0 IT8522287 A0 IT 8522287A0 IT 8522287 A IT8522287 A IT 8522287A IT 2228785 A IT2228785 A IT 2228785A IT 8522287 A0 IT8522287 A0 IT 8522287A0
Authority
IT
Italy
Prior art keywords
shielding structure
power mos
mos devices
gate shielding
gate
Prior art date
Application number
IT8522287A
Other languages
English (en)
Other versions
IT1185391B (it
Inventor
John Manning Savidge Neilson
Carl Franklin Wheatley
Norbert William Brackelmanns
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=24664213&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=IT8522287(A0) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Rca Corp filed Critical Rca Corp
Publication of IT8522287A0 publication Critical patent/IT8522287A0/it
Application granted granted Critical
Publication of IT1185391B publication Critical patent/IT1185391B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
IT22287/85A 1984-10-23 1985-09-26 Struttura di schermatura di porta per dispositivi mos di potenza IT1185391B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/664,027 US4631564A (en) 1984-10-23 1984-10-23 Gate shield structure for power MOS device

Publications (2)

Publication Number Publication Date
IT8522287A0 true IT8522287A0 (it) 1985-09-26
IT1185391B IT1185391B (it) 1987-11-12

Family

ID=24664213

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22287/85A IT1185391B (it) 1984-10-23 1985-09-26 Struttura di schermatura di porta per dispositivi mos di potenza

Country Status (6)

Country Link
US (1) US4631564A (it)
JP (1) JPH0732248B2 (it)
DE (1) DE3537004A1 (it)
FR (1) FR2572220A1 (it)
GB (1) GB2166290B (it)
IT (1) IT1185391B (it)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4789882A (en) * 1983-03-21 1988-12-06 International Rectifier Corporation High power MOSFET with direct connection from connection pads to underlying silicon
GB2165090A (en) * 1984-09-26 1986-04-03 Philips Electronic Associated Improving the field distribution in high voltage semiconductor devices
JPS61182264A (ja) * 1985-02-08 1986-08-14 Nissan Motor Co Ltd 縦型ｍｏｓトランジスタ
JPS61191071A (ja) * 1985-02-20 1986-08-25 Toshiba Corp 伝導度変調型半導体装置及びその製造方法
US4682195A (en) * 1985-09-30 1987-07-21 General Electric Company Insulated gate device with configured emitter contact pad
US4779123A (en) * 1985-12-13 1988-10-18 Siliconix Incorporated Insulated gate transistor array
EP0229362B1 (en) * 1986-01-10 1993-03-17 General Electric Company Semiconductor device and method of fabrication
US4798810A (en) * 1986-03-10 1989-01-17 Siliconix Incorporated Method for manufacturing a power MOS transistor
US4816882A (en) * 1986-03-10 1989-03-28 Siliconix Incorporated Power MOS transistor with equipotential ring
JPH0656890B2 (ja) * 1986-09-24 1994-07-27 富士電機株式会社 伝導度変調型たて型ｍｏｓ―ｆｅｔ
JPS6384070A (ja) * 1986-09-26 1988-04-14 Mitsubishi Electric Corp 電界効果型半導体装置
JPS6381948A (ja) * 1986-09-26 1988-04-12 Toshiba Corp 多層配線半導体装置
US4860080A (en) * 1987-03-31 1989-08-22 General Electric Company Isolation for transistor devices having a pilot structure
DE3844958C2 (de) * 1987-09-28 1999-04-22 Mitsubishi Electric Corp Integrierte Halbleiteranordnung mit Überlastschutz
JP2785271B2 (ja) * 1988-04-28 1998-08-13 富士電機株式会社 半導体装置
JPH02143566A (ja) * 1988-11-25 1990-06-01 Toshiba Corp 二重拡散形絶縁ゲート電界効果トランジスタ
US5072266A (en) 1988-12-27 1991-12-10 Siliconix Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
JP2551152B2 (ja) * 1989-06-29 1996-11-06 富士電機株式会社 Ｍｏｓコントロールサイリスタ
JPH0831606B2 (ja) * 1989-11-17 1996-03-27 株式会社東芝 大電力用半導体装置
DE69032084T2 (de) * 1989-11-17 1998-07-16 Toshiba Kawasaki Kk Halbleiteranordnung mit zusammengesetzter Bipolar-MOS-Elementpille, geeignet für eine Druckkontaktstruktur
US5023692A (en) * 1989-12-07 1991-06-11 Harris Semiconductor Patents, Inc. Power MOSFET transistor circuit
JP2692350B2 (ja) * 1990-04-02 1997-12-17 富士電機株式会社 Ｍｏｓ型半導体素子
JP2858404B2 (ja) * 1990-06-08 1999-02-17 株式会社デンソー 絶縁ゲート型バイポーラトランジスタおよびその製造方法
US5079608A (en) * 1990-11-06 1992-01-07 Harris Corporation Power MOSFET transistor circuit with active clamp
US5304831A (en) * 1990-12-21 1994-04-19 Siliconix Incorporated Low on-resistance power MOS technology
US5404040A (en) * 1990-12-21 1995-04-04 Siliconix Incorporated Structure and fabrication of power MOSFETs, including termination structures
US5164802A (en) * 1991-03-20 1992-11-17 Harris Corporation Power vdmosfet with schottky on lightly doped drain of lateral driver fet
US5430314A (en) 1992-04-23 1995-07-04 Siliconix Incorporated Power device with buffered gate shield region
US5395776A (en) * 1993-05-12 1995-03-07 At&T Corp. Method of making a rugged DMOS device
US6191484B1 (en) * 1995-07-28 2001-02-20 Stmicroelectronics, Inc. Method of forming planarized multilevel metallization in an integrated circuit
US5747853A (en) * 1996-08-07 1998-05-05 Megamos Corporation Semiconductor structure with controlled breakdown protection
US5886383A (en) * 1997-01-10 1999-03-23 International Rectifier Corporation Integrated schottky diode and mosgated device
US9484451B2 (en) 2007-10-05 2016-11-01 Vishay-Siliconix MOSFET active area and edge termination area charge balance
US9431249B2 (en) 2011-12-01 2016-08-30 Vishay-Siliconix Edge termination for super junction MOSFET devices
US9614043B2 (en) 2012-02-09 2017-04-04 Vishay-Siliconix MOSFET termination trench
US9842911B2 (en) 2012-05-30 2017-12-12 Vishay-Siliconix Adaptive charge balanced edge termination
US9508596B2 (en) 2014-06-20 2016-11-29 Vishay-Siliconix Processes used in fabricating a metal-insulator-semiconductor field effect transistor
US9887259B2 (en) 2014-06-23 2018-02-06 Vishay-Siliconix Modulated super junction power MOSFET devices
EP3183754A4 (en) 2014-08-19 2018-05-02 Vishay-Siliconix Super-junction metal oxide semiconductor field effect transistor

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5688362A (en) * 1979-12-19 1981-07-17 Toshiba Corp Vertical type power mos transistor
US4364073A (en) * 1980-03-25 1982-12-14 Rca Corporation Power MOSFET with an anode region
US4593302B1 (en) * 1980-08-18 1998-02-03 Int Rectifier Corp Process for manufacture of high power mosfet laterally distributed high carrier density beneath the gate oxide
US4412242A (en) * 1980-11-17 1983-10-25 International Rectifier Corporation Planar structure for high voltage semiconductor devices with gaps in glassy layer over high field regions
US4466176A (en) * 1982-08-09 1984-08-21 General Electric Company Process for manufacturing insulated-gate semiconductor devices with integral shorts
US4532534A (en) * 1982-09-07 1985-07-30 Rca Corporation MOSFET with perimeter channel
US4789882A (en) * 1983-03-21 1988-12-06 International Rectifier Corporation High power MOSFET with direct connection from connection pads to underlying silicon

Also Published As

Publication number Publication date
JPH0732248B2 (ja) 1995-04-10
FR2572220A1 (fr) 1986-04-25
GB2166290A (en) 1986-04-30
IT1185391B (it) 1987-11-12
GB2166290B (en) 1989-07-12
DE3537004A1 (de) 1986-04-24
GB8525661D0 (en) 1985-11-20
US4631564A (en) 1986-12-23
JPS61102068A (ja) 1986-05-20

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970925