IT8224641A0 - Procedimento per la formazione di caratteristiche d'ordine sub-micron in dispositivi a semiconduttori. - Google Patents

Procedimento per la formazione di caratteristiche d'ordine sub-micron in dispositivi a semiconduttori.

Info

Publication number
IT8224641A0
IT8224641A0 IT8224641A IT2464182A IT8224641A0 IT 8224641 A0 IT8224641 A0 IT 8224641A0 IT 8224641 A IT8224641 A IT 8224641A IT 2464182 A IT2464182 A IT 2464182A IT 8224641 A0 IT8224641 A0 IT 8224641A0
Authority
IT
Italy
Prior art keywords
sub
procedure
formation
semiconductor devices
micron order
Prior art date
Application number
IT8224641A
Other languages
English (en)
Other versions
IT1153379B (it
IT8224641A1 (it
Inventor
Eliezer Kinsbron
William Thomas Lynch
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of IT8224641A0 publication Critical patent/IT8224641A0/it
Publication of IT8224641A1 publication Critical patent/IT8224641A1/it
Application granted granted Critical
Publication of IT1153379B publication Critical patent/IT1153379B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
    • H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0277—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming conductor-insulator-semiconductor or Schottky barrier source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01326—Aspects related to lithography, isolation or planarisation of the conductor
    • H10D64/01328—Aspects related to lithography, isolation or planarisation of the conductor by defining the conductor using a sidewall spacer mask, a transformation under a mask or a plating at a sidewall
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H10P50/268—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
IT24641/82A 1981-12-07 1982-12-06 Procedimento per la formazione di caratteristiche d'ordine sub-micron in dispositivi a semiconduttori IT1153379B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/328,368 US4432132A (en) 1981-12-07 1981-12-07 Formation of sidewall oxide layers by reactive oxygen ion etching to define submicron features

Publications (3)

Publication Number Publication Date
IT8224641A0 true IT8224641A0 (it) 1982-12-06
IT8224641A1 IT8224641A1 (it) 1984-06-06
IT1153379B IT1153379B (it) 1987-01-14

Family

ID=23280714

Family Applications (1)

Application Number Title Priority Date Filing Date
IT24641/82A IT1153379B (it) 1981-12-07 1982-12-06 Procedimento per la formazione di caratteristiche d'ordine sub-micron in dispositivi a semiconduttori

Country Status (8)

Country Link
US (1) US4432132A (it)
JP (1) JPS58106833A (it)
CA (1) CA1201216A (it)
DE (1) DE3245276A1 (it)
FR (1) FR2517881B1 (it)
GB (1) GB2110876B (it)
IT (1) IT1153379B (it)
NL (1) NL8204721A (it)

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US5110760A (en) * 1990-09-28 1992-05-05 The United States Of America As Represented By The Secretary Of The Navy Method of nanometer lithography
US5219772A (en) * 1991-08-15 1993-06-15 At&T Bell Laboratories Method for making field effect devices with ultra-short gates
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Also Published As

Publication number Publication date
DE3245276A1 (de) 1983-06-09
GB2110876B (en) 1985-10-02
FR2517881B1 (fr) 1986-03-21
IT1153379B (it) 1987-01-14
US4432132A (en) 1984-02-21
JPS58106833A (ja) 1983-06-25
FR2517881A1 (fr) 1983-06-10
NL8204721A (nl) 1983-07-01
IT8224641A1 (it) 1984-06-06
GB2110876A (en) 1983-06-22
CA1201216A (en) 1986-02-25

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