IT7928237A0 - Memoria perfezionata. - Google Patents
Memoria perfezionata.Info
- Publication number
- IT7928237A0 IT7928237A0 IT7928237A IT2823779A IT7928237A0 IT 7928237 A0 IT7928237 A0 IT 7928237A0 IT 7928237 A IT7928237 A IT 7928237A IT 2823779 A IT2823779 A IT 2823779A IT 7928237 A0 IT7928237 A0 IT 7928237A0
- Authority
- IT
- Italy
- Prior art keywords
- perfected
- memory
- perfected memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/415—Address circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/000,058 US4193127A (en) | 1979-01-02 | 1979-01-02 | Simultaneous read/write cell |
Publications (2)
Publication Number | Publication Date |
---|---|
IT7928237A0 true IT7928237A0 (it) | 1979-12-20 |
IT1165399B IT1165399B (it) | 1987-04-22 |
Family
ID=21689718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT28237/79A IT1165399B (it) | 1979-01-02 | 1979-12-20 | Memoria perfezionata |
Country Status (5)
Country | Link |
---|---|
US (1) | US4193127A (it) |
EP (1) | EP0012796B1 (it) |
JP (1) | JPS5846794B2 (it) |
DE (1) | DE2965203D1 (it) |
IT (1) | IT1165399B (it) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4292675A (en) * | 1979-07-30 | 1981-09-29 | International Business Machines Corp. | Five device merged transistor RAM cell |
US4280197A (en) * | 1979-12-07 | 1981-07-21 | Ibm Corporation | Multiple access store |
US4287575A (en) * | 1979-12-28 | 1981-09-01 | International Business Machines Corporation | High speed high density, multi-port random access memory cell |
EP0052669B1 (de) * | 1980-11-26 | 1985-03-27 | Ibm Deutschland Gmbh | Mehrfach adressierbarer hochintegrierter Halbleiterspeicher |
US4380055A (en) * | 1980-12-24 | 1983-04-12 | Mostek Corporation | Static RAM memory cell |
EP0067816A1 (en) * | 1980-12-24 | 1982-12-29 | Mostek Corporation | Static ram memory cell |
US4460984A (en) * | 1981-12-30 | 1984-07-17 | International Business Machines Corporation | Memory array with switchable upper and lower word lines |
US4489381A (en) * | 1982-08-06 | 1984-12-18 | International Business Machines Corporation | Hierarchical memories having two ports at each subordinate memory level |
JPH0652530B2 (ja) * | 1982-10-25 | 1994-07-06 | 株式会社日立製作所 | ベクトル・プロセッサ |
JPS5998365A (ja) * | 1982-11-27 | 1984-06-06 | Shigeto Suzuki | 複数同時アクセス型記憶装置 |
US4554645A (en) * | 1983-03-10 | 1985-11-19 | International Business Machines Corporation | Multi-port register implementation |
US4601016A (en) * | 1983-06-24 | 1986-07-15 | Honeywell Inc. | Semiconductor memory cell |
US4570090A (en) * | 1983-06-30 | 1986-02-11 | International Business Machines Corporation | High-speed sense amplifier circuit with inhibit capability |
US4599708A (en) * | 1983-12-30 | 1986-07-08 | International Business Machines Corporation | Method and structure for machine data storage with simultaneous write and read |
JPS6194290A (ja) * | 1984-10-15 | 1986-05-13 | Fujitsu Ltd | 半導体メモリ |
JPS61262922A (ja) * | 1985-05-17 | 1986-11-20 | Fujitsu Ltd | レジスタデ−タの高速スタツク回路 |
DE3680843D1 (de) * | 1985-08-30 | 1991-09-19 | Sgs Thomson Microelectronics | Parallele zeile pro zeile datenuebertragung in ram-speichern. |
JPH01143093A (ja) * | 1987-11-27 | 1989-06-05 | Nec Corp | 半導体メモリ |
DE3863072D1 (de) * | 1988-02-26 | 1991-07-04 | Ibm | Zweistufiger leserverstaerker fuer ram-speicher. |
JPH01273290A (ja) * | 1988-04-25 | 1989-11-01 | Nec Corp | 半導体メモリ装置 |
JPH04367058A (ja) * | 1991-06-14 | 1992-12-18 | Matsushita Electric Ind Co Ltd | 情報装置 |
JP3133601B2 (ja) * | 1994-02-09 | 2001-02-13 | 株式会社東芝 | パラレル・シリアル変換装置及びこれを用いた線形変換装置 |
US5757693A (en) * | 1997-02-19 | 1998-05-26 | International Business Machines Corporation | Gain memory cell with diode |
JP3489967B2 (ja) * | 1997-06-06 | 2004-01-26 | 松下電器産業株式会社 | 半導体記憶装置及びキャッシュメモリ装置 |
US10515689B2 (en) * | 2018-03-20 | 2019-12-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory circuit configuration and method |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3471838A (en) * | 1965-06-21 | 1969-10-07 | Magnavox Co | Simultaneous read and write memory configuration |
US3638204A (en) * | 1969-12-19 | 1972-01-25 | Ibm | Semiconductive cell for a storage having a plurality of simultaneously accessible locations |
US3675218A (en) * | 1970-01-15 | 1972-07-04 | Ibm | Independent read-write monolithic memory array |
US3761898A (en) * | 1971-03-05 | 1973-09-25 | Raytheon Co | Random access memory |
US3781828A (en) * | 1972-05-04 | 1973-12-25 | Ibm | Three-dimensionally addressed memory |
US3795898A (en) * | 1972-11-03 | 1974-03-05 | Advanced Memory Syst | Random access read/write semiconductor memory |
FR2266259B1 (it) * | 1974-03-26 | 1977-09-30 | Thomson Csf | |
US3968480A (en) * | 1974-04-25 | 1976-07-06 | Honeywell Inc. | Memory cell |
US4125877A (en) * | 1976-11-26 | 1978-11-14 | Motorola, Inc. | Dual port random access memory storage cell |
US4070657A (en) * | 1977-01-03 | 1978-01-24 | Honeywell Information Systems Inc. | Current mode simultaneous dual-read/single-write memory device |
US4127899A (en) * | 1977-12-05 | 1978-11-28 | International Business Machines Corporation | Self-quenching memory cell |
-
1979
- 1979-01-02 US US06/000,058 patent/US4193127A/en not_active Expired - Lifetime
- 1979-09-24 EP EP79103606A patent/EP0012796B1/de not_active Expired
- 1979-09-24 DE DE7979103606T patent/DE2965203D1/de not_active Expired
- 1979-12-20 IT IT28237/79A patent/IT1165399B/it active
- 1979-12-20 JP JP54164877A patent/JPS5846794B2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0012796B1 (de) | 1983-04-13 |
EP0012796A3 (en) | 1980-07-23 |
EP0012796A2 (de) | 1980-07-09 |
IT1165399B (it) | 1987-04-22 |
US4193127A (en) | 1980-03-11 |
DE2965203D1 (en) | 1983-05-19 |
JPS5593588A (en) | 1980-07-16 |
JPS5846794B2 (ja) | 1983-10-18 |
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