IT7928129A0 - Memoria perfezionata. - Google Patents

Memoria perfezionata.

Info

Publication number
IT7928129A0
IT7928129A0 IT7928129A IT2812979A IT7928129A0 IT 7928129 A0 IT7928129 A0 IT 7928129A0 IT 7928129 A IT7928129 A IT 7928129A IT 2812979 A IT2812979 A IT 2812979A IT 7928129 A0 IT7928129 A0 IT 7928129A0
Authority
IT
Italy
Prior art keywords
perfected
memory
perfected memory
Prior art date
Application number
IT7928129A
Other languages
English (en)
Other versions
IT1165433B (it
Inventor
Councill Edwin Dayne
Kelly Helen Janet
Lee Hua-Tung
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT7928129A0 publication Critical patent/IT7928129A0/it
Application granted granted Critical
Publication of IT1165433B publication Critical patent/IT1165433B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H01L27/1057Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components comprising charge coupled devices [CCD] or charge injection devices [CID]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/287Organisation of a multiplicity of shift registers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
IT28129/79A 1978-12-29 1979-12-18 Memoria perfezionata IT1165433B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/974,587 US4225947A (en) 1978-12-29 1978-12-29 Three phase line-addressable serial-parallel-serial storage array

Publications (2)

Publication Number Publication Date
IT7928129A0 true IT7928129A0 (it) 1979-12-18
IT1165433B IT1165433B (it) 1987-04-22

Family

ID=25522222

Family Applications (1)

Application Number Title Priority Date Filing Date
IT28129/79A IT1165433B (it) 1978-12-29 1979-12-18 Memoria perfezionata

Country Status (4)

Country Link
US (1) US4225947A (it)
EP (1) EP0012841B1 (it)
DE (1) DE2967586D1 (it)
IT (1) IT1165433B (it)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2520910B1 (fr) * 1982-02-04 1987-07-10 Victor Company Of Japan Dispositif a memoire video
US4675847A (en) * 1985-06-27 1987-06-23 The United States Of America As Represented By The Secretary Of The Air Force CCD recirculation data flow arrangement
US4789960A (en) * 1987-01-30 1988-12-06 Rca Licensing Corporation Dual port video memory system having semi-synchronous data input and data output
NL8701110A (nl) * 1987-05-11 1988-12-01 Philips Nv Ladingsgekoppelde inrichting.
NL8701392A (nl) * 1987-06-16 1989-01-16 Philips Nv In verschillende modes schakelbare geheugeninrichting.
US5093807A (en) 1987-12-23 1992-03-03 Texas Instruments Incorporated Video frame storage system
US5587962A (en) * 1987-12-23 1996-12-24 Texas Instruments Incorporated Memory circuit accommodating both serial and random access including an alternate address buffer register
NL8900540A (nl) * 1989-03-06 1990-10-01 Philips Nv Halfgeleiderinrichting.
US5331165A (en) * 1992-12-01 1994-07-19 Ball Corporation Split event reduced x-ray imager

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3890633A (en) * 1971-04-06 1975-06-17 Rca Corp Charge-coupled circuits
US3763480A (en) * 1971-10-12 1973-10-02 Rca Corp Digital and analog data handling devices
US4092734A (en) * 1971-12-14 1978-05-30 Texas Instruments Incorporated Analogue memory
US3766534A (en) * 1972-11-15 1973-10-16 Ibm Shift register storage unit with multi-dimensional dynamic ordering
US3914748A (en) * 1974-04-29 1975-10-21 Texas Instruments Inc Isolation-element CCD serial-parallel-serial analog memory
US3953837A (en) * 1974-11-27 1976-04-27 Texas Instruments Incorporated Dual serial-parallel-serial analog memory
US3944990A (en) * 1974-12-06 1976-03-16 Intel Corporation Semiconductor memory employing charge-coupled shift registers with multiplexed refresh amplifiers
US4024512A (en) * 1975-06-16 1977-05-17 Fairchild Camera And Instrument Corporation Line-addressable random-access memory
US4011548A (en) * 1975-07-02 1977-03-08 Burroughs Corporation Three phase charge-coupled device memory with inhibit lines
DE2543023C3 (de) * 1975-09-26 1981-07-09 Siemens AG, 1000 Berlin und 8000 München Speicheranordnung mit Bausteinen aus Ladungsverschiebespeichern
DE2729361A1 (de) * 1976-07-29 1978-02-09 Motorola Inc Speicherschaltung
US4152780A (en) * 1977-10-20 1979-05-01 Sperry Rand Corporation SPS CCD memory system with serial I/O registers

Also Published As

Publication number Publication date
DE2967586D1 (en) 1986-04-17
EP0012841A3 (en) 1981-05-06
EP0012841A2 (de) 1980-07-09
US4225947A (en) 1980-09-30
EP0012841B1 (de) 1986-03-12
IT1165433B (it) 1987-04-22

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