IT7925327A0 - Processo per drogare con boro corpi di silicio. - Google Patents

Processo per drogare con boro corpi di silicio.

Info

Publication number
IT7925327A0
IT7925327A0 IT7925327A IT2532779A IT7925327A0 IT 7925327 A0 IT7925327 A0 IT 7925327A0 IT 7925327 A IT7925327 A IT 7925327A IT 2532779 A IT2532779 A IT 2532779A IT 7925327 A0 IT7925327 A0 IT 7925327A0
Authority
IT
Italy
Prior art keywords
dopping
boron
silicon bodies
bodies
silicon
Prior art date
Application number
IT7925327A
Other languages
English (en)
Other versions
IT1122874B (it
Inventor
Briska Marian
Thiel Klaus Peter
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT7925327A0 publication Critical patent/IT7925327A0/it
Application granted granted Critical
Publication of IT1122874B publication Critical patent/IT1122874B/it

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B31/00Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
    • C30B31/02Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor by contacting with diffusion materials in the solid state
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/918Light emitting regenerative switching device, e.g. light emitting scr arrays, circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Formation Of Insulating Films (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
IT25327/79A 1978-09-07 1979-08-29 Processo per drogare con boro corpi di silicio IT1122874B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19782838928 DE2838928A1 (de) 1978-09-07 1978-09-07 Verfahren zum dotieren von siliciumkoerpern mit bor

Publications (2)

Publication Number Publication Date
IT7925327A0 true IT7925327A0 (it) 1979-08-29
IT1122874B IT1122874B (it) 1986-04-30

Family

ID=6048854

Family Applications (1)

Application Number Title Priority Date Filing Date
IT25327/79A IT1122874B (it) 1978-09-07 1979-08-29 Processo per drogare con boro corpi di silicio

Country Status (6)

Country Link
US (1) US4249970A (it)
EP (1) EP0008642B1 (it)
JP (1) JPS6043654B2 (it)
CA (1) CA1125440A (it)
DE (2) DE2838928A1 (it)
IT (1) IT1122874B (it)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2951292A1 (de) * 1979-12-20 1981-07-02 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren zum dotieren von siliciumkoerpern durch eindiffundieren von bor
JPS5840823A (ja) * 1981-09-04 1983-03-09 Hitachi Ltd 半導体装置の製法
NL8104862A (nl) * 1981-10-28 1983-05-16 Philips Nv Halfgeleiderinrichting, en werkwijze ter vervaardiging daarvan.
JPS5994861A (ja) * 1982-11-24 1984-05-31 Hitachi Ltd 半導体集積回路装置及びその製造方法
US4514440A (en) * 1983-12-12 1985-04-30 Allied Corporation Spin-on dopant method
US4588454A (en) * 1984-12-21 1986-05-13 Linear Technology Corporation Diffusion of dopant into a semiconductor wafer
JPS63205954A (ja) * 1987-02-23 1988-08-25 Meidensha Electric Mfg Co Ltd 半導体素子
US5567978A (en) * 1995-02-03 1996-10-22 Harris Corporation High voltage, junction isolation semiconductor device having dual conductivity tape buried regions and its process of manufacture
US6544655B1 (en) * 2000-08-08 2003-04-08 Honeywell International Inc. Methods for reducing the curvature in boron-doped silicon micromachined structures
JP4698354B2 (ja) * 2005-09-15 2011-06-08 株式会社リコー Cvd装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL135875C (it) * 1958-06-09 1900-01-01
US3281915A (en) * 1963-04-02 1966-11-01 Rca Corp Method of fabricating a semiconductor device
GB1115140A (en) * 1966-12-30 1968-05-29 Standard Telephones Cables Ltd Semiconductors
US3542609A (en) * 1967-11-22 1970-11-24 Itt Double depositions of bbr3 in silicon
US3577287A (en) * 1968-02-12 1971-05-04 Gen Motors Corp Aluminum diffusion technique
US3753809A (en) * 1970-01-09 1973-08-21 Ibm Method for obtaining optimum phosphorous concentration in semiconductor wafers
US3676231A (en) * 1970-02-20 1972-07-11 Ibm Method for producing high performance semiconductor device
FR2092728A7 (en) * 1970-06-12 1972-01-28 Radiotechnique Compelec N-doped silicon - by phosphorus diffusion from phosphine
US3806382A (en) * 1972-04-06 1974-04-23 Ibm Vapor-solid impurity diffusion process
US4149915A (en) * 1978-01-27 1979-04-17 International Business Machines Corporation Process for producing defect-free semiconductor devices having overlapping high conductivity impurity regions

Also Published As

Publication number Publication date
CA1125440A (en) 1982-06-08
DE2838928A1 (de) 1980-03-20
EP0008642B1 (de) 1982-07-28
US4249970A (en) 1981-02-10
EP0008642A1 (de) 1980-03-19
IT1122874B (it) 1986-04-30
JPS5538097A (en) 1980-03-17
DE2963405D1 (en) 1982-09-16
JPS6043654B2 (ja) 1985-09-30

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