IT1397574B1 - Dispositivo a semiconduttore di potenza di tipo multi-drain e relativa struttura di terminazione di bordo - Google Patents

Dispositivo a semiconduttore di potenza di tipo multi-drain e relativa struttura di terminazione di bordo

Info

Publication number
IT1397574B1
IT1397574B1 ITTO2008A000999A ITTO20080999A IT1397574B1 IT 1397574 B1 IT1397574 B1 IT 1397574B1 IT TO2008A000999 A ITTO2008A000999 A IT TO2008A000999A IT TO20080999 A ITTO20080999 A IT TO20080999A IT 1397574 B1 IT1397574 B1 IT 1397574B1
Authority
IT
Italy
Prior art keywords
relative
semiconductor device
power semiconductor
type power
termination structure
Prior art date
Application number
ITTO2008A000999A
Other languages
English (en)
Inventor
Mario Giuseppe Saggio
Alfio Guarnera
Original Assignee
St Microelectronics Rousset
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Rousset filed Critical St Microelectronics Rousset
Priority to ITTO2008A000999A priority Critical patent/IT1397574B1/it
Priority to US12/640,980 priority patent/US8455956B2/en
Publication of ITTO20080999A1 publication Critical patent/ITTO20080999A1/it
Application granted granted Critical
Publication of IT1397574B1 publication Critical patent/IT1397574B1/it
Priority to US13/887,066 priority patent/US8828809B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063—Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
ITTO2008A000999A 2008-12-29 2008-12-29 Dispositivo a semiconduttore di potenza di tipo multi-drain e relativa struttura di terminazione di bordo IT1397574B1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
ITTO2008A000999A IT1397574B1 (it) 2008-12-29 2008-12-29 Dispositivo a semiconduttore di potenza di tipo multi-drain e relativa struttura di terminazione di bordo
US12/640,980 US8455956B2 (en) 2008-12-29 2009-12-17 Multi-drain semiconductor power device and edge-termination structure thereof
US13/887,066 US8828809B2 (en) 2008-12-29 2013-05-03 Multi-drain semiconductor power device and edge-termination structure thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITTO2008A000999A IT1397574B1 (it) 2008-12-29 2008-12-29 Dispositivo a semiconduttore di potenza di tipo multi-drain e relativa struttura di terminazione di bordo

Publications (2)

Publication Number Publication Date
ITTO20080999A1 ITTO20080999A1 (it) 2010-06-30
IT1397574B1 true IT1397574B1 (it) 2013-01-16

Family

ID=40933724

Family Applications (1)

Application Number Title Priority Date Filing Date
ITTO2008A000999A IT1397574B1 (it) 2008-12-29 2008-12-29 Dispositivo a semiconduttore di potenza di tipo multi-drain e relativa struttura di terminazione di bordo

Country Status (2)

Country Link
US (2) US8455956B2 (it)
IT (1) IT1397574B1 (it)

Families Citing this family (16)

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US8476698B2 (en) 2010-02-19 2013-07-02 Alpha And Omega Semiconductor Incorporated Corner layout for superjunction device
JP5719167B2 (ja) 2010-12-28 2015-05-13 ルネサスエレクトロニクス株式会社 半導体装置
US8829640B2 (en) * 2011-03-29 2014-09-09 Alpha And Omega Semiconductor Incorporated Configuration and method to generate saddle junction electric field in edge termination
CN103426738B (zh) * 2012-05-17 2018-05-18 恩智浦美国有限公司 具有边缘端部结构的沟槽半导体器件及其制造方法
KR101403061B1 (ko) * 2012-12-12 2014-06-27 주식회사 케이이씨 전력 반도체 디바이스
JP6197294B2 (ja) * 2013-01-16 2017-09-20 富士電機株式会社 半導体素子
TW201430957A (zh) * 2013-01-25 2014-08-01 Anpec Electronics Corp 半導體功率元件的製作方法
US9117694B2 (en) * 2013-05-01 2015-08-25 Infineon Technologies Austria Ag Super junction structure semiconductor device based on a compensation structure including compensation layers and a fill structure
US9070580B2 (en) 2013-05-01 2015-06-30 Infineon Technologies Austria Ag Semiconductor device with a super junction structure based on a compensation structure with compensation layers and having a compensation rate gradient
US9024383B2 (en) 2013-05-01 2015-05-05 Infineon Technologies Austria Ag Semiconductor device with a super junction structure with one, two or more pairs of compensation layers
US9281392B2 (en) 2014-06-27 2016-03-08 Infineon Technologies Austria Ag Charge compensation structure and manufacturing therefor
TWI562378B (en) * 2015-06-24 2016-12-11 Episil Technologies Inc Semiconductor device
CN105448961B (zh) * 2015-11-17 2019-05-21 深圳尚阳通科技有限公司 超结器件的终端保护结构
CN108428632B (zh) * 2017-02-15 2021-03-12 深圳尚阳通科技有限公司 超结器件的制造方法
US10263070B2 (en) 2017-06-12 2019-04-16 Alpha And Omega Semiconductor (Cayman) Ltd. Method of manufacturing LV/MV super junction trench power MOSFETs
US11362209B2 (en) * 2019-04-16 2022-06-14 Semiconductor Components Industries, Llc Gate polysilicon feed structures for trench devices

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6228719B1 (en) * 1995-11-06 2001-05-08 Stmicroelectronics S.R.L. MOS technology power device with low output resistance and low capacitance, and related manufacturing process
EP1011146B1 (en) * 1998-12-09 2006-03-08 STMicroelectronics S.r.l. Method of manufacturing an integrated edge structure for high voltage semiconductor devices
EP1009036B1 (en) * 1998-12-09 2007-09-19 STMicroelectronics S.r.l. High-voltage MOS-gated power device, and related manufacturing process
JP4765012B2 (ja) * 2000-02-09 2011-09-07 富士電機株式会社 半導体装置及びその製造方法
EP1160873A1 (en) * 2000-05-19 2001-12-05 STMicroelectronics S.r.l. MOS technology power device
GB2373634B (en) * 2000-10-31 2004-12-08 Fuji Electric Co Ltd Semiconductor device
JP3908572B2 (ja) * 2002-03-18 2007-04-25 株式会社東芝 半導体素子
JP4904673B2 (ja) * 2004-02-09 2012-03-28 富士電機株式会社 半導体装置および半導体装置の製造方法
EP1696490A1 (en) * 2005-02-25 2006-08-30 STMicroelectronics S.r.l. Charge compensation semiconductor device and relative manufacturing process
EP1742258A1 (en) * 2005-07-08 2007-01-10 STMicroelectronics S.r.l. Semiconductor power device with multiple drain and corresponding manufacturing process
EP1742259A1 (en) * 2005-07-08 2007-01-10 STMicroelectronics S.r.l. Semiconductor power device with multiple drain structure and corresponding manufacturing process
US7592668B2 (en) * 2006-03-30 2009-09-22 Fairchild Semiconductor Corporation Charge balance techniques for power devices
US8304311B2 (en) 2006-04-11 2012-11-06 Stmicroelectronics S.R.L. Process for manufacturing a semiconductor power device comprising charge-balance column structures and respective device
CN101467258B (zh) 2006-04-21 2012-02-08 意法半导体股份有限公司 用于制造功率半导体器件的工艺和相应功率半导体器件

Also Published As

Publication number Publication date
US8455956B2 (en) 2013-06-04
ITTO20080999A1 (it) 2010-06-30
US20100163972A1 (en) 2010-07-01
US20130244397A1 (en) 2013-09-19
US8828809B2 (en) 2014-09-09

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