IT1271298B - Processo fotolitografico per contatto per la realizzazione di linee metalliche su un substrato - Google Patents

Processo fotolitografico per contatto per la realizzazione di linee metalliche su un substrato

Info

Publication number
IT1271298B
IT1271298B ITMI942565A ITMI942565A IT1271298B IT 1271298 B IT1271298 B IT 1271298B IT MI942565 A ITMI942565 A IT MI942565A IT MI942565 A ITMI942565 A IT MI942565A IT 1271298 B IT1271298 B IT 1271298B
Authority
IT
Italy
Prior art keywords
realization
substrate
contact
metal lines
photolithographic process
Prior art date
Application number
ITMI942565A
Other languages
English (en)
Inventor
Barbara Gabbrielli
Osvaldo Crippa
Original Assignee
Alcatel Italia
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Italia filed Critical Alcatel Italia
Priority to ITMI942565A priority Critical patent/IT1271298B/it
Publication of ITMI942565A0 publication Critical patent/ITMI942565A0/it
Priority to US08/561,264 priority patent/US5856067A/en
Priority to JP7310987A priority patent/JPH08262744A/ja
Priority to EP95119460A priority patent/EP0718875A3/en
Publication of ITMI942565A1 publication Critical patent/ITMI942565A1/it
Application granted granted Critical
Publication of IT1271298B publication Critical patent/IT1271298B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2002—Exposure; Apparatus therefor with visible light or UV light, through an original having an opaque pattern on a transparent support, e.g. film printing, projection printing; by reflection of visible or UV light from an original such as a printed image
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
ITMI942565A 1994-12-20 1994-12-20 Processo fotolitografico per contatto per la realizzazione di linee metalliche su un substrato IT1271298B (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
ITMI942565A IT1271298B (it) 1994-12-20 1994-12-20 Processo fotolitografico per contatto per la realizzazione di linee metalliche su un substrato
US08/561,264 US5856067A (en) 1994-12-20 1995-11-21 Contact photolithographic process for realizing metal lines on a substrate by varying exposure energy
JP7310987A JPH08262744A (ja) 1994-12-20 1995-11-29 基体上に金属ラインを形成する接触フォトリソグラフ処理方法
EP95119460A EP0718875A3 (en) 1994-12-20 1995-12-11 Contact photolithographic process for making metallic lines on a substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITMI942565A IT1271298B (it) 1994-12-20 1994-12-20 Processo fotolitografico per contatto per la realizzazione di linee metalliche su un substrato

Publications (3)

Publication Number Publication Date
ITMI942565A0 ITMI942565A0 (it) 1994-12-20
ITMI942565A1 ITMI942565A1 (it) 1996-06-20
IT1271298B true IT1271298B (it) 1997-05-27

Family

ID=11370020

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI942565A IT1271298B (it) 1994-12-20 1994-12-20 Processo fotolitografico per contatto per la realizzazione di linee metalliche su un substrato

Country Status (4)

Country Link
US (1) US5856067A (it)
EP (1) EP0718875A3 (it)
JP (1) JPH08262744A (it)
IT (1) IT1271298B (it)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3522470B2 (ja) * 1996-12-04 2004-04-26 株式会社ルネサステクノロジ 半導体装置の製造方法
KR20030068733A (ko) * 2002-02-16 2003-08-25 광전자 주식회사 평탄화 구조를 갖는 반도체 소자 및 그 제조방법
US7772064B2 (en) 2007-03-05 2010-08-10 United Microelectronics Corp. Method of fabricating self-aligned contact

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2529054C2 (de) * 1975-06-30 1982-04-29 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren zur Herstellung eines zur Vorlage negativen Resistbildes
JPS58159326A (ja) * 1982-03-18 1983-09-21 Toshiba Corp 半導体用パタ−ン転写方式
JPS59141227A (ja) * 1983-02-01 1984-08-13 Mitsubishi Electric Corp 微細パタ−ン形成方法
US5178986A (en) * 1988-10-17 1993-01-12 Shipley Company Inc. Positive photoresist composition with naphthoquinonediazidesulfonate of oligomeric phenol
US5091342A (en) * 1989-02-24 1992-02-25 Hewlett-Packard Company Multilevel resist plated transfer layer process for fine line lithography
JPH02262155A (ja) * 1989-03-31 1990-10-24 Toshiba Corp レジストパターンの形成方法
US5178989A (en) * 1989-07-21 1993-01-12 Board Of Regents, The University Of Texas System Pattern forming and transferring processes
US5242770A (en) * 1992-01-16 1993-09-07 Microunity Systems Engineering, Inc. Mask for photolithography

Also Published As

Publication number Publication date
ITMI942565A1 (it) 1996-06-20
EP0718875A3 (en) 1997-10-01
EP0718875A2 (en) 1996-06-26
US5856067A (en) 1999-01-05
ITMI942565A0 (it) 1994-12-20
JPH08262744A (ja) 1996-10-11

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19971128