IT1254810B - DEVICE TO SUPPRESS THE POWER NOISE IN SEMICONDUCTOR INTEGRATED CIRCUITS. - Google Patents

DEVICE TO SUPPRESS THE POWER NOISE IN SEMICONDUCTOR INTEGRATED CIRCUITS.

Info

Publication number
IT1254810B
IT1254810B ITMI920375A ITMI920375A IT1254810B IT 1254810 B IT1254810 B IT 1254810B IT MI920375 A ITMI920375 A IT MI920375A IT MI920375 A ITMI920375 A IT MI920375A IT 1254810 B IT1254810 B IT 1254810B
Authority
IT
Italy
Prior art keywords
power
suppress
integrated circuit
semiconductor integrated
substrate
Prior art date
Application number
ITMI920375A
Other languages
Italian (it)
Inventor
Deok-Min Lee
Yong-Ho Park
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI920375A0 publication Critical patent/ITMI920375A0/en
Publication of ITMI920375A1 publication Critical patent/ITMI920375A1/en
Application granted granted Critical
Publication of IT1254810B publication Critical patent/IT1254810B/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B29/00Generation of noise currents and voltages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49589Capacitor integral with or on the leadframe
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    • H01ELECTRIC ELEMENTS
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure
    • H01L23/5286Arrangements of power or ground buses
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B15/00Suppression or limitation of noise or interference
    • H04B15/005Reducing noise, e.g. humm, from the supply
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
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    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
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    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Geometry (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
  • Filters And Equalizers (AREA)

Abstract

E' descritto un dispositivo a circuito integrato a semiconduttore sopprimere i rumori di alimentazione indotti su una linea di alimentazione durante funzionamento ad alta velocità del dispositivo. Sul lato posteriore di un substrato di semiconduttore avente un circuito integrato formato su esso, è depositata a guisa di rivestimento una pellicola dielettrica avente elevata permittività, così da formare una grande capacità tra un telaietto adduttori del contenitore ed il substrato. Successivamente, potenza avente polarità opposta a quella di un'alimentazione di potenza applicata al substrato è collegata al telaietto adduttori così da formare un condensatore di disaccoppiamento tra terminali di potenza o alimentazione di una piastrina. In tal modo, il rumore di alimentazione è ridotto e l'area di progettazione nel circuito integrato può essere ridotta.A semiconductor integrated circuit device is disclosed to suppress the power noises induced on a power line during high speed operation of the device. On the rear side of a semiconductor substrate having an integrated circuit formed on it, a dielectric film having high permittivity is deposited as a coating, so as to form a large capacity between a container adductor frame and the substrate. Subsequently, power having polarity opposite to that of a power supply applied to the substrate is connected to the adductor frame so as to form a decoupling capacitor between power terminals or power supply of a plate. In this way, the supply noise is reduced and the design area in the integrated circuit can be reduced.

ITMI920375A 1991-08-19 1992-02-20 DEVICE TO SUPPRESS THE POWER NOISE IN SEMICONDUCTOR INTEGRATED CIRCUITS. IT1254810B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910014266A KR930005334A (en) 1991-08-19 1991-08-19 Integrated Circuit for Suppressing Supply Noise

Publications (3)

Publication Number Publication Date
ITMI920375A0 ITMI920375A0 (en) 1992-02-20
ITMI920375A1 ITMI920375A1 (en) 1993-08-20
IT1254810B true IT1254810B (en) 1995-10-11

Family

ID=19318748

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI920375A IT1254810B (en) 1991-08-19 1992-02-20 DEVICE TO SUPPRESS THE POWER NOISE IN SEMICONDUCTOR INTEGRATED CIRCUITS.

Country Status (7)

Country Link
JP (1) JPH0547808A (en)
KR (1) KR930005334A (en)
DE (1) DE4206278A1 (en)
FR (1) FR2680602A1 (en)
GB (1) GB2258943A (en)
IT (1) IT1254810B (en)
TW (1) TW200631B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU6900096A (en) * 1995-09-29 1997-04-17 Analog Devices, Inc. Integrated circuit and supply decoupling capacitor therefor
JP2007173339A (en) 2005-12-20 2007-07-05 Nec Electronics Corp Semiconductor circuit

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1816023A1 (en) * 1968-12-20 1970-06-25 Philips Patentverwaltung Module with electronic circuit
JPS58164246A (en) * 1982-03-24 1983-09-29 Nec Corp Semiconductor device
US4516123A (en) * 1982-12-27 1985-05-07 At&T Bell Laboratories Integrated circuit including logic array with distributed ground connections
JPS6167231A (en) * 1984-09-10 1986-04-07 Matsushita Electric Ind Co Ltd Semiconductor device
JPS61108160A (en) * 1984-11-01 1986-05-26 Nec Corp Semiconductor device with built-in capacitor and manufacture thereof
US4737830A (en) * 1986-01-08 1988-04-12 Advanced Micro Devices, Inc. Integrated circuit structure having compensating means for self-inductance effects
JP2674073B2 (en) * 1988-03-17 1997-11-05 松下電器産業株式会社 Integrated circuit device
JPH01305543A (en) * 1988-06-03 1989-12-08 New Japan Radio Co Ltd Semiconductor device
JPH02224367A (en) * 1989-02-27 1990-09-06 Ricoh Co Ltd Semiconductor device provided with capacitor

Also Published As

Publication number Publication date
KR930005334A (en) 1993-03-23
GB9204460D0 (en) 1992-04-15
GB2258943A (en) 1993-02-24
FR2680602A1 (en) 1993-02-26
ITMI920375A0 (en) 1992-02-20
ITMI920375A1 (en) 1993-08-20
TW200631B (en) 1993-02-21
DE4206278A1 (en) 1993-02-25
JPH0547808A (en) 1993-02-26

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