JPS56169355A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56169355A
JPS56169355A JP7238580A JP7238580A JPS56169355A JP S56169355 A JPS56169355 A JP S56169355A JP 7238580 A JP7238580 A JP 7238580A JP 7238580 A JP7238580 A JP 7238580A JP S56169355 A JPS56169355 A JP S56169355A
Authority
JP
Japan
Prior art keywords
terminals
terminal
current manner
semiconductor device
grounding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7238580A
Other languages
Japanese (ja)
Other versions
JPS6259462B2 (en
Inventor
Hiromitsu Yamashita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7238580A priority Critical patent/JPS56169355A/en
Publication of JPS56169355A publication Critical patent/JPS56169355A/en
Publication of JPS6259462B2 publication Critical patent/JPS6259462B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the oscillation and the interference of a semiconductor device by grounding the terminals at both sides of an input terminal in a direct current manner when the terminal is engaged with the terminal hole of a wiring substrate and is electrically connected, thereby reducing the capacity between the terminals. CONSTITUTION:The terminals 3-8 of an IC package are respectively connected to wiring electrodes 3a-8a of printed boards 2, and grounding terminals 4, 5 are disposed at both sides of the input terminal 3. According to measurements, the capacity between the terminals of a plastic molded package 1 is approx. 1pF between the adjacent terminals, is 0.2pF when one terminal is provided at the intermediate and is floated in an alternating current manner and can be reduced to 0.06pF when it is grounded in a direct current manner, thereby performing large effects to the prevention of the oscillation and the interference of the semiconductor device. Or, when a terminal grounded in an alternating current manner through a capacitor is disposed between the input terminal 3 and the grounding electrodes 4, 5, further effects can be performed.
JP7238580A 1980-05-29 1980-05-29 Semiconductor device Granted JPS56169355A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7238580A JPS56169355A (en) 1980-05-29 1980-05-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7238580A JPS56169355A (en) 1980-05-29 1980-05-29 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS56169355A true JPS56169355A (en) 1981-12-26
JPS6259462B2 JPS6259462B2 (en) 1987-12-11

Family

ID=13487758

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7238580A Granted JPS56169355A (en) 1980-05-29 1980-05-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS56169355A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0150101A2 (en) * 1984-01-19 1985-07-31 The Rank Organisation Plc Improvements in interference suppression for semi-conducting switching devices
JPS62208714A (en) * 1986-03-10 1987-09-14 Toshiba Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0150101A2 (en) * 1984-01-19 1985-07-31 The Rank Organisation Plc Improvements in interference suppression for semi-conducting switching devices
JPS62208714A (en) * 1986-03-10 1987-09-14 Toshiba Corp Semiconductor device

Also Published As

Publication number Publication date
JPS6259462B2 (en) 1987-12-11

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