IT1224656B - Procedimento per la fabbricazione di condensatori integrati in tecnologia mos. - Google Patents

Procedimento per la fabbricazione di condensatori integrati in tecnologia mos.

Info

Publication number
IT1224656B
IT1224656B IT8723200A IT2320087A IT1224656B IT 1224656 B IT1224656 B IT 1224656B IT 8723200 A IT8723200 A IT 8723200A IT 2320087 A IT2320087 A IT 2320087A IT 1224656 B IT1224656 B IT 1224656B
Authority
IT
Italy
Prior art keywords
procedure
manufacture
mos technology
capacitors integrated
capacitors
Prior art date
Application number
IT8723200A
Other languages
English (en)
Other versions
IT8723200A0 (it
Inventor
Danilo Re
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT8723200A priority Critical patent/IT1224656B/it
Publication of IT8723200A0 publication Critical patent/IT8723200A0/it
Priority to EP88120975A priority patent/EP0321860A3/en
Priority to JP63324719A priority patent/JP2766492B2/ja
Application granted granted Critical
Publication of IT1224656B publication Critical patent/IT1224656B/it
Priority to US08/675,520 priority patent/US5851871A/en
Priority to JP9203590A priority patent/JPH10144871A/ja

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
IT8723200A 1987-12-23 1987-12-23 Procedimento per la fabbricazione di condensatori integrati in tecnologia mos. IT1224656B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8723200A IT1224656B (it) 1987-12-23 1987-12-23 Procedimento per la fabbricazione di condensatori integrati in tecnologia mos.
EP88120975A EP0321860A3 (en) 1987-12-23 1988-12-15 Process for manufacturing integrated capacitors in mos technology
JP63324719A JP2766492B2 (ja) 1987-12-23 1988-12-21 Ｍｏｓ技術で集積キャパシタを製造するための方法
US08/675,520 US5851871A (en) 1987-12-23 1996-07-03 Process for manufacturing integrated capacitors in MOS technology
JP9203590A JPH10144871A (ja) 1987-12-23 1997-07-29 Ｃｍｏｓ半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8723200A IT1224656B (it) 1987-12-23 1987-12-23 Procedimento per la fabbricazione di condensatori integrati in tecnologia mos.

Publications (2)

Publication Number Publication Date
IT8723200A0 IT8723200A0 (it) 1987-12-23
IT1224656B true IT1224656B (it) 1990-10-18

Family

ID=11204822

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8723200A IT1224656B (it) 1987-12-23 1987-12-23 Procedimento per la fabbricazione di condensatori integrati in tecnologia mos.

Country Status (3)

Country Link
EP (1) EP0321860A3 (it)
JP (2) JP2766492B2 (it)
IT (1) IT1224656B (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5851871A (en) * 1987-12-23 1998-12-22 Sgs-Thomson Microelectronics, S.R.L. Process for manufacturing integrated capacitors in MOS technology
IT1237894B (it) * 1989-12-14 1993-06-18 Sgs Thomson Microelectronics Processo per la fabbricazione di circuiti integrati comprendenti componenti elettronici di due tipi diversi aventi ciascuno coppie di elettrodi ricavati dagli stessi strati di silicio policristallino e separati da dielettrici diversi
FR2658951B1 (fr) * 1990-02-23 1992-05-07 Bonis Maurice Procede de fabrication d'un circuit integre pour filiere analogique rapide utilisant des lignes d'interconnexions locales en siliciure.
KR0167274B1 (ko) * 1995-12-07 1998-12-15 문정환 씨모스 아날로그 반도체장치와 그 제조방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4261772A (en) * 1979-07-06 1981-04-14 American Microsystems, Inc. Method for forming voltage-invariant capacitors for MOS type integrated circuit device utilizing oxidation and reflow techniques
US4577390A (en) * 1983-02-23 1986-03-25 Texas Instruments Incorporated Fabrication of polysilicon to polysilicon capacitors with a composite dielectric layer
JPS60113960A (ja) * 1983-11-25 1985-06-20 Nec Corp 半導体容量装置
US4639274A (en) * 1984-11-28 1987-01-27 Fairchild Semiconductor Corporation Method of making precision high-value MOS capacitors
ATE64237T1 (de) * 1985-05-22 1991-06-15 Siemens Ag Verfahren zum herstellen von mit bor und phosphor dotierten siliziumoxid-schichten fuer integrierte halbleiterschaltungen.
EP0208459B1 (en) * 1985-06-24 1992-03-18 Silicon Valley Group, Inc. Process for the chemical vapour deposition of a thin film of oxide on a silicon wafer

Also Published As

Publication number Publication date
JPH02138769A (ja) 1990-05-28
EP0321860A3 (en) 1990-03-07
IT8723200A0 (it) 1987-12-23
JPH10144871A (ja) 1998-05-29
JP2766492B2 (ja) 1998-06-18
EP0321860A2 (en) 1989-06-28

Similar Documents

Publication Publication Date Title
DE3867329D1 (de) Gesichtsreiniger.
ITTO910929A1 (it) Procedimento per la fabbricazione di circuiti integrati in tecnologia mos.
NO882295D0 (no) Fremgangsmaate for fremstilling av paryledimeren.
DE3854437T2 (de) Chipkondensator.
DE3574482D1 (de) Hydrofinishingverfahren.
IT8621226A0 (it) Procedimento per la produzionr di tetrafluoruro di silicio.
DE3570007D1 (en) An organic semiconductor electrolyte capacitor and process for producing the same
DE3861570D1 (de) Spannfutter.
IT8820596A0 (it) Processo per la preparazione di epossidi.
DE3781289D1 (de) Kondensatorladeschaltung.
IT8948551A0 (it) Procedimento per la produzione di analgesia in mammiferi.
IT1224656B (it) Procedimento per la fabbricazione di condensatori integrati in tecnologia mos.
ITRM910621A0 (it) Procedimento per la fabbricazione di transistori con struttura gate -isolante -semiconduttore.
IT1213457B (it) Procedimento per la fabbricazione di dispositivi integrati, in particolare dispositivi cmos adoppia sacca.
IT1210751B (it) Sommatore veloce in tecnologia c mos
NO885200L (no) Fremgangsmaate for fremstilling av pro-legemidler.
IT1231887B (it) Procedimento per la produzione di circuiti integrati monolitici
IT8719363A0 (it) Procedimento per la produzione di calcourea.
IT8521735A0 (it) Procedimento per la riformazione di silicalite.
IT1230866B (it) Procedimento per la produzione di coke.
IT8445726A0 (it) Procedimento per la fabbricazione di asciugabiancheria.
IT8323908A0 (it) Processo per la preparazione di ossido di perfluoropropene.
IT1189143B (it) Procedimento per la realizzazione dell'isolamento di circuiti integrati a elevatissima scala d'integrazione,in particolare in tecnologia mos e cmos
IT8720230A0 (it) Processo per la preparazione di 1-alchil-3-carbossi-4-cinnoloni.
IT8721561A0 (it) Procedimento perfezionato per laproduzione di n alchilcarbammati.

Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227