IT8722216A0 - Procedimento per la produzione di circuiti integrati monolitici - Google Patents
Procedimento per la produzione di circuiti integrati monoliticiInfo
- Publication number
- IT8722216A0 IT8722216A0 IT8722216A IT2221687A IT8722216A0 IT 8722216 A0 IT8722216 A0 IT 8722216A0 IT 8722216 A IT8722216 A IT 8722216A IT 2221687 A IT2221687 A IT 2221687A IT 8722216 A0 IT8722216 A0 IT 8722216A0
- Authority
- IT
- Italy
- Prior art keywords
- procedure
- production
- integrated circuits
- monolithic integrated
- monolithic
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31608—Deposition of SiO2
- H01L21/31612—Deposition of SiO2 on a silicon body
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/909—Controlled atmosphere
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Formation Of Insulating Films (AREA)
- Chemical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8722216A IT1231887B (it) | 1987-10-09 | 1987-10-09 | Procedimento per la produzione di circuiti integrati monolitici |
DE3854710T DE3854710T2 (de) | 1987-10-09 | 1988-09-16 | Verfahren zum Herstellen von monolithischen Halbleiterschaltungen. |
EP88115210A EP0310839B1 (en) | 1987-10-09 | 1988-09-16 | A method of manufacturing monolithic integrated circuits |
US07/249,788 US4920077A (en) | 1987-10-09 | 1988-09-27 | Method of manufacturing monolythic integrated circuits |
JP63252237A JPH02313A (ja) | 1987-10-09 | 1988-10-07 | モノリシック集積回路の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT8722216A IT1231887B (it) | 1987-10-09 | 1987-10-09 | Procedimento per la produzione di circuiti integrati monolitici |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8722216A0 true IT8722216A0 (it) | 1987-10-09 |
IT1231887B IT1231887B (it) | 1992-01-15 |
Family
ID=11193182
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT8722216A IT1231887B (it) | 1987-10-09 | 1987-10-09 | Procedimento per la produzione di circuiti integrati monolitici |
Country Status (5)
Country | Link |
---|---|
US (1) | US4920077A (it) |
EP (1) | EP0310839B1 (it) |
JP (1) | JPH02313A (it) |
DE (1) | DE3854710T2 (it) |
IT (1) | IT1231887B (it) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5432128A (en) * | 1994-05-27 | 1995-07-11 | Texas Instruments Incorporated | Reliability enhancement of aluminum interconnects by reacting aluminum leads with a strengthening gas |
US5514628A (en) * | 1995-05-26 | 1996-05-07 | Texas Instruments Incorporated | Two-step sinter method utilized in conjunction with memory cell replacement by redundancies |
US6013584A (en) * | 1997-02-19 | 2000-01-11 | Applied Materials, Inc. | Methods and apparatus for forming HDP-CVD PSG film used for advanced pre-metal dielectric layer applications |
US6073576A (en) | 1997-11-25 | 2000-06-13 | Cvc Products, Inc. | Substrate edge seal and clamp for low-pressure processing equipment |
US6350673B1 (en) * | 1998-08-13 | 2002-02-26 | Texas Instruments Incorporated | Method for decreasing CHC degradation |
WO2001078126A2 (en) * | 2000-04-07 | 2001-10-18 | Philips Semiconductors, Inc. | A method of passivating a metal line on a wafer |
DE10114764B4 (de) * | 2001-03-26 | 2005-08-11 | Infineon Technologies Ag | Verfahren zur Herstellung eines integrierten Schaltkreises mit einer dynamischen Speicherzellen-Anordnung (DRAM) mit einer langen Retention-Time |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2058731A (en) * | 1979-09-12 | 1981-04-15 | Philips Electronic Associated | Method of making semiconductor devices |
US4380115A (en) * | 1979-12-06 | 1983-04-19 | Solid State Scientific, Inc. | Method of making a semiconductor device with a seal |
JPS5957458A (ja) * | 1982-09-27 | 1984-04-03 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH071764B2 (ja) * | 1984-06-01 | 1995-01-11 | テキサス インスツルメンツ インコ−ポレイテツド | 半導体装置の製造方法 |
JPH0622234B2 (ja) * | 1984-07-20 | 1994-03-23 | 富士通株式会社 | 半導体装置の製造方法 |
JPS61212025A (ja) * | 1985-03-18 | 1986-09-20 | Hitachi Ltd | Psg膜の形成方法 |
EP0225224A3 (en) * | 1985-10-29 | 1987-11-19 | Thomson Components-Mostek Corporation | After oxide metal alloy process |
-
1987
- 1987-10-09 IT IT8722216A patent/IT1231887B/it active
-
1988
- 1988-09-16 DE DE3854710T patent/DE3854710T2/de not_active Expired - Fee Related
- 1988-09-16 EP EP88115210A patent/EP0310839B1/en not_active Expired - Lifetime
- 1988-09-27 US US07/249,788 patent/US4920077A/en not_active Expired - Lifetime
- 1988-10-07 JP JP63252237A patent/JPH02313A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPH02313A (ja) | 1990-01-05 |
EP0310839B1 (en) | 1995-11-22 |
EP0310839A1 (en) | 1989-04-12 |
DE3854710T2 (de) | 1996-08-01 |
DE3854710D1 (de) | 1996-01-04 |
US4920077A (en) | 1990-04-24 |
IT1231887B (it) | 1992-01-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19971030 |