GB2058731A - Method of making semiconductor devices - Google Patents

Method of making semiconductor devices Download PDF

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Publication number
GB2058731A
GB2058731A GB7931618A GB7931618A GB2058731A GB 2058731 A GB2058731 A GB 2058731A GB 7931618 A GB7931618 A GB 7931618A GB 7931618 A GB7931618 A GB 7931618A GB 2058731 A GB2058731 A GB 2058731A
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gas mixture
silane
temperature
silicon dioxide
torr
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Philips Electronics UK Ltd
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Philips Electronic and Associated Industries Ltd
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Priority to GB7931618A priority Critical patent/GB2058731A/en
Priority to GB8029199A priority patent/GB2061243B/en
Publication of GB2058731A publication Critical patent/GB2058731A/en
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/4401—Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
    • C23C16/4408—Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber by purging residual gases from the reaction chamber or gas lines
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/401—Oxides containing silicon
    • C23C16/402—Silicon dioxide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02131—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Inorganic Chemistry (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

Silicon dioxide layers of uniform thickness are deposited on a semiconductor substrates by heating a gas mixture comprising silane and/or dichlorosilane together with nitric oxide and/or dinitrogen tetroxide at a pressure below 20 Torr and at a temperature below 750 DEG C in a reaction vessel containing the semiconductor substrate. The gas mixture may contain A or N2 as diluent, a dopant and/or HCl.

Description

SPECIFICATION Method of making semiconductor devices The invention relates to a method of making a semiconductor device, the method including the step of depositing a silicon dioxide layer on a semiconductor substrate by low-pressure chemical vapour deposition (LPCVD), and to a semiconductor device made by such a method.
The silicon dioxide layer formed may be either undoped or doped, usually with phosphorus, and is used for example in active M.O.S. gate structures, in diffusion masking, or for passivation purposes, when, for example, the silicon dioxide layer may be deposited over aluminium interconnecting patterns, which make it necessary for the silicon dioxide to be deposited at a low temperature, for example below 5000 C.
A LPCVD process has been used in the manufacture of semiconductor devices to deposit silicon dioxide layers on semiconductor substrates, for example 100 mm diameter silicon slices, in which process silane (SiH4) is reacted with oxygen. Problems which are encountered with this process include the non-uniformity of the thickness of the deposited layer over the crosssection of a substrate - the so-called "bullseye effect", the non-uniformity of the thickness of the deposited layer between different substrates in a batch, and variations in the thickness of the deposited layer on substrates in different batches.
The reaction between silane and oxygen is a homogeneous reaction, that is to say silica is formed both in the gas phase and at solid surfaces within a reaction chamber. Consequently silica particles formed in the gas phase by this reaction may be trapped in the silica layers growing on substrates. These trapped particles produce local irregularities in the thickness of a silica layer formed on a substrate and give rise both to the formation of porous layers, and as a consequence of such particles becoming detached from a deposited layer, the presence of pinholes in the finished layers. Furthermore, the definition of silica layers produced by this method over steps and in re-entrants formed during a previous etching step may not be satisfactory.
United Kingdom Patent Specification 1,520,051 describes a method of manufacturing a semiconductor device, which method includes the step of forming a polycrystalline silicon layer doped with from 2 to 45 atomic percent of oxygen atoms by a chemical vapour deposition process in which silane is reacted with nitrous oxide. The specification contains no disclosure of the pressure at which this process is conducted. The specification states that a silicon dioxide layer is formed over the oxygen-doped polycrystalline silicon layer and is produced by reacting silane with oxygen. The nitrous oxide used to form the oxygen-doped polycrystalline silicon may be replaced by nitric oxide or nitrogen dioxide.
The object of the invention is to provide low pressure chemical vapour deposition processes for depositing silicon dioxide layers by essentially heterogeneous reactions, which are more reproducible than the known LPCVD silicon dioxide processes and in particular to provide such a LPCVD process which can be conducted at temperatures below 7500C, or even for some applications at temperatures below 5000C. There is now a desire in integrated circuit technology to avoid any processing of silicon bodies after growth of monocrystalline silicon, which involves heating the silicon bodies above 7500C, since such heating may cause mechanical deformation of the surfaces of the silicon bodies.
The invention provides a method of making a semiconductor device, the method including the step of producing a silicon dioxide layer on a semiconductor substrate by heating a gas mixture comprising silane and/or dichlorosilane (SiH2CI2) together with nitric oxide and/or dinitrogen tetroxide at a pressure below 20 Torr and at a temperature below 7500C in a reaction vessel containing the semiconductor substrate.
During the investigations which led to the present invention, it was noted that the LPCVD process used to deposit polycrystalline silicon from a gas mixture consisting of silane and nitrogen at a pressure of from 0.2 to 1 5 Torr gave a fine-grained deposit having a substantially uniform grain size. This process is reproducible and is not critical with respect to temperature the deposition rate increases by approximately 2% per degree Celsius rise in temperature at 6500C. It appears that this polycrystalline silicon LPCVD process is a heterogeneous process, that is the reaction only occurs at a surface, the rate of reaction being limited by the rate of adsorption of silane on a surface, there being a steady rate of desorption of hydrogen from the surface. It is surmised that the uniformity of the deposit formed is due to the reaction being heterogeneous and surface-dependent.
The silane/oxygen LPCVD was extensively examined during the investigations which led to the present invention, and it was found that both the temperature and pressure at which the process is conducted are critical. When the operating pressure was increased significantly above 2 Torr, long whiskers grew on the edges of the semiconductor substrates and across the front surface of the first substrate traversed by the gas mixture. There was clear evidence of homogeneous gas phase reaction, and this is a major difference from the polycrystalline silicon LPCVD process, where deposition only occurs by a heterogeneous gas phase reaction on the semiconductor substrates and on the hot wall of the diffusion furnace in which the process is conducted.It was noted in the Six,"02 LPCVD process that there was a heavy deposit of silicon dioxide on the furnace wall in advance of the reaction zone in which the semiconductor substrates were located, the thickness of the deposit increasing with increasing temperature of the furnace wall.
It was noted that in the SiHdN,O process, the optimum operating temperature is the temperature at which the simple thermal decomposition of N20 becomes significant. The problem of the Six4/02 system is that it is too reactive, there is a significant rate of reaction at 200C. It appears that what is required is a system which has a controlled equilibrium availability of oxygen, including, for passivation over aluminium interconnects, a system which can operate reproducibly in the temperature range from 400 to 5000 C.
A study was made of the feasibility of new LPCVD processes using silane and/or dichlorosilane and nitrogen oxides. Excluding nitrous oxide, the other nitrogen oxides are related through the decomposition equilibria set out below.
Pure dinitrogen tetroxide boils at 220C, and dissociates reversibly above this temperature.
Dissociation into nitrogen dioxide is complete at 1400C.
N204 = 2NO, Nitrogen dioxide reversibly dissociates on heating, dissociation being complete at 6200C, when the vapour consists of an equilibrium mixture of nitric oxide and oxygen.
2NO2 = 2NO + 2 Nitric oxide decomposes irreversibly above 6200 C.
2NO < N2 + N, + 02.
Between 620 and 7000 C, this is a purely heterogeneous reaction. This reaction is of a mixed character between 700 and 11 000C, while in the range 1100 to 1 3000C it is a substantially homogeneous reaction.
The form of the silicon input to the reaction may be modified by introducing hydrogen chloride gas into the mixture. The quantities of hydrogen chloride used, may be, for example, those having chlorine contents up to that equivalent to the chlorine content of SiH2Cl2 calculated with respect to the silane used. However, smaller amounts of HCL may generally be used, which amounts would influence the kinetics of the process to a lesser degree than a quantity having a chlorine content equivalent to the chlorine content of SiH2Cl2, but which amounts have a significant influence on the dielectric properties of the deposited silica.
In one aspect of the invention, the gas mixture is formed by mixing silane and/or dichlorosilane with dinitrogen tetroxide, said gas mixture being heated at a temperature in the range from 400 to 5500C.
In another aspect of the invention, the gas mixture comprises nitric oxide together with silane and/or dichlorosilane, said gas mixture being heated at a temperature between 600 and 7500C.
Using siiane/dinitrogen tetroxide mixtures in the temperature range 430--4700C, operating at a pressure of 1 Torr, oxide layers have been deposited with only small thickness variations across the area of the layer, these variations being confined to a small peripheral annulus of the layer.
Similarly at 1 Torr and 6500C the silane/nitric oxide reaction has yielded very good quality oxides of even better uniformity.
Two embodiments of the invention will now be described with reference to the following Examples, and to the accompanying drawings, in which :- Figure 1 is a schematic side view of a longitudinal section of a low pressure chemical vapour deposition (LPCVD) apparatus suitable for performing a method according to the invention, Figure 2 is a schematic side-sectional elevation of a MOS diffusion structure comprising silica flowglass and glassover layers which can be deposited by a method according to the invention, Figure 3 is a graph in which a rate of deposition is plotted against the reciprocal of the absolute temperature for three different silane-comprising systems, and Figure 4 is a schematic side-sectional elevation of an apparatus used to detect pinholes present in silica layers which had been deposited by a method according to the invention.
Referring to Figure 1, a LPCVD apparatus comprises a 112 mm internal diameter silica furnace tube 1 which is 2 metres long, this tube 1 being provided with water-cooled end-seals 2, 3, one at each end of the tube 1. A flexible bellows 4 connects the end-seal 2 to a conduit 5 which leads to a pump system consisting of a Roots Turbine blower 6 type ER200 connected to an Edward's ISC900 rotary backing pump 7. At a pressure of 0.2 Torr, this pumping system is capable of an effective pumping speed for air of 10,000 litres/minute. The bellows 4 damp the vibrations transmitted through the conduit 5 from the pumping system. The furnace tube 1 is heated by means of a tubular electric furnace 8 provided with facilities (not shown) for controlling the temperature gradient along the length of the furnace.Silicon slices 9 which are to be coated with silica layers by a method according to the invention are loaded into a jig 10. The loaded jig 10 is inserted into the tube 1 through the end-seal 3 and a door 11 on the end-seal 3 is closed. The apparatus is provided with gas sources 12, 13, 1 5 and 16 of silane (or dichlorosilane), dinitrogen tetroxide (or nitric oxide), nitrogen and argon respectively. Pressure in the tube 1 is controlled by controlling the flowrate of nitrogen and/or argon from the sources 15 and 16 with the aid of a valve 17 operated by a Balzer control gauge (not shown) located in a gas supply line 18 connected to the throat of the Roots blower 6.
Figure 2 schematically shows a typical MOS diffusion structure 19 formed on a p-type silicon substrate 20 which includes phosphorus-doped source and drain regions 21 and 22 respectively.
A field oxide layer 23 formed by wet thermal oxidation of the substrate at 9000C is provided with an aperture which extends over the major areas of the regions 21 and 22 and the area between the regions 21 and 22. A gate oxide layer 24 procuced by dry thermal oxidation at 1 0500C bridges the regions 21 and 22. A metallic gate 25 is located over the gate oxide layer 24. A 0.6 #m thick flowglass layer 26 is deposited by a method according to the invention at 4500C on the structure, and aluminium source, gate and drain interconnects 27, 28 and 29 respectively are deposited on the relevant areas.A 0.5 ym thick glassover silica layer 30 is then deposited by a method according to the invention at 4500C so as to seal the structure, notably to prevent formation of orthophosphoric acid by hydrolysis of phosphorus pentoxide originating in the phosphorus contained in the source and drain regions 21 and 22. Any orthophosphoric acid produced in the structure would tend to corrode the aluminium interconnects.
During the investigations which led to the present invention, the rate of deposition from three gaseous silane-comprising systems, namely SiH,/N204, SiH,/NO and SiH,/N2 were studied. The systems were studied at a pressure of 1 Torr with a total flowrate of 250 mis per minute. In the SiH,/N2O4 system, the gas stream consisted of 50 mis per minute of SiH4, 50 mis per minute of N204 and 150 mis per minute of argon.The SiH,/NO and SiH#N2 systems each used gas streams containing 50 mis per minute of SiH4, together with 200 mis per minute of NO and N2 respectively. The activation energies of the SiH,/N2O4, SiHdNO and SiH,/N2 systems were 1.20 eV, 1.56 eV and 1.84 eV respectively.
The silane-nitrogen dioxide reaction may be described by the following equation:~ log (m/p) = -AE/kT + log A (1) This equation (1) may be rewritten in the form m = pAe##E?kT (2) where m is the rate of deposition of silicon dioxide expressed in micrograms per sq cm per minute, p is the pressure in Torr, A is a constant, AE is the activation energy for the process, k is the Boltzmann constant and T is the temperature in degrees Kelvin. This reaction was studied over the temperature range 430 to 6330C and over the pressure range 0.2 to 1.7 Torr. It was found that within this range, A has a approximately 5 x 105 and hE is equal to 0.91 eV/mole.Equations similar to equation (2) describe the reactions occurring in the SiHdNO and SiH#N2 systems, but of course, the values of A and AE in these equations will be different from the values given above for the SiH#N2O4 reaction. Figure 3 is a graph on which In m (where m is the mass of SiO2 or Si deposited on a solid surface, expressed in #g/cm2/minute) is plotted against 1 0#/T K, where T K is the temperature of the system.
Figure 4 shows schematically a simple apparatus which was used to detect pin-holes in the deposited silica layers. A steel container 31 has a floor 32 which is recessed on its inside face so as to accommodate a silicon slice 9 bearing a silica layer 33. Before the slice 9 was placed on the floor 32 of the container 31, the silica on one main surface of the slice 9 was removed by etching with hydrofluoric acid. A quantity of methanol 34 was placed in the container 31. A grid electrode 35 insulated from the container 31 by means of an annular member 36 was immersed in the methanol 34 and extended parallel to the surface of the silica layer 33. A transparent cover 37 was placed on a ledge 38 on the collar 36.A direct current bias of 40 volts was established between the grid 35 and the slice 9, and this produced a source 39 of hydrogen bubbles emanating from each pinhole in the silica layer 33. The pinhole density of the layer 33 was determined by counting the sources 39 of hydrogen bubbles over a given area using a travelling microscope 40.
76 mm diameter polished silicon substrates 9 were loaded into a silica jig 10, the major surfaces of the slices 9 extending vertically, the inter-slice spacing being 5 mm. The jig 10 was loaded into the furnace tube 1, the door 11 was closed and the slices 9 were heated to 4650C. Pressure in the tube 1 was then reduced to 10-2 Torr (measured by means of the Balzer gauge), the pumping speed of the pumping system was reduced while 5 litres per minute of argon was introduced into the tube 1 until pressure in the tube 1 had risen to above 100 Torr. The argon supply was stopped, and the pumping system was operated at full pumping speed until pressure in the tube had fallen to 10-2 Torr. This purging procedure was performed twice more so as to remove residual gaseous impurities from the apparatus.Pressure in the tube 1 was then adjusted to 1.0 Torr by adjusting the valve 17 whereby a suitable flowrate of efficiency-spoiling gas (nitrogen or argon) is fed into the throat of the Roots blower 6 through the gas supply line 18. The pressure in the tube 1 was maintained at 1.0 Torr throughout the deposition process with the aid of the control valve 1 7.
50 mis per minute of dinitrogen tetroxide was then introduced into the tube 1 from the source 13 and 50 mis per minute of silane was vented to waste from the source 12. After a period of 4 minutes to allow stabilisation of flows, the silane flow was discharged into the tube 1 whereupon deposition of silica formed commenced and was continued for 100 minutes. It was subsequently found that the silica layers deposited on the silicon substrate were 0.5 Mm thick. After the required time, the silane and dinitrogen tetroxide flows were discontinued and were replaced by 250 mis per minute of argon. After a further4 minutes, pumping was stopped, and argon was passed into the tube 1 until pressure in the tube 1 had reached atmospheric pressure. The door 11 was then opened, and the jig 10 was removed from the tube 1.
EXAMPLE 2 Silica layers were deposited on silicon slices from a reaction mixture consisting of 50 mis per minute of silane and 200 mis per minute of nitric oxide using a deposition temperature of 6500C.
The tube 1 was purged and operated in a similar manner to that described in Example 1. Deposition was conducted for 100 minutes and it was found that the silica layers deposited were 0.5 Mm thick.

Claims (8)

1. A method of making a semiconductor device the method including the step of producing a silicon dioxide layer on a semiconductor substrate by heating a gas mixture comprising silane and/or dichlorosilane (SiH2Cl2) together with nitric oxide and/or dinitrogen tetroxide at a pressure below 20 Torr and at a temperature below 7500C in a reaction vessel containing the semiconductor substrate.
2. A method as claimed in Claim 1, wherein the gas mixture contains argon or nitrogen as a diluent.
3. A method as claimed in Claim 1 or Claim 2, wherein the gas mixture contains hydrogen chloride.
4. A method as claimed in any preceding Claim, wherein the gas mixture is formed by mixing silane and/or dichlorosilane with nitrogen dioxide and/or dinitrogen tetroxide, said gas mixture being heated at a temperature in the range from 400 to 5500C.
5. A method as claimed in any of Claims 1 to 3, wherein the gas mixture comprises nitric oxide together with silane and/or dichlorosilane, said gas mixture being heated at a temperature between 600 and 7500C.
6. A method as claimed in any preceding Claim, wherein the gas mixture contains a dopant, and the silicon dioxide layer produced is a doped silicon dioxide layer.
7. A method of making a semiconductor device, substantially as herein described with reference to the drawing and with reference to Example 1 or to Example 2.
8. A semiconductor device manufactured by a method as claimed in any preceding Claim.
GB7931618A 1979-09-12 1979-09-12 Method of making semiconductor devices Withdrawn GB2058731A (en)

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GB7931618A GB2058731A (en) 1979-09-12 1979-09-12 Method of making semiconductor devices
GB8029199A GB2061243B (en) 1979-09-12 1980-09-10 Method of making semiconductor devices

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2145742A (en) * 1983-08-27 1985-04-03 Philips Nv Method of manufacturing a reaction vessel for crystal growth purposes
EP0310839A1 (en) * 1987-10-09 1989-04-12 STMicroelectronics S.r.l. A method of manufacturing monolithic integrated circuits
GB2213835A (en) * 1987-12-18 1989-08-23 Gen Electric Co Plc Deposition apparatus
US4995893A (en) * 1988-06-23 1991-02-26 Pilkington Plc Method of making coatings on glass surfaces
CN102011105A (en) * 2010-10-12 2011-04-13 上海宏力半导体制造有限公司 Process for depositing silica at low pressure

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2145742A (en) * 1983-08-27 1985-04-03 Philips Nv Method of manufacturing a reaction vessel for crystal growth purposes
EP0310839A1 (en) * 1987-10-09 1989-04-12 STMicroelectronics S.r.l. A method of manufacturing monolithic integrated circuits
US4920077A (en) * 1987-10-09 1990-04-24 Sgs-Thomson Microelectronics S.R.L. Method of manufacturing monolythic integrated circuits
GB2213835A (en) * 1987-12-18 1989-08-23 Gen Electric Co Plc Deposition apparatus
GB2213835B (en) * 1987-12-18 1992-07-08 Gen Electric Co Plc Deposition apparatus
US5143018A (en) * 1987-12-18 1992-09-01 The General Electric Company, P.L.C. Apparatus for depositing uniform films by how-pressure chemical vapor deposition
US4995893A (en) * 1988-06-23 1991-02-26 Pilkington Plc Method of making coatings on glass surfaces
CN102011105A (en) * 2010-10-12 2011-04-13 上海宏力半导体制造有限公司 Process for depositing silica at low pressure
CN102011105B (en) * 2010-10-12 2014-06-04 上海宏力半导体制造有限公司 Process for depositing silica at low pressure

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