IT1160290B - Transistore bipolare e relativo processo di fabbricazione - Google Patents

Transistore bipolare e relativo processo di fabbricazione

Info

Publication number
IT1160290B
IT1160290B IT30409/78A IT3040978A IT1160290B IT 1160290 B IT1160290 B IT 1160290B IT 30409/78 A IT30409/78 A IT 30409/78A IT 3040978 A IT3040978 A IT 3040978A IT 1160290 B IT1160290 B IT 1160290B
Authority
IT
Italy
Prior art keywords
manufacturing process
bipolar transistor
related manufacturing
bipolar
transistor
Prior art date
Application number
IT30409/78A
Other languages
English (en)
Other versions
IT7830409A0 (it
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT7830409A0 publication Critical patent/IT7830409A0/it
Application granted granted Critical
Publication of IT1160290B publication Critical patent/IT1160290B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/10DRAM devices comprising bipolar components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/011Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0113Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors the conductive layers comprising highly doped semiconductor materials, e.g. polysilicon layers or amorphous silicon layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0112Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615Combinations of vertical BJTs and one or more of resistors or capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/1414Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/116Oxidation, differential
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/131Reactive ion etching rie

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Memories (AREA)
IT30409/78A 1977-12-22 1978-12-01 Transistore bipolare e relativo processo di fabbricazione IT1160290B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/863,182 US4190466A (en) 1977-12-22 1977-12-22 Method for making a bipolar transistor structure utilizing self-passivating diffusion sources

Publications (2)

Publication Number Publication Date
IT7830409A0 IT7830409A0 (it) 1978-12-01
IT1160290B true IT1160290B (it) 1987-03-11

Family

ID=25340472

Family Applications (1)

Application Number Title Priority Date Filing Date
IT30409/78A IT1160290B (it) 1977-12-22 1978-12-01 Transistore bipolare e relativo processo di fabbricazione

Country Status (5)

Country Link
US (1) US4190466A (it)
EP (1) EP0002670B1 (it)
JP (1) JPS5940299B2 (it)
DE (1) DE2860591D1 (it)
IT (1) IT1160290B (it)

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JPH0160951B2 (it) * 1978-01-03 1989-12-26 Advanced Micro Devices Inc
NL190710C (nl) * 1978-02-10 1994-07-01 Nec Corp Geintegreerde halfgeleiderketen.
CA1136773A (en) * 1978-08-14 1982-11-30 Norikazu Ohuchi Semiconductor device
US4338622A (en) * 1979-06-29 1982-07-06 International Business Machines Corporation Self-aligned semiconductor circuits and process therefor
US4785341A (en) * 1979-06-29 1988-11-15 International Business Machines Corporation Interconnection of opposite conductivity type semiconductor regions
FR2461360A1 (fr) * 1979-07-10 1981-01-30 Thomson Csf Procede de fabrication d'un transistor a effet de champ du type dmos a fonctionnement vertical et transistor obtenu par ce procede
JPS5826829B2 (ja) * 1979-08-30 1983-06-06 富士通株式会社 ダイナミックメモリセルの製造方法
JPS5645072A (en) * 1979-09-21 1981-04-24 Toshiba Corp Transistor
US4309716A (en) * 1979-10-22 1982-01-05 International Business Machines Corporation Bipolar dynamic memory cell
US4452645A (en) * 1979-11-13 1984-06-05 International Business Machines Corporation Method of making emitter regions by implantation through a non-monocrystalline layer
DE3071489D1 (en) * 1979-11-29 1986-04-17 Vlsi Technology Res Ass Method of manufacturing a semiconductor device with a schottky junction
DE3063191D1 (en) * 1979-11-29 1983-06-16 Tokyo Shibaura Electric Co Method for manufacturing a semiconductor integrated circuit
US4252582A (en) * 1980-01-25 1981-02-24 International Business Machines Corporation Self aligned method for making bipolar transistor having minimum base to emitter contact spacing
US4301588A (en) * 1980-02-01 1981-11-24 International Business Machines Corporation Consumable amorphous or polysilicon emitter process
US4322882A (en) * 1980-02-04 1982-04-06 Fairchild Camera & Instrument Corp. Method for making an integrated injection logic structure including a self-aligned base contact
WO1981002493A1 (en) * 1980-02-22 1981-09-03 Mostek Corp Self-aligned buried contact and method of making
US4319932A (en) * 1980-03-24 1982-03-16 International Business Machines Corporation Method of making high performance bipolar transistor with polysilicon base contacts
US4446611A (en) * 1980-06-26 1984-05-08 International Business Machines Corporation Method of making a saturation-limited bipolar transistor device
US4390890A (en) * 1980-06-26 1983-06-28 International Business Machines Corporation Saturation-limited bipolar transistor device
US4359816A (en) * 1980-07-08 1982-11-23 International Business Machines Corporation Self-aligned metal process for field effect transistor integrated circuits
US4322883A (en) * 1980-07-08 1982-04-06 International Business Machines Corporation Self-aligned metal process for integrated injection logic integrated circuits
US4512075A (en) * 1980-08-04 1985-04-23 Fairchild Camera & Instrument Corporation Method of making an integrated injection logic cell having self-aligned collector and base reduced resistance utilizing selective diffusion from polycrystalline regions
JPS5737870A (en) * 1980-08-20 1982-03-02 Toshiba Corp Semiconductor device
JPS5936432B2 (ja) * 1980-08-25 1984-09-04 株式会社東芝 半導体装置の製造方法
JPS5745968A (en) * 1980-08-29 1982-03-16 Ibm Capacitor with double dielectric unit
JPS5758356A (en) * 1980-09-26 1982-04-08 Toshiba Corp Manufacture of semiconductor device
US4431460A (en) * 1982-03-08 1984-02-14 International Business Machines Corporation Method of producing shallow, narrow base bipolar transistor structures via dual implantations of selected polycrystalline layer
US4437897A (en) 1982-05-18 1984-03-20 International Business Machines Corporation Fabrication process for a shallow emitter/base transistor using same polycrystalline layer
DE3230077A1 (de) * 1982-08-12 1984-02-16 Siemens AG, 1000 Berlin und 8000 München Integrierte bipolar- und mos-transistoren enthaltende halbleiterschaltung auf einem chip und verfahren zu ihrer herstellung
DE3230050A1 (de) * 1982-08-12 1984-02-16 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit bipolaren bauelementen und verfahren zur herstellung derselben
IT1218344B (it) * 1983-03-31 1990-04-12 Ates Componenti Elettron Processo per l'autoallineamento di un doppio strato di silicio policristallino,in un dispositivo a circuito integrato,mediante un' operazione di ossidazione
JPS6146063A (ja) * 1984-08-10 1986-03-06 Hitachi Ltd 半導体装置の製造方法
US5166094A (en) * 1984-09-14 1992-11-24 Fairchild Camera & Instrument Corp. Method of fabricating a base-coupled transistor logic
US4644383A (en) * 1985-04-08 1987-02-17 Harris Corporation Subcollector for oxide and junction isolated IC's
US4812890A (en) * 1985-11-19 1989-03-14 Thompson-Csf Components Corporation Bipolar microwave integratable transistor
US4816895A (en) * 1986-03-06 1989-03-28 Nec Corporation Integrated circuit device with an improved interconnection line
EP0239825B1 (de) * 1986-03-21 1993-08-25 Siemens Aktiengesellschaft Verfahren zur Herstellung einer Bipolartransistorstruktur für Höchstgeschwindigkeitsschaltung

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3574010A (en) * 1968-12-30 1971-04-06 Texas Instruments Inc Fabrication of metal insulator semiconductor field effect transistors
GB1289740A (it) * 1969-12-24 1972-09-20
US3843425A (en) * 1971-04-05 1974-10-22 Rca Corp Overlay transistor employing highly conductive semiconductor grid and method for making
CH573661A5 (it) * 1973-01-02 1976-03-15 Ibm
US3904450A (en) * 1974-04-26 1975-09-09 Bell Telephone Labor Inc Method of fabricating injection logic integrated circuits using oxide isolation
US4074304A (en) * 1974-10-04 1978-02-14 Nippon Electric Company, Ltd. Semiconductor device having a miniature junction area and process for fabricating same
DE2449688C3 (de) * 1974-10-18 1980-07-10 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer dotierten Zone eines Leitfähigkeitstyps in einem Halbleiterkörper
JPS51118969A (en) * 1975-04-11 1976-10-19 Fujitsu Ltd Manufacturing method of semiconductor memory
JPS5215262A (en) * 1975-07-28 1977-02-04 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacturing method
US4085499A (en) * 1975-12-29 1978-04-25 Matsushita Electric Industrial Co., Ltd. Method of making a MOS-type semiconductor device
US4055444A (en) * 1976-01-12 1977-10-25 Texas Instruments Incorporated Method of making N-channel MOS integrated circuits
US4111720A (en) * 1977-03-31 1978-09-05 International Business Machines Corporation Method for forming a non-epitaxial bipolar integrated circuit
NL7703941A (nl) * 1977-04-12 1978-10-16 Philips Nv Werkwijze ter vervaardiging van een halfgelei- derinrichting en inrichting, vervaardigd door toepassing van de werkwijze.
JPS5527469A (en) * 1978-08-18 1980-02-27 Vladimir Semenobitsuchi Atorep Bellows parts welding equipment

Also Published As

Publication number Publication date
DE2860591D1 (en) 1981-04-23
IT7830409A0 (it) 1978-12-01
JPS5940299B2 (ja) 1984-09-29
US4190466A (en) 1980-02-26
JPS5488086A (en) 1979-07-12
EP0002670A1 (de) 1979-07-11
EP0002670B1 (de) 1981-04-01

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