IT1094980B - Metodo per la formazione di distanziatori su di un substrato isolante - Google Patents

Metodo per la formazione di distanziatori su di un substrato isolante

Info

Publication number
IT1094980B
IT1094980B IT7822878A IT2287878A IT1094980B IT 1094980 B IT1094980 B IT 1094980B IT 7822878 A IT7822878 A IT 7822878A IT 2287878 A IT2287878 A IT 2287878A IT 1094980 B IT1094980 B IT 1094980B
Authority
IT
Italy
Prior art keywords
spacers
formation
insulating substrate
insulating
substrate
Prior art date
Application number
IT7822878A
Other languages
English (en)
Italian (it)
Other versions
IT7822878A0 (it
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of IT7822878A0 publication Critical patent/IT7822878A0/it
Application granted granted Critical
Publication of IT1094980B publication Critical patent/IT1094980B/it

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/303—Assembling printed circuits with electric components, e.g. with resistors with surface mounted components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09909—Special local insulating pattern, e.g. as dam around component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10166—Transistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2036—Permanent spacer or stand-off in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07221—Aligning
    • H10W72/07227—Aligning involving guiding structures, e.g. spacers or supporting members
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Cathode-Ray Tubes And Fluorescent Screens For Display (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)
  • Casings For Electric Apparatus (AREA)
IT7822878A 1977-05-02 1978-04-28 Metodo per la formazione di distanziatori su di un substrato isolante IT1094980B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7704770A NL7704770A (nl) 1977-05-02 1977-05-02 Werkwijze voor het aanbrengen van afstandstukjes op een isolerend substraat.

Publications (2)

Publication Number Publication Date
IT7822878A0 IT7822878A0 (it) 1978-04-28
IT1094980B true IT1094980B (it) 1985-08-10

Family

ID=19828467

Family Applications (1)

Application Number Title Priority Date Filing Date
IT7822878A IT1094980B (it) 1977-05-02 1978-04-28 Metodo per la formazione di distanziatori su di un substrato isolante

Country Status (9)

Country Link
US (1) US4184043A (OSRAM)
JP (1) JPS53135462A (OSRAM)
AU (1) AU513792B2 (OSRAM)
CA (1) CA1112371A (OSRAM)
DE (1) DE2817286C2 (OSRAM)
FR (1) FR2390005B1 (OSRAM)
GB (1) GB1583288A (OSRAM)
IT (1) IT1094980B (OSRAM)
NL (1) NL7704770A (OSRAM)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2452786A1 (fr) * 1979-03-30 1980-10-24 Silicium Semiconducteur Ssc Procede de montage par soudage d'une pastille semi-conductrice sur un radiateur et dispositif obtenu
US4391845A (en) * 1981-11-19 1983-07-05 Oak Industries Inc. Method of making a membrane switch
US4545610A (en) * 1983-11-25 1985-10-08 International Business Machines Corporation Method for forming elongated solder connections between a semiconductor device and a supporting substrate
US4641222A (en) * 1984-05-29 1987-02-03 Motorola, Inc. Mounting system for stress relief in surface mounted components
JPS6255996A (ja) * 1985-09-05 1987-03-11 日本電気株式会社 配線基板
DE3534502A1 (de) * 1985-09-27 1987-04-09 Licentia Gmbh Verfahren zum herstellen einer klebekontaktierung
US4777564A (en) * 1986-10-16 1988-10-11 Motorola, Inc. Leadform for use with surface mounted components
JPH02117196A (ja) * 1988-10-26 1990-05-01 Canon Inc プリント基板
US5045142A (en) * 1989-11-22 1991-09-03 Xerox Corporation Stand-off structure for flipped chip butting
US5001829A (en) * 1990-01-02 1991-03-26 General Electric Company Method for connecting a leadless chip carrier to a substrate
JPH0563029A (ja) * 1991-09-02 1993-03-12 Fujitsu Ltd 半導体素子
JP2555811B2 (ja) * 1991-09-10 1996-11-20 富士通株式会社 半導体チップのフリップチップ接合方法
US5255431A (en) * 1992-06-26 1993-10-26 General Electric Company Method of using frozen epoxy for placing pin-mounted components in a circuit module
DE4228012C2 (de) * 1992-08-24 1996-08-22 Siemens Ag Verfahren zum Beabstanden zweier Bauteile
US5573172A (en) * 1993-11-08 1996-11-12 Sawtek, Inc. Surface mount stress relief hidden lead package device and method
DE9411391U1 (de) * 1994-07-14 1995-11-16 Gira Giersiepen Gmbh & Co Kg, 42477 Radevormwald Elektro-Installationsgerät
DE19518027C2 (de) * 1995-05-17 1997-05-15 Lust Hybrid Technik Gmbh Verfahren zur abstandsgenauen Umhüllung mit funktionstragenden Schichten versehener Bauelemente und danach hergestellte Bauelemente
JPH097660A (ja) * 1995-06-22 1997-01-10 Yazaki Corp 信号伝達装置
DE19533251A1 (de) * 1995-06-27 1997-01-02 Braun Ag Verfahren zur wärmeleitenden Befestigung eines elektronischen Leistungsbauelementes auf einer Leiterplatte mit einem Kühlblech oder Kühlkörper
ATE203355T1 (de) * 1995-06-27 2001-08-15 Braun Gmbh Wärmeleite-befestigung eines elektronischen leistungsbauelementes auf einer leiterplatte mit kühlblech
DE19750073A1 (de) * 1997-11-12 1999-05-20 Bosch Gmbh Robert Schaltungsträgerplatte
US6086705A (en) * 1998-09-14 2000-07-11 Industrial Technology Research Institute Bonding of micro elements
DE10030697C2 (de) * 2000-06-23 2002-06-27 Infineon Technologies Ag Verfahren zum Befestigen eines Halbleiterchips auf einem Substrat
US7518223B2 (en) * 2001-08-24 2009-04-14 Micron Technology, Inc. Semiconductor devices and semiconductor device assemblies including a nonconfluent spacer layer
US7109583B2 (en) * 2004-05-06 2006-09-19 Endwave Corporation Mounting with auxiliary bumps
DE102004037610B3 (de) 2004-08-03 2006-03-16 Infineon Technologies Ag Verfahren zur Verbindung einer integrierten Schaltung mit einem Substrat und entsprechende Schaltungsanordnung
DE102004039853A1 (de) * 2004-08-17 2006-03-09 Siemens Ag Elektrische Baueinheit und Verfahren zum Herstellen einer solchen Baueinheit
US7745301B2 (en) * 2005-08-22 2010-06-29 Terapede, Llc Methods and apparatus for high-density chip connectivity
US8957511B2 (en) * 2005-08-22 2015-02-17 Madhukar B. Vora Apparatus and methods for high-density chip connectivity
DE102005050830A1 (de) * 2005-10-24 2007-04-26 Tridonicatco Gmbh & Co. Kg Beabstandung von Bauelementen auf der Bestückungsfläche einer Leiterplatte
JP6570728B2 (ja) * 2016-02-18 2019-09-04 三菱電機株式会社 電子装置およびその製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3098287A (en) * 1958-07-22 1963-07-23 Hazeltine Research Inc Method of assembling components on printed wiring boards
US3832769A (en) * 1971-05-26 1974-09-03 Minnesota Mining & Mfg Circuitry and method
DE2228703A1 (de) 1972-06-13 1974-01-10 Licentia Gmbh Verfahren zum herstellen einer vorgegebenen lotschichtstaerke bei der fertigung von halbleiterbauelementen
US3811186A (en) * 1972-12-11 1974-05-21 Ibm Method of aligning and attaching circuit devices on a substrate

Also Published As

Publication number Publication date
IT7822878A0 (it) 1978-04-28
NL7704770A (nl) 1978-11-06
US4184043A (en) 1980-01-15
DE2817286A1 (de) 1978-11-09
DE2817286C2 (de) 1984-03-22
AU3556878A (en) 1979-11-01
FR2390005B1 (OSRAM) 1983-12-09
GB1583288A (en) 1981-01-21
FR2390005A1 (OSRAM) 1978-12-01
JPS53135462A (en) 1978-11-27
CA1112371A (en) 1981-11-10
AU513792B2 (en) 1981-01-08

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