IN2014CN02998A - - Google Patents
Info
- Publication number
- IN2014CN02998A IN2014CN02998A IN2998CHN2014A IN2014CN02998A IN 2014CN02998 A IN2014CN02998 A IN 2014CN02998A IN 2998CHN2014 A IN2998CHN2014 A IN 2998CHN2014A IN 2014CN02998 A IN2014CN02998 A IN 2014CN02998A
- Authority
- IN
- India
- Prior art keywords
- metal layer
- via structure
- substrate
- electromechanical systems
- systems device
- Prior art date
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0006—Interconnects
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
- B81C1/00246—Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Mechanical Light Control Or Optical Switches (AREA)
- Micromachines (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/278,080 US10131534B2 (en) | 2011-10-20 | 2011-10-20 | Stacked vias for vertical integration |
PCT/US2012/060648 WO2013059345A1 (en) | 2011-10-20 | 2012-10-17 | Stacked vias for vertical integration |
Publications (1)
Publication Number | Publication Date |
---|---|
IN2014CN02998A true IN2014CN02998A (enrdf_load_stackoverflow) | 2015-07-03 |
Family
ID=47138180
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IN2998CHN2014 IN2014CN02998A (enrdf_load_stackoverflow) | 2011-10-20 | 2012-10-17 |
Country Status (7)
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20180123245A1 (en) * | 2016-10-28 | 2018-05-03 | Broadcom Corporation | Broadband antenna array for wireless communications |
CN108231747A (zh) * | 2016-12-21 | 2018-06-29 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及其制作方法、电子装置 |
US20190169020A1 (en) * | 2017-12-05 | 2019-06-06 | Intel Corporation | Package substrate integrated devices |
EP3598235A1 (en) * | 2018-07-18 | 2020-01-22 | ASML Netherlands B.V. | Metrology apparatus and method for determining a characteristic relating to one or more structures on a substrate |
Family Cites Families (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5798283A (en) | 1995-09-06 | 1998-08-25 | Sandia Corporation | Method for integrating microelectromechanical devices with electronic circuitry |
US5917645A (en) * | 1997-03-28 | 1999-06-29 | Daewoo Electronics Co., Ltd. | Thin film actuated mirror array in an optical projection system and method for manufacturing the same |
US6320244B1 (en) * | 1999-01-12 | 2001-11-20 | Agere Systems Guardian Corp. | Integrated circuit device having dual damascene capacitor |
US6562656B1 (en) | 2001-06-25 | 2003-05-13 | Thin Film Module, Inc. | Cavity down flip chip BGA |
US20030234415A1 (en) * | 2002-06-24 | 2003-12-25 | Hwey-Ching Chien | Scalable three-dimensional fringe capacitor with stacked via |
JP4289005B2 (ja) | 2003-04-30 | 2009-07-01 | 日本ビクター株式会社 | 多層プリント配線板 |
US20050041405A1 (en) | 2003-08-22 | 2005-02-24 | Intel Corporation | Stacked via structure that includes a skip via |
US7081647B2 (en) * | 2003-09-29 | 2006-07-25 | Matsushita Electric Industrial Co., Ltd. | Microelectromechanical system and method for fabricating the same |
JP4776197B2 (ja) | 2004-09-21 | 2011-09-21 | 日本特殊陶業株式会社 | 配線基板の検査装置 |
JP4608294B2 (ja) | 2004-11-30 | 2011-01-12 | 日亜化学工業株式会社 | 樹脂成形体及び表面実装型発光装置並びにそれらの製造方法 |
JP4724488B2 (ja) * | 2005-02-25 | 2011-07-13 | 日立オートモティブシステムズ株式会社 | 集積化マイクロエレクトロメカニカルシステム |
KR100881303B1 (ko) * | 2005-11-02 | 2009-02-03 | 이비덴 가부시키가이샤 | 반도체 장치용 다층 프린트 배선판 및 그 제조 방법 |
TWI298608B (en) | 2006-05-19 | 2008-07-01 | Foxconn Advanced Tech Inc | Method for manufacturing stack via of hdi printed circuit board |
US7777715B2 (en) | 2006-06-29 | 2010-08-17 | Qualcomm Mems Technologies, Inc. | Passive circuits for de-multiplexing display inputs |
US20080029898A1 (en) | 2006-08-01 | 2008-02-07 | Farooq Mukta G | Via stack structures |
US7733552B2 (en) | 2007-03-21 | 2010-06-08 | Qualcomm Mems Technologies, Inc | MEMS cavity-coating layers and methods |
US7570415B2 (en) * | 2007-08-07 | 2009-08-04 | Qualcomm Mems Technologies, Inc. | MEMS device and interconnects for same |
US8022896B2 (en) * | 2007-08-08 | 2011-09-20 | Qualcomm Mems Technologies, Inc. | ESD protection for MEMS display panels |
JP5016449B2 (ja) | 2007-11-13 | 2012-09-05 | ローム株式会社 | 半導体装置 |
JP5125531B2 (ja) | 2008-01-16 | 2013-01-23 | 富士通セミコンダクター株式会社 | 配線基板及び半導体装置 |
US8242593B2 (en) | 2008-01-27 | 2012-08-14 | International Business Machines Corporation | Clustered stacked vias for reliable electronic substrates |
US20090194861A1 (en) | 2008-02-04 | 2009-08-06 | Mathias Bonse | Hermetically-packaged devices, and methods for hermetically packaging at least one device at the wafer level |
JP5102726B2 (ja) | 2008-09-08 | 2012-12-19 | ラピスセミコンダクタ株式会社 | 半導体装置の製造方法 |
CN101728355A (zh) | 2008-11-03 | 2010-06-09 | 巨擘科技股份有限公司 | 多层基板的导孔结构及其制造方法 |
WO2010114687A1 (en) * | 2009-03-30 | 2010-10-07 | Megica Corporation | Integrated circuit chip using top post-passivation technology and bottom structure technology |
JP2010283189A (ja) | 2009-06-05 | 2010-12-16 | Shinko Electric Ind Co Ltd | 配線基板及びその製造方法 |
TW201102340A (en) * | 2009-07-10 | 2011-01-16 | Nat Univ Tsing Hua | A method for fabricating a multilayer microstructure with balancing residual stress capability |
CN102001613B (zh) | 2009-09-02 | 2014-10-22 | 原相科技股份有限公司 | 微电子装置及制造方法、微机电封装结构及封装方法 |
JP5134027B2 (ja) * | 2010-02-18 | 2013-01-30 | 北陸電気工業株式会社 | 圧電型三軸加速度センサ |
-
2011
- 2011-10-20 US US13/278,080 patent/US10131534B2/en active Active
-
2012
- 2012-10-17 IN IN2998CHN2014 patent/IN2014CN02998A/en unknown
- 2012-10-17 EP EP12781228.7A patent/EP2768767A1/en not_active Withdrawn
- 2012-10-17 CN CN201910414865.5A patent/CN110228785A/zh active Pending
- 2012-10-17 CN CN201280059040.2A patent/CN103974896A/zh active Pending
- 2012-10-17 WO PCT/US2012/060648 patent/WO2013059345A1/en active Application Filing
- 2012-10-17 JP JP2014537185A patent/JP2014534470A/ja active Pending
- 2012-10-17 KR KR1020147013565A patent/KR20140083042A/ko not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
CN103974896A (zh) | 2014-08-06 |
WO2013059345A1 (en) | 2013-04-25 |
US20130100143A1 (en) | 2013-04-25 |
CN110228785A (zh) | 2019-09-13 |
KR20140083042A (ko) | 2014-07-03 |
EP2768767A1 (en) | 2014-08-27 |
US10131534B2 (en) | 2018-11-20 |
JP2014534470A (ja) | 2014-12-18 |
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