IL81401A - Translation lookaside buffer for a computer system - Google Patents
Translation lookaside buffer for a computer systemInfo
- Publication number
- IL81401A IL81401A IL81401A IL8140187A IL81401A IL 81401 A IL81401 A IL 81401A IL 81401 A IL81401 A IL 81401A IL 8140187 A IL8140187 A IL 8140187A IL 81401 A IL81401 A IL 81401A
- Authority
- IL
- Israel
- Prior art keywords
- tlb
- type
- memory
- computer system
- translation lookaside
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/004—Error avoidance
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/076—Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Information Transfer Systems (AREA)
- Debugging And Monitoring (AREA)
- Apparatus For Radiation Diagnosis (AREA)
- Polarising Elements (AREA)
- Telephonic Communication Services (AREA)
- Emergency Protection Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US85907586A | 1986-05-02 | 1986-05-02 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IL81401A0 IL81401A0 (en) | 1987-08-31 |
| IL81401A true IL81401A (en) | 1991-06-10 |
Family
ID=25329962
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IL81401A IL81401A (en) | 1986-05-02 | 1987-01-27 | Translation lookaside buffer for a computer system |
Country Status (10)
| Country | Link |
|---|---|
| EP (1) | EP0244532B1 (no) |
| JP (1) | JPH0614324B2 (no) |
| KR (1) | KR870011536A (no) |
| AT (1) | ATE99436T1 (no) |
| CA (1) | CA1280831C (no) |
| DE (1) | DE3689474T2 (no) |
| DK (1) | DK61187A (no) |
| IE (1) | IE870173L (no) |
| IL (1) | IL81401A (no) |
| NO (1) | NO870225L (no) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5920890A (en) * | 1996-11-14 | 1999-07-06 | Motorola, Inc. | Distributed tag cache memory system and method for storing data in the same |
| JP4576172B2 (ja) * | 2004-07-29 | 2010-11-04 | 富士通株式会社 | 演算処理装置，情報処理装置及び演算処理装置の制御方法 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3723976A (en) * | 1972-01-20 | 1973-03-27 | Ibm | Memory system with logical and real addressing |
| US3800286A (en) * | 1972-08-24 | 1974-03-26 | Honeywell Inf Systems | Address development technique utilizing a content addressable memory |
| US4357656A (en) | 1977-12-09 | 1982-11-02 | Digital Equipment Corporation | Method and apparatus for disabling and diagnosing cache memory storage locations |
| US4473878A (en) | 1981-11-23 | 1984-09-25 | Motorola, Inc. | Memory management unit |
| US4558433A (en) * | 1983-05-31 | 1985-12-10 | International Business Machines Corporation | Multi-port register implementations |
-
1986
- 1986-09-18 JP JP61218283A patent/JPH0614324B2/ja not_active Expired - Lifetime
- 1986-10-17 DE DE86308095T patent/DE3689474T2/de not_active Expired - Lifetime
- 1986-10-17 EP EP86308095A patent/EP0244532B1/en not_active Expired - Lifetime
- 1986-10-17 AT AT86308095T patent/ATE99436T1/de not_active IP Right Cessation
-
1987
- 1987-01-20 NO NO870225A patent/NO870225L/no unknown
- 1987-01-22 IE IE870173A patent/IE870173L/xx unknown
- 1987-01-27 IL IL81401A patent/IL81401A/xx not_active IP Right Cessation
- 1987-02-06 DK DK061187A patent/DK61187A/da not_active Application Discontinuation
- 1987-02-18 CA CA000530051A patent/CA1280831C/en not_active Expired - Lifetime
- 1987-02-26 KR KR870001647A patent/KR870011536A/ko not_active Application Discontinuation
Also Published As
| Publication number | Publication date |
|---|---|
| DE3689474D1 (de) | 1994-02-10 |
| IE870173L (en) | 1987-11-02 |
| JPS62260245A (ja) | 1987-11-12 |
| IL81401A0 (en) | 1987-08-31 |
| NO870225D0 (no) | 1987-01-20 |
| EP0244532A2 (en) | 1987-11-11 |
| CA1280831C (en) | 1991-02-26 |
| NO870225L (no) | 1987-11-03 |
| DK61187D0 (da) | 1987-02-06 |
| DE3689474T2 (de) | 1994-04-28 |
| ATE99436T1 (de) | 1994-01-15 |
| EP0244532B1 (en) | 1993-12-29 |
| DK61187A (da) | 1987-11-03 |
| EP0244532A3 (en) | 1989-05-10 |
| KR870011536A (ko) | 1987-12-24 |
| JPH0614324B2 (ja) | 1994-02-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RH | Patent void |