ID28538A - Tata letak (arsitektur) memori untuk memetakan dekoder - Google Patents

Tata letak (arsitektur) memori untuk memetakan dekoder

Info

Publication number
ID28538A
ID28538A IDW20010597A ID20010597A ID28538A ID 28538 A ID28538 A ID 28538A ID W20010597 A IDW20010597 A ID W20010597A ID 20010597 A ID20010597 A ID 20010597A ID 28538 A ID28538 A ID 28538A
Authority
ID
Indonesia
Prior art keywords
state metric
symbol estimates
decoders
mapping
architecture
Prior art date
Application number
IDW20010597A
Other languages
English (en)
Indonesian (id)
Inventor
Steven J Halter
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/259,665 external-priority patent/US6381728B1/en
Priority claimed from US09/283,013 external-priority patent/US6434203B1/en
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of ID28538A publication Critical patent/ID28538A/id

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3972—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using sliding window techniques or parallel windows
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6566—Implementations concerning memory access contentions

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Detection And Correction Of Errors (AREA)
  • Navigation (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
IDW20010597A 1998-08-14 1999-08-13 Tata letak (arsitektur) memori untuk memetakan dekoder ID28538A (id)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US9648998P 1998-08-14 1998-08-14
US09/259,665 US6381728B1 (en) 1998-08-14 1999-02-26 Partitioned interleaver memory for map decoder
US09/283,013 US6434203B1 (en) 1999-02-26 1999-03-31 Memory architecture for map decoder

Publications (1)

Publication Number Publication Date
ID28538A true ID28538A (id) 2001-05-31

Family

ID=27378195

Family Applications (1)

Application Number Title Priority Date Filing Date
IDW20010597A ID28538A (id) 1998-08-14 1999-08-13 Tata letak (arsitektur) memori untuk memetakan dekoder

Country Status (12)

Country Link
EP (1) EP1118158B1 (enExample)
JP (2) JP4405676B2 (enExample)
CN (1) CN1211931C (enExample)
AT (1) ATE476016T1 (enExample)
AU (1) AU766116B2 (enExample)
BR (1) BR9912990B1 (enExample)
CA (1) CA2340366C (enExample)
DE (1) DE69942634D1 (enExample)
ES (1) ES2347309T3 (enExample)
HK (1) HK1040842B (enExample)
ID (1) ID28538A (enExample)
WO (1) WO2000010254A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3450788B2 (ja) * 2000-03-06 2003-09-29 松下電器産業株式会社 復号化装置および復号化処理方法
DE10012873A1 (de) 2000-03-16 2001-09-27 Infineon Technologies Ag Optimierter Turbo-Decodierer
FI109162B (fi) 2000-06-30 2002-05-31 Nokia Corp Menetelmä ja järjestely konvoluutiokoodatun koodisanan dekoodaamiseksi
US6662331B1 (en) * 2000-10-27 2003-12-09 Qualcomm Inc. Space-efficient turbo decoder
AU2002351154A1 (en) * 2001-12-28 2003-07-15 Koninklijke Philips Electronics N.V. Method for decoding data using windows of data
WO2004028004A2 (en) * 2002-09-18 2004-04-01 Koninklijke Philips Electronics N.V. Method for decoding data using windows of data
US7702968B2 (en) * 2004-02-27 2010-04-20 Qualcomm Incorporated Efficient multi-symbol deinterleaver
CN102571107B (zh) * 2010-12-15 2014-09-17 展讯通信（上海）有限公司 LTE系统中高速并行Turbo码的解码系统及方法
US9128888B2 (en) * 2012-08-30 2015-09-08 Intel Deutschland Gmbh Method and apparatus for turbo decoder memory collision resolution
US10014026B1 (en) * 2017-06-20 2018-07-03 Seagate Technology Llc Head delay calibration and tracking in MSMR systems

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5862190A (en) * 1995-12-29 1999-01-19 Motorola, Inc. Method and apparatus for decoding an encoded signal

Also Published As

Publication number Publication date
HK1040842A1 (en) 2002-06-21
JP2010016861A (ja) 2010-01-21
WO2000010254A1 (en) 2000-02-24
CA2340366C (en) 2008-08-05
JP4405676B2 (ja) 2010-01-27
CN1211931C (zh) 2005-07-20
AU5563899A (en) 2000-03-06
JP2002523914A (ja) 2002-07-30
EP1118158B1 (en) 2010-07-28
ES2347309T3 (es) 2010-10-27
BR9912990A (pt) 2001-12-11
DE69942634D1 (de) 2010-09-09
ATE476016T1 (de) 2010-08-15
CN1323462A (zh) 2001-11-21
BR9912990B1 (pt) 2012-10-02
EP1118158A1 (en) 2001-07-25
CA2340366A1 (en) 2000-02-24
AU766116B2 (en) 2003-10-09
HK1040842B (zh) 2005-12-30
JP5129216B2 (ja) 2013-01-30

Similar Documents

Publication Publication Date Title
ID29610A (id) Memori de-interleaver partisi untuk dekoder map
ID28538A (id) Tata letak (arsitektur) memori untuk memetakan dekoder
TW431097B (en) Method and system for decoding convolutionally encoded codewords and soft decision output decoder
MY119831A (en) Viterbi decoding apparatus and viterbi decoding method
BR0016728A (pt) Processo para codificar e decodificar dados em um sistema de comunicação de dados, processo para codificação de canal concatenada de dados em um sistema de transmissão de dados, codificador de canal concatenado, aparelho de codificação de canal concatenada, codificador / decodificador de dados adaptado para uso em um sistema de comunicação de dados, e, aparelho para codificar e decodificar dados em um sistema de comunicação de dados
DE69531085D1 (de) Verbesserungen in, an oder in Bezug auf Halbleiteranordnungen
EP1394953A3 (en) LOG-MAP processor for higher radix trellis
GB2418822A (en) Unified viterbi/turbo decoder for mobile communication systems
ATE237888T1 (de) Verallgemeinerter faltungsver- und - entschachteler
PT2326013E (pt) Método e disposição para a codificação e descodificação aritmética com utilização de uma pluralidade de tabelas de consulta
EP0938043A3 (en) Low power multiplier for CPU and DSP
DE69908820D1 (de) Verfahren und system zur schnellen maximale-a-posteriori-dekodierung
DE59400097D1 (de) Schraubendreherklinge oder Schraubendrehereinsatz, sogenannter Bit
KR960020503A (ko) 비터비 복호기의 연판정 메트릭 산출방법 및 장치
EP1570599A4 (en) SYSTEM AND METHOD FOR IMPROVING THE PERFORMANCE OF A DIGITAL SYSTEM
KR980006964A (ko) 격자복호기의 역추적장치
DE602004015643D1 (de) Tab-system für eine elektrochemische metall-luft-zelle
Kwak et al. Reverse tracing of forward state metric in log-MAP and max-log-MAP decoders
KR20020020545A (ko) 차세대 이동 통신 단말기 모뎀용 비터비/터보 디코더의부분 공유 출력 버퍼
Cheong Environmental Impact Assessment Policy in Korea
GB2332834A (en) Convolution encoder with look-up table
KR970055629A (ko) 비터비 디코더의 디코딩 방법
DE60111853D1 (de) Verlustbehaftete datenkompression von zustandsmetrikvektoren für turbo decoder
Richey Thermodynamic Formalism and Holomorphic Dynamical Systems
Pottie Low latency sequential decoding