BR0016728A - Processo para codificar e decodificar dados em um sistema de comunicação de dados, processo para codificação de canal concatenada de dados em um sistema de transmissão de dados, codificador de canal concatenado, aparelho de codificação de canal concatenada, codificador / decodificador de dados adaptado para uso em um sistema de comunicação de dados, e, aparelho para codificar e decodificar dados em um sistema de comunicação de dados - Google Patents
Processo para codificar e decodificar dados em um sistema de comunicação de dados, processo para codificação de canal concatenada de dados em um sistema de transmissão de dados, codificador de canal concatenado, aparelho de codificação de canal concatenada, codificador / decodificador de dados adaptado para uso em um sistema de comunicação de dados, e, aparelho para codificar e decodificar dados em um sistema de comunicação de dadosInfo
- Publication number
- BR0016728A BR0016728A BR0016728-2A BR0016728A BR0016728A BR 0016728 A BR0016728 A BR 0016728A BR 0016728 A BR0016728 A BR 0016728A BR 0016728 A BR0016728 A BR 0016728A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/413—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors tail biting Viterbi decoding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/256—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with trellis coding, e.g. with convolutional codes and TCM
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2927—Decoding strategies
- H03M13/293—Decoding strategies with erasure setting
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2933—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using a block and a convolutional code
- H03M13/2936—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using a block and a convolutional code comprising an outer Reed-Solomon code and an inner convolutional code
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3944—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes for block codes, especially trellis or lattice decoding thereof
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
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- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/1505—Golay Codes
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/1515—Reed-Solomon codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/155—Shortening or extension of codes
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- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
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- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/23—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2996—Tail biting
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/618—Shortening and extension of codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6561—Parallelized implementations
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
"PROCESSO PARA CODIFICAR E DECODIFICAR DADOS EM UM SISTEMA DE COMUNICAçãO DE DADOS PROCESSO PARA CODIFICAçãO DE CANAL CONCATENADA DE DADOS EM UM SISTEMA DE TRANSMISSãO DE DADOS, CODIFICADOR DE CANAL CONCATENADO, APARELHO DE CODIFICAçãO DE CANAL CONCATENADA, CODIFICADOR/DECODIFICADOR DE DADOS ADAPTADO PARA USO EM UM SISTEMA DE COMUNICAçãO DE DADOS, E, APARELHO PARA CODIFICAR E DECODIFICAR DADOS EM UM SISTEMA DE COMUNICAçãO DE DADOS". Um esquema de codificação concatenada usando um código de conexão externo Reed-Solomon de erro e apagamento e um código interno decodificável curto de probabilidade máxima tal como um código Viterbi. A taxa m/m+1 do código interno é ajustada ao lado de símbolo m do código Reed-Solomon. Esta técnica de codificação de canal concatenada é bem adequada para sistemas de transmissões de dados de pacotes de tamanho pequeno ou variável. A técnica pode também ser adaptada para uso em um sistema de transmissão de dados de modo contínuo. A presente invenção efetua vantajosamente codificação de canal concatenada sem a necessidade de um intercalador de símbolo. Em adição, a presente invenção é simples de implementar e deste modo consome muito menos espaço e potência do que as abordagens da técnica anterior. A presente invenção não só elimina a necessidade de um intercalador de símbolo entre os códigos externo e interno, como também desempenha uma complexidade de implementação drasticamente reduzida do decodificador Viterbi de código interno. Uma realização da presente invenção compreende um código interno possuindo códigos de bloco de extensão curta derivados de códigos convolucionais de restrição de extensão curta, utilizando bits de cauda em treliça em um decodificador compreendendo quatro decodificadores Viterbi de quatro estados possuindo uma extensão máxima correspondente curta. O código interno compreende preferivelmente códigos de bloco curto derivados código convolucional perfurado e não perfurado, não sistemático, de quatro estados (isto é, restrição de extensão 3).
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/471,295 US6769089B1 (en) | 1999-12-24 | 1999-12-24 | Method and apparatus for concatenated channel coding in a data transmission system |
US09/564,377 US6883133B1 (en) | 1999-12-24 | 2000-05-01 | Method and apparatus for concatenated channel coding with variable code rate and coding gain in a data transmission system |
PCT/US2000/034948 WO2001048927A1 (en) | 1999-12-24 | 2000-12-21 | Method and apparatus for concatenated channel coding |
Publications (1)
Publication Number | Publication Date |
---|---|
BR0016728A true BR0016728A (pt) | 2002-10-01 |
Family
ID=27043386
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR0016728-2A BR0016728A (pt) | 1999-12-24 | 2000-12-21 | Processo para codificar e decodificar dados em um sistema de comunicação de dados, processo para codificação de canal concatenada de dados em um sistema de transmissão de dados, codificador de canal concatenado, aparelho de codificação de canal concatenada, codificador / decodificador de dados adaptado para uso em um sistema de comunicação de dados, e, aparelho para codificar e decodificar dados em um sistema de comunicação de dados |
Country Status (8)
Country | Link |
---|---|
US (2) | US7296214B2 (pt) |
EP (1) | EP1243075A1 (pt) |
JP (1) | JP2003518866A (pt) |
CN (1) | CN1235342C (pt) |
AU (1) | AU3076301A (pt) |
BR (1) | BR0016728A (pt) |
CA (1) | CA2393857A1 (pt) |
WO (1) | WO2001048927A1 (pt) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
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GB0110907D0 (en) | 2001-05-03 | 2001-06-27 | British Broadcasting Corp | Improvements in decoders for many carrier signals, in particular in DVB-T recievers |
GB2391777B (en) * | 2001-05-03 | 2004-04-14 | British Broadcasting Corp | Improvements in decoders for many-carrier signals, in particular in DVB-T receivers |
US8151175B2 (en) | 2002-04-05 | 2012-04-03 | Sentel Corporation | Fault tolerant decoding method and apparatus |
US8006170B2 (en) | 2002-04-05 | 2011-08-23 | Sentel Corporation | Fault tolerant decoding method and apparatus including use of quality information |
US7093188B2 (en) | 2002-04-05 | 2006-08-15 | Alion Science And Technology Corp. | Decoding method and apparatus |
KR100861380B1 (ko) * | 2003-10-16 | 2008-10-27 | 노키아 코포레이션 | 감소된 전력 소비를 위한 신호 수신 방법 및 장치 |
GB2407223B (en) * | 2003-10-16 | 2006-06-07 | Nokia Corp | Reduced power consumption |
US7991056B2 (en) | 2004-02-13 | 2011-08-02 | Broadcom Corporation | Method and system for encoding a signal for wireless communications |
CN100428632C (zh) * | 2004-11-04 | 2008-10-22 | 华为技术有限公司 | 一种组合编码器和组合解码器 |
US20060245505A1 (en) * | 2005-05-02 | 2006-11-02 | Limberg Allen L | Digital television signals using linear block coding |
GB2427325B (en) * | 2005-06-14 | 2010-04-07 | Nokia Corp | Mobile phone radio |
US7603591B2 (en) * | 2005-07-19 | 2009-10-13 | Mediatek Incorporation | Apparatus selectively adopting different determining criteria in erasure marking procedure when performing decoding process, and method thereof |
JP4662278B2 (ja) * | 2006-04-28 | 2011-03-30 | 富士通株式会社 | エラー訂正装置、符号器、復号器、方法及び情報記憶装置 |
US7814398B2 (en) * | 2006-06-09 | 2010-10-12 | Seagate Technology Llc | Communication channel with Reed-Solomon encoding and single parity check |
JP4833173B2 (ja) | 2006-10-30 | 2011-12-07 | 富士通株式会社 | 復号化器、符号化・復号化装置及び記録再生装置 |
GB2445005B (en) * | 2006-12-19 | 2012-01-18 | Martin Tomlinson | Concatenated coding system |
US8219896B2 (en) * | 2007-10-23 | 2012-07-10 | Telefonaktiebolaget L M Ericsson (Publ) | Reduced-complexity decoding algorithms for tail-biting convolutional codes |
US8397147B2 (en) * | 2007-11-02 | 2013-03-12 | Telefonaktiebolaget L M Ericsson (Publ) | Optimum distance spectrum feedforward low rate tail-biting convolutional codes |
US8375280B2 (en) * | 2007-11-02 | 2013-02-12 | Telefonaktiebolaget L M Ericsson (Publ) | Optimum distance spectrum feedforward tail-biting convolutional codes |
US8190977B2 (en) * | 2008-08-27 | 2012-05-29 | Intel Mobile Communications GmbH | Decoder of error correction codes |
US8855222B2 (en) * | 2008-10-07 | 2014-10-07 | Qualcomm Incorporated | Codes and preambles for single carrier and OFDM transmissions |
US8726137B2 (en) | 2009-02-02 | 2014-05-13 | Telefonaktiebolaget L M Ericsson (Publ) | Encoding and decoding methods for expurgated convolutional codes and convolutional turbo codes |
CN102299733B (zh) * | 2011-09-08 | 2013-11-06 | 中国人民解放军理工大学 | 协同通信系统的中继编码构造方法 |
US8787873B1 (en) | 2011-11-04 | 2014-07-22 | Plusn Llc | System and method for communicating using bandwidth on demand |
US9083492B2 (en) * | 2013-02-15 | 2015-07-14 | Cortina Systems, Inc. | Apparatus and method for communicating data over a communication channel |
WO2015026583A1 (en) * | 2013-08-23 | 2015-02-26 | Thomson Licensing | Improved error control coding and decoding for serial concatenated codes |
CN104467875A (zh) * | 2014-12-09 | 2015-03-25 | 山东大学 | 一种rs码与删余卷积码级联码的参数盲识别方法 |
CN110213015A (zh) * | 2019-04-28 | 2019-09-06 | 杭州电子科技大学 | 一种针对短码的结合编译码方法 |
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US4907233A (en) * | 1988-05-18 | 1990-03-06 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | VLSI single-chip (255,223) Reed-Solomon encoder with interleaver |
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JPH065015A (ja) * | 1992-06-18 | 1994-01-14 | Canon Inc | 記録再生装置、記録装置及び再生装置 |
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CA2234006C (en) * | 1998-04-06 | 2004-10-19 | Wen Tong | Encoding and decoding methods and apparatus |
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US6769089B1 (en) * | 1999-12-24 | 2004-07-27 | Ensemble Communicatioins, Inc. | Method and apparatus for concatenated channel coding in a data transmission system |
JP3745709B2 (ja) * | 2002-06-28 | 2006-02-15 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 符号化装置、復号化装置、符号化方法、復号化方法、プログラム、プログラム記録媒体、及びデータ記録媒体 |
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2000
- 2000-12-21 CN CN00817674.4A patent/CN1235342C/zh not_active Expired - Fee Related
- 2000-12-21 EP EP00990957A patent/EP1243075A1/en not_active Withdrawn
- 2000-12-21 JP JP2001548531A patent/JP2003518866A/ja active Pending
- 2000-12-21 WO PCT/US2000/034948 patent/WO2001048927A1/en not_active Application Discontinuation
- 2000-12-21 AU AU30763/01A patent/AU3076301A/en not_active Abandoned
- 2000-12-21 CA CA002393857A patent/CA2393857A1/en not_active Abandoned
- 2000-12-21 BR BR0016728-2A patent/BR0016728A/pt not_active Application Discontinuation
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2004
- 2004-12-17 US US11/015,150 patent/US7296214B2/en not_active Expired - Fee Related
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2006
- 2006-07-28 US US11/496,009 patent/US7293223B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
CA2393857A1 (en) | 2001-07-05 |
WO2001048927A1 (en) | 2001-07-05 |
US7296214B2 (en) | 2007-11-13 |
US20050102605A1 (en) | 2005-05-12 |
US20070033509A1 (en) | 2007-02-08 |
WO2001048927A9 (en) | 2002-05-23 |
US7293223B2 (en) | 2007-11-06 |
AU3076301A (en) | 2001-07-09 |
CN1235342C (zh) | 2006-01-04 |
CN1413385A (zh) | 2003-04-23 |
JP2003518866A (ja) | 2003-06-10 |
EP1243075A1 (en) | 2002-09-25 |
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