HK81190A - Double layer photoresist technique for side-wall profile control in plasma etching processes - Google Patents

Double layer photoresist technique for side-wall profile control in plasma etching processes

Info

Publication number
HK81190A
HK81190A HK811/90A HK81190A HK81190A HK 81190 A HK81190 A HK 81190A HK 811/90 A HK811/90 A HK 811/90A HK 81190 A HK81190 A HK 81190A HK 81190 A HK81190 A HK 81190A
Authority
HK
Hong Kong
Prior art keywords
double layer
plasma etching
etching processes
profile control
wall profile
Prior art date
Application number
HK811/90A
Other languages
English (en)
Inventor
Kuan Y Liao
Kuang-Yeh Chang
Hsing-Chien Ma
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of HK81190A publication Critical patent/HK81190A/xx

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
HK811/90A 1985-04-29 1990-10-11 Double layer photoresist technique for side-wall profile control in plasma etching processes HK81190A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/728,012 US4645562A (en) 1985-04-29 1985-04-29 Double layer photoresist technique for side-wall profile control in plasma etching processes
PCT/US1986/000649 WO1986006547A1 (en) 1985-04-29 1986-03-31 Double layer photoresist technique for side-wall profile control in plasma etching processes

Publications (1)

Publication Number Publication Date
HK81190A true HK81190A (en) 1990-10-19

Family

ID=24925070

Family Applications (1)

Application Number Title Priority Date Filing Date
HK811/90A HK81190A (en) 1985-04-29 1990-10-11 Double layer photoresist technique for side-wall profile control in plasma etching processes

Country Status (7)

Country Link
US (1) US4645562A (ko)
EP (1) EP0221093B1 (ko)
JP (1) JPS63500411A (ko)
KR (1) KR900002688B1 (ko)
DE (1) DE3671574D1 (ko)
HK (1) HK81190A (ko)
WO (1) WO1986006547A1 (ko)

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US5486449A (en) * 1989-02-07 1996-01-23 Rohm Co., Ltd. Photomask, photoresist and photolithography for a monolithic IC
US5034091A (en) * 1990-04-27 1991-07-23 Hughes Aircraft Company Method of forming an electrical via structure
DE4115414C2 (de) * 1991-05-10 1995-07-06 Meinhard Prof Dr Knoll Verfahren zur Herstellung von miniaturisierten Chemo- und Biosensorelementen mit ionenselektiver Membran sowie von Trägern für diese Elemente
JP3360461B2 (ja) * 1995-01-31 2002-12-24 ソニー株式会社 メタル成膜工程の前処理方法
KR0172237B1 (ko) * 1995-06-26 1999-03-30 김주용 반도체 소자의 미세패턴 형성방법
US5728627A (en) * 1996-11-14 1998-03-17 Samsung Electronics Co., Ltd. Methods of forming planarized conductive interconnects for integrated circuits
US5976987A (en) * 1997-10-03 1999-11-02 Vlsi Technology, Inc. In-situ corner rounding during oxide etch for improved plug fill
US6218310B1 (en) * 1998-05-12 2001-04-17 Advanced Micro Devices, Inc. RTA methods for treating a deep-UV resist mask prior to gate formation etch to improve gate profile
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US6320269B1 (en) * 1999-05-03 2001-11-20 Taiwan Semiconductor Manufacturing Company Method for preparing a semiconductor wafer to receive a protective tape
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US7078348B1 (en) * 2001-06-27 2006-07-18 Advanced Micro Devices, Inc. Dual layer patterning scheme to make dual damascene
US7384727B2 (en) * 2003-06-26 2008-06-10 Micron Technology, Inc. Semiconductor processing patterning methods
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US7026243B2 (en) 2003-10-20 2006-04-11 Micron Technology, Inc. Methods of forming conductive material silicides by reaction of metal with silicon
WO2005072211A2 (en) * 2004-01-20 2005-08-11 Mattson Technology, Inc. System and method for removal of photoresist and residues following contact etch with a stop layer present
US7153769B2 (en) 2004-04-08 2006-12-26 Micron Technology, Inc. Methods of forming a reaction product and methods of forming a conductive metal silicide by reaction of metal with silicon
US7229745B2 (en) * 2004-06-14 2007-06-12 Bae Systems Information And Electronic Systems Integration Inc. Lithographic semiconductor manufacturing using a multi-layered process
US7241705B2 (en) * 2004-09-01 2007-07-10 Micron Technology, Inc. Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects
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KR100710187B1 (ko) * 2005-11-24 2007-04-20 동부일렉트로닉스 주식회사 반도체 소자의 제조 방법
US20080160749A1 (en) * 2006-12-27 2008-07-03 Texas Instruments Incorporated Semiconductor device and method of forming thereof
US20090008430A1 (en) * 2007-07-06 2009-01-08 Lucent Technologies Inc. Solder-bonding process
JP5207406B2 (ja) * 2007-08-08 2013-06-12 株式会社アルバック プラズマ処理方法
US7755123B2 (en) * 2007-08-24 2010-07-13 Aptina Imaging Corporation Apparatus, system, and method providing backside illuminated imaging device
US7915643B2 (en) 2007-09-17 2011-03-29 Transphorm Inc. Enhancement mode gallium nitride power devices
US20090072269A1 (en) * 2007-09-17 2009-03-19 Chang Soo Suh Gallium nitride diodes and integrated components
US8519438B2 (en) 2008-04-23 2013-08-27 Transphorm Inc. Enhancement mode III-N HEMTs
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Also Published As

Publication number Publication date
DE3671574D1 (de) 1990-06-28
KR900002688B1 (ko) 1990-04-23
EP0221093A1 (en) 1987-05-13
JPS63500411A (ja) 1988-02-12
US4645562A (en) 1987-02-24
WO1986006547A1 (en) 1986-11-06
EP0221093B1 (en) 1990-05-23
KR880700455A (ko) 1988-03-15

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