HK1028848A1 - A low-jitter data transmission apparatus. - Google Patents
A low-jitter data transmission apparatus.Info
- Publication number
- HK1028848A1 HK1028848A1 HK00108009A HK00108009A HK1028848A1 HK 1028848 A1 HK1028848 A1 HK 1028848A1 HK 00108009 A HK00108009 A HK 00108009A HK 00108009 A HK00108009 A HK 00108009A HK 1028848 A1 HK1028848 A1 HK 1028848A1
- Authority
- HK
- Hong Kong
- Prior art keywords
- low
- data transmission
- transmission apparatus
- jitter data
- jitter
- Prior art date
Links
- 230000005540 biological transmission Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
- H04L1/205—Arrangements for detecting or preventing errors in the information received using signal quality detector jitter monitoring
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
- H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
- H03L7/0993—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider and a circuit for adding and deleting pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
- H04J3/0688—Change of the master or reference, e.g. take-over or failure of the master
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/10—Indirect frequency synthesis using a frequency multiplier in the phase-locked loop or in the reference signal path
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Quality & Reliability (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Time-Division Multiplex Systems (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10327663A JP3085293B2 (ja) | 1998-11-18 | 1998-11-18 | データ伝送装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
HK1028848A1 true HK1028848A1 (en) | 2001-03-02 |
Family
ID=18201586
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK00108009A HK1028848A1 (en) | 1998-11-18 | 2000-12-13 | A low-jitter data transmission apparatus. |
Country Status (4)
Country | Link |
---|---|
US (1) | US6493408B1 (xx) |
JP (1) | JP3085293B2 (xx) |
CN (1) | CN1186877C (xx) |
HK (1) | HK1028848A1 (xx) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6658073B1 (en) * | 1999-12-03 | 2003-12-02 | Koninklijke Philips Electronics N.V. | Method and system for reducing jitter on constant rate data transfer between asynchronous systems |
US6904111B1 (en) * | 2000-03-01 | 2005-06-07 | Northrop Grumman Corporation | Asynchronous resampling for data transport |
US7046721B2 (en) * | 2001-03-20 | 2006-05-16 | Ericsson Inc. | System and method to enhance the capacity of a communication link |
US7194052B2 (en) * | 2001-09-06 | 2007-03-20 | Agere Systems Inc. | Data capture circuit with self-test capability |
US7221727B2 (en) * | 2003-04-01 | 2007-05-22 | Kingston Technology Corp. | All-digital phase modulator/demodulator using multi-phase clocks and digital PLL |
JP2005223829A (ja) | 2004-02-09 | 2005-08-18 | Nec Electronics Corp | 分数分周回路及びこれを用いたデータ伝送装置 |
US20090052599A1 (en) * | 2006-03-01 | 2009-02-26 | Matsushita Electric Industrial Co., Ltd. | Transmitter and transmitter/receiver |
JP5057761B2 (ja) * | 2006-12-01 | 2012-10-24 | 株式会社東芝 | 伝送装置 |
JP4438857B2 (ja) * | 2007-12-11 | 2010-03-24 | ソニー株式会社 | 通信システム、受信装置、および受信方法 |
CN101594130B (zh) * | 2009-07-02 | 2012-05-09 | 中国电子科技集团公司第五十四研究所 | 一种基于斜率鉴频方式的脉冲无线低抖动传输方法 |
US9002488B2 (en) | 2010-02-22 | 2015-04-07 | Cypress Semiconductor Corporation | Clock synthesis systems, circuits and methods |
JP5703882B2 (ja) * | 2011-03-22 | 2015-04-22 | 富士通株式会社 | デジタルpll回路及びクロック生成方法 |
CN108696716A (zh) * | 2017-04-07 | 2018-10-23 | 上海峰宁信息科技股份有限公司 | 一种用于数字图像信号的时钟重建处理方法及模块 |
CN114967838B (zh) * | 2022-05-23 | 2023-07-11 | 中国工程物理研究院激光聚变研究中心 | 一种广空间超低抖动同步信号产生系统及方法 |
CN114726367B (zh) * | 2022-06-02 | 2022-08-23 | 上海泰矽微电子有限公司 | 一种基于门控的低抖动时钟分频电路及控制方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02166919A (ja) | 1988-12-21 | 1990-06-27 | Hitachi Ltd | ディジタルpll方式 |
JP3284702B2 (ja) | 1993-11-04 | 2002-05-20 | 株式会社明電舎 | 多段中継方式 |
JPH07326963A (ja) | 1994-05-31 | 1995-12-12 | Nissin Electric Co Ltd | デジタルpll回路 |
FR2726713B1 (fr) * | 1994-11-09 | 1997-01-24 | Sgs Thomson Microelectronics | Circuit de transmission de donnees en mode asynchrone a frequence libre de reception calee sur la frequence d'emission |
US6243369B1 (en) * | 1998-05-06 | 2001-06-05 | Terayon Communication Systems, Inc. | Apparatus and method for synchronizing an SCDMA upstream or any other type upstream to an MCNS downstream or any other type downstream with a different clock rate than the upstream |
-
1998
- 1998-11-18 JP JP10327663A patent/JP3085293B2/ja not_active Expired - Fee Related
-
1999
- 1999-11-18 CN CNB991277422A patent/CN1186877C/zh not_active Expired - Fee Related
- 1999-11-18 US US09/443,005 patent/US6493408B1/en not_active Expired - Fee Related
-
2000
- 2000-12-13 HK HK00108009A patent/HK1028848A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US6493408B1 (en) | 2002-12-10 |
JP3085293B2 (ja) | 2000-09-04 |
JP2000151539A (ja) | 2000-05-30 |
CN1257349A (zh) | 2000-06-21 |
CN1186877C (zh) | 2005-01-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PC | Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee) |
Effective date: 20091118 |