GB2383640B - Method and apparatus for memory self testing - Google Patents

Method and apparatus for memory self testing

Info

Publication number
GB2383640B
GB2383640B GB0217635A GB0217635A GB2383640B GB 2383640 B GB2383640 B GB 2383640B GB 0217635 A GB0217635 A GB 0217635A GB 0217635 A GB0217635 A GB 0217635A GB 2383640 B GB2383640 B GB 2383640B
Authority
GB
United Kingdom
Prior art keywords
self testing
memory self
memory
testing
self
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
GB0217635A
Other languages
English (en)
Other versions
GB0217635D0 (en
GB2383640A (en
Inventor
Stephen Hill
Richard Slobodnik
Gerard Richard Williams
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd, Advanced Risc Machines Ltd filed Critical ARM Ltd
Publication of GB0217635D0 publication Critical patent/GB0217635D0/en
Publication of GB2383640A publication Critical patent/GB2383640A/en
Application granted granted Critical
Publication of GB2383640B publication Critical patent/GB2383640B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/14—Implementation of control logic, e.g. test mode decoders
    • G11C29/16—Implementation of control logic, e.g. test mode decoders using microprogrammed units, e.g. state machines
GB0217635A 2001-12-26 2002-07-30 Method and apparatus for memory self testing Expired - Lifetime GB2383640B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/025,816 US7269766B2 (en) 2001-12-26 2001-12-26 Method and apparatus for memory self testing

Publications (3)

Publication Number Publication Date
GB0217635D0 GB0217635D0 (en) 2002-09-11
GB2383640A GB2383640A (en) 2003-07-02
GB2383640B true GB2383640B (en) 2005-04-06

Family

ID=21828202

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0217635A Expired - Lifetime GB2383640B (en) 2001-12-26 2002-07-30 Method and apparatus for memory self testing

Country Status (3)

Country Link
US (1) US7269766B2 (enExample)
JP (2) JP4809568B2 (enExample)
GB (1) GB2383640B (enExample)

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US6968479B2 (en) * 2002-03-06 2005-11-22 Hewlett-Packard Development Company, L.P. Verifying data in a data storage device
US7673193B1 (en) * 2005-08-18 2010-03-02 Rambus Inc. Processor-memory unit for use in system-in-package and system-in-module devices
US7194670B2 (en) 2004-02-13 2007-03-20 International Business Machines Corp. Command multiplier for built-in-self-test
JP4601305B2 (ja) * 2004-02-27 2010-12-22 富士通セミコンダクター株式会社 半導体装置
JP2005309787A (ja) * 2004-04-21 2005-11-04 Nec Electronics Corp 中央演算処理装置及びマイクロコンピュータ
KR100735575B1 (ko) * 2004-06-11 2007-07-04 삼성전자주식회사 메모리의 테스트 모드 인터페이스 방법 및 장치
KR101014413B1 (ko) * 2004-06-14 2011-02-15 삼성전자주식회사 데이터 캐쉬가 내장된 반도체 집적회로 및 그것의앳-스피드-테스트 방법
US7254793B2 (en) * 2005-02-04 2007-08-07 Synopsys, Inc. Latch modeling technique for formal verification
US7434119B2 (en) * 2005-03-07 2008-10-07 Arm Limited Method and apparatus for memory self testing
JP2006268919A (ja) * 2005-03-22 2006-10-05 Matsushita Electric Ind Co Ltd メモリの組み込み自己テスト回路および自己テスト方法
US7490280B2 (en) 2006-02-28 2009-02-10 International Business Machines Corporation Microcontroller for logic built-in self test (LBIST)
US7870454B2 (en) * 2006-09-12 2011-01-11 International Business Machines Corporation Structure for system for and method of performing high speed memory diagnostics via built-in-self-test
US7805644B2 (en) * 2007-12-29 2010-09-28 Texas Instruments Incorporated Multiple pBIST controllers
KR20120069404A (ko) 2010-12-20 2012-06-28 삼성전자주식회사 테스터 및 이를 포함하는 테스트 시스템
US9298573B2 (en) * 2012-03-30 2016-03-29 Intel Corporation Built-in self-test for stacked memory architecture
US8935586B2 (en) * 2012-11-08 2015-01-13 International Business Machines Corporation Staggered start of BIST controllers and BIST engines
US8996942B2 (en) * 2012-12-20 2015-03-31 Avago Technologies General Ip (Singapore) Pte. Ltd. Suspend SDRAM refresh cycles during normal DDR operation
US8904250B2 (en) 2013-02-14 2014-12-02 Micron Technology, Inc. Autorecovery after manufacturing/system integration
US8943458B1 (en) * 2013-09-16 2015-01-27 International Business Machines Corporation Determining chip burn-in workload using emulated application condition
JP6570608B2 (ja) * 2017-12-21 2019-09-04 キヤノン株式会社 検査装置、撮像装置、電子機器および輸送装置
JP7031392B2 (ja) * 2018-03-15 2022-03-08 富士通株式会社 エミュレーション装置，エミュレーション方法及びエミュレーションプログラム
US10748635B2 (en) * 2018-03-22 2020-08-18 Marvell Asia Pte, Ltd. Dynamic power analysis with per-memory instance activity customization
CN109710473A (zh) * 2018-12-19 2019-05-03 四川虹美智能科技有限公司 一种soc板测试方法、装置及系统
US10998075B2 (en) 2019-09-11 2021-05-04 International Business Machines Corporation Built-in self-test for bit-write enabled memory arrays
US10971242B2 (en) 2019-09-11 2021-04-06 International Business Machines Corporation Sequential error capture during memory test
US11069422B1 (en) 2020-07-07 2021-07-20 International Business Machines Corporation Testing multi-port array in integrated circuits
JP7220317B1 (ja) 2022-02-08 2023-02-09 ウィンボンド エレクトロニクス コーポレーション 半導体装置およびプログラム方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0472818A2 (en) * 1990-08-31 1992-03-04 International Business Machines Corporation Built-in self test for integrated circuits
US5535164A (en) * 1995-03-03 1996-07-09 International Business Machines Corporation BIST tester for multiple memories
US5633877A (en) * 1995-05-31 1997-05-27 International Business Machines Corporation Programmable built-in self test method and controller for arrays
US6001662A (en) * 1997-12-02 1999-12-14 International Business Machines Corporation Method and system for providing a reusable configurable self-test controller for manufactured integrated circuits
US20010011904A1 (en) * 1998-07-23 2001-08-09 Robert Kaiser Integrated circuit having a self-test device for carrying out a self-test of the integrated circuit

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US5661732A (en) * 1995-05-31 1997-08-26 International Business Machines Corporation Programmable ABIST microprocessor for testing arrays with two logical views
JP3274332B2 (ja) * 1995-11-29 2002-04-15 株式会社東芝 コントローラ・大容量メモリ混載型半導体集積回路装置およびそのテスト方法およびその使用方法、並びに半導体集積回路装置およびそのテスト方法
JP2001148199A (ja) * 1999-11-19 2001-05-29 Mitsubishi Electric Corp 自己テスト回路内蔵半導体記憶装置
JP2001236797A (ja) * 1999-12-17 2001-08-31 Fujitsu Ltd 自己試験回路及びそれを内蔵するメモリデバイス
JP2001297598A (ja) * 2000-04-11 2001-10-26 Toshiba Corp 半導体集積回路装置、及び半導体集積回路装置の自己テスト方法
US20030167428A1 (en) * 2001-04-13 2003-09-04 Sun Microsystems, Inc ROM based BIST memory address translation

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0472818A2 (en) * 1990-08-31 1992-03-04 International Business Machines Corporation Built-in self test for integrated circuits
US5535164A (en) * 1995-03-03 1996-07-09 International Business Machines Corporation BIST tester for multiple memories
US5633877A (en) * 1995-05-31 1997-05-27 International Business Machines Corporation Programmable built-in self test method and controller for arrays
US6001662A (en) * 1997-12-02 1999-12-14 International Business Machines Corporation Method and system for providing a reusable configurable self-test controller for manufactured integrated circuits
US20010011904A1 (en) * 1998-07-23 2001-08-09 Robert Kaiser Integrated circuit having a self-test device for carrying out a self-test of the integrated circuit

Also Published As

Publication number Publication date
GB0217635D0 (en) 2002-09-11
US7269766B2 (en) 2007-09-11
GB2383640A (en) 2003-07-02
JP2010015689A (ja) 2010-01-21
US20030120985A1 (en) 2003-06-26
JP2003229000A (ja) 2003-08-15
JP4809568B2 (ja) 2011-11-09

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Legal Events

Date Code Title Description
PE20 Patent expired after termination of 20 years

Expiry date: 20220729