GB2322737A - Scribing and breaking semiconductor substrates - Google Patents

Scribing and breaking semiconductor substrates Download PDF

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Publication number
GB2322737A
GB2322737A GB9804385A GB9804385A GB2322737A GB 2322737 A GB2322737 A GB 2322737A GB 9804385 A GB9804385 A GB 9804385A GB 9804385 A GB9804385 A GB 9804385A GB 2322737 A GB2322737 A GB 2322737A
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United Kingdom
Prior art keywords
scribing
scribe
substrate
layer
hard
Prior art date
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GB9804385A
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GB9804385D0 (en
Inventor
Serge L Rudaz
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HP Inc
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Hewlett Packard Co
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Publication date
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Publication of GB9804385D0 publication Critical patent/GB9804385D0/en
Publication of GB2322737A publication Critical patent/GB2322737A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043Making grooves, e.g. cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
  • Led Devices (AREA)
  • Processing Of Stones Or Stones Resemblance Materials (AREA)

Abstract

A hard-to-scribe substrate 4 is lapped to a thickness suitable for later cleaving and on the surface of the substrate selected for scribing, a non-ductile material such as a dielectric scribe facilitation layer 2 is grown or deposited. This layer's hardness and thickness are selected to be softer than the substrate and to accept a clean scribe line. Alternately, or in conjunction, a second non-ductile layer such as dielectric break facilitation layer is grown or deposited on the side of the hard-to-scribe substrate other than the one selected for scribing. This layer's thickness and hardness are selected to put the scribing surface in an optimal state of tension for clean break propagation. An optional layer of metal 6 is placed over the surface to be scribed. This layer serves to dissipate heat generated from die separation and shield the cutting tool from piezoelectric discharge. The layer 2 may be a nitride, an oxy-nitride or an oxide.

Description

1 SCREBING MATERLALS 2322737 This invention is related to the scribe and
break of hard-to-scnibe materials, more particularly in the manufacturing of semiconductor devices. In particular, the invention is directed towards separating devices grown on a monolithic substrate.
Blue/green light emitting devices are thin (-I - 10 micrometers) GaNbased compound device structures of hexagonal crystalline symmetry ("wte') grown on a thick sapphire substrate (- 100 - 500- micrometers - thick, disk-shaped, substrate wafers that have diameters between 50 to 150 millimetres). The devices are often square-shaped, typically 200 - 500 micrometers on a side. T'here are therefore many such contiguous, individual devices fabricated on one substrate. Separation of the devices (e., singulation of the "wafer" into individual "dice") is very difficult because GaN and sapphire are almost as hard as diamond, and because sapphire's natural cleave planes are not at right angle to the surface. Thus, the singulating break planes through the wafers are not smooth, flat and vertical, which will impact device performance and reliability.
One prior art method to separate the devices is to saw the devices apart. Sapphire and GaN-based compounds are so hard that the saw blade have impractically short life times for sawing small devices (typically <250 hear centimetres). In addition, sawing requires wide kerfs, the amount consumed from sawing, - > 150 micrometers. Sawing also causes excessive chipping and undesirable cracks that propagate into the active region of the devices, resulting in poor performance and reliability.
Another prior art method is to laser cut the die apart. Unfortunately, sapphire reqtures very short lasing wavelengths (< 230 nanometers), so that laser use results in too
2 much heat. The dice are subject to undesirable thermal expansion. And, the separation quality is not very much superior to the one obtained by sawing.
In another prior art method, "scribe and break", a scribe line is used to define the separation of the dice and the dice are separated along this line by propagation of a break initiated by the scribe mark. This method is barely adequate with respect to throughput and cost because the "street" between the dice is on the order of 50 - 150 micrometers, a significant amount of space on a wafer. Also, on such hard surfaces a scribing tool typically has a useful life of less than 500 linear centimeters.
All of the aforementioned prior art methods consume expensive substrate material and generate break surfaces of inadequate or barely adequate smoothness. A method that efficiently uses costly, hard-to-scribe substrates is desirable. It would be a flirther cost and throughput benefit if the method prolonged cutting tool life. Finally, a method that generates clean, smooth, vertical break planes would improve the performance and reliability of the final devices.
Similar problems are encountered when trying to separate devices in other hardto-cleave material systems, such as GaN-based devices grown on GaN substrates (or other substrates than sapphire); some kinds of glasses used in the manufacturing of flat panel displays; or other glass- or quartzbased devices (wafer-bonded night-vision systems, for instance). Other problem systems are hard-to-scribe semiconductors such as gallium phosphide (GaP) or compound semiconductors such that the substrate or wafer layer where the scribing is initiated is of a different material system than for some other layers in the device.
3 A hard-to-scribe substrate, having a device surface, is thinned (for example, by processes such as lapping, grinding, etching, lift-off, etc.) to a thickness appropriate for later cleaving. On either surface of the substrate, a layer of dielectric or other non-ductile material ("coat") is grown or deposited.
When scribing is done on the surface of this "coat", the "coat" material plays the role of a scribe facilitation layer: it is selected to be softer than the substrate and to accept a clean scribe line. Its thickness is optimized to generate good break propagation. An optional layer of metal is placed over the scribe facilitation layer. This metal layer serves to dissipate heat generated from die scribing and separation, as well as to shield the cutting tool from piezoelectric discharge.
When scribing is not done on the surface of the "coaf ', but instead on the other side of the substrate, the "coat" thickness and hardness are selected to put the scribing surface in an optimal state of tension for clean break propagation. An optional layer of metal is placed over the surface to be scribed. This metal layer serves to dissipate heat generated from die scribing and separation, as well as to shield the cutting tool from piezoelectric discharge.
4 Figures 1 A-C illustrate cross-sections of a wafer having improved scribe and break.
Figures 2A - 2B illustrate process flow charts for the present invention.
Figures I A-C illustrate cross-sections of a wafer having improved break propagation. In Figure I A, a dielectric layer 2 is grown on the thinned backside of a hard-to-scribe substrate 4, such as sapphire or gallium nitride (GaN) or gallium phosphide (GaP). In Figure I B, the dielectric "coat" is deposited over the device side 4a of the sapphire substrate. In both Figures I A and I B, an optional metal layer 6, such as aluminum, is deposited over the dielectric 2. In both Figures I A and I B, the scribing occurs on the thinned substrate side, eventually coated with metal. An optional second dielectric layer and second metal layer may be deposited on the opposing side (not shown). In Figure I C, a single dielectric layer 8 is deposited on the thinned side, while the scribing occurs on the device side, which remains uncoated.
Whenever the scribing is done on the "coat" side, the "coat" plays the role of a scribe facilitation layer: it is selected to be an easily cleavable material softer than sapphire, such as silicon dioxide(S'02). As a result, the scribe line on the "coat" material is cleaner and better defined than on sapphire. A clean break initiation results in good break propagation for breaks through the hard materials. In addition, the break is further helped by subjecting the wafers to a stress that is conducive to clean break propagation. As a result, the scribing tool life is prolonged and leads to yield improvements and reduced fabrication costs.
The optional metal layer 6 serves to lubricate the die cutting tool to cushion the impact of the tool on the substrate, and to dissipate heat. Heat generated from the cutting process contributes to tool wear which degrades the scribing quality. In addition, this layer acts to shield the tool from piezoelectric discharge that will also increase wear and tear.
While the scribe facilitation layer 2 may be aluminum nitride, alumina, silicon nitride, silicon oxy-nitride, or comparable dielectric or nonductile layer, silicon oxide or silicon dioxide are preferred. The hardto-scribe substrate 4 may alternatively be a 6 semiconductor, i.e. GaP, silicon, silicon-carbide, or GaN, a spinel, a glass, i.e. G7, or a large plate of quartz.
Figures 2A and 2B illustrate process flow charts directed towards the present invention. In step 30, the back side of the substrate is lapped to an approximate thickness - 50 - 150 micrometers for most material systems. In step 40, a dielectric layer, having thickness typically between 5 1000 nanometers, is grown over the desired side of the substrate. The dielectric layer may be deposited through sputtering, evaporation, ion beam deposition, chemical vapor deposition (CVD), plasma enhanced CVD, or even spun-on glass. In step 50, the optional metal layer is deposited on the surface to be scribed. In step 50, the wafer structure is scribed, and then broken along the scribe lines.
The dielectric or non-ductile layer is preferably deposited onto the selected surface such that surface to be scribed is under tension. This reduces the "street" required between the dice by promoting cleaner break propagation and by reducing the die's edge chipping.
The main difference between processes shown in Figures 2A and 2B is over the role of the dielectric or non-ductile layer ("coat"). In Figure 2A, the "coat" is relatively soft (i.e., silicon dioxide) and primarily allows for clean scribing and break initiation (scribe facilitation): putting the scribing surface under proper tension is a secondary consideration. In Figure 2B, the primary purpose of the "coat" is to put the opposite, scribing surface under proper tension for optimum break propagation after break initiation (break facilitation): the material can then be fairly hard (i.e., silicon nitride), since the scribing tool never makes contact with it.
Finally, it is possible to combine processes shown in Figures 2A and 2B, by coating the surface to be scribed with a softer, more cleavable material and coating the other side with a harder material; the thicknesses of the softer "coat" material and of the 7 harder "coat" material will be optimized respectively for break initiation (scribe facilitation) and break propagation (break facilitation).
8

Claims (1)

  1. Claims
    1. A method for scribing and breaking comprising the steps of thinning a hard-to-scribe substrate. applying a first non-ductile layer over one of the two sides of the thinned hard-to-scribe substrate, the substrate having a scribing side and a non-scribing side; scribing scribe lines on the scribing side of hard-to-scribe substrate; and breaking the substrate along the scribe hues.
    A method as defined in claim 1, wherein the hard-to-scribe substrate is selected from a group comprising sapphire, silicon, silicon-carbide, gallium nitride (GaN), gallium phosphide (GaP), glass, and quartz.
    2.
    A method as defined in claim I or 2, wherein the first non-ductile layer is selected from a group comprising aluminium. nitride, alumina, silicon oxide, silicon dioxide, silicon nitride, and silicon oxy-nitride.
    4. A method as defined in any preceding claim, further comprising the step of overlaying the scribing side of the hard-to-scribe substrate with a metal layer prior to the step of scribing.
    5. A method as defined in any preceding claim, fiu-ther comprising the step of placing a second non-ductile layer over the other of the two sides of the hard-to-scribe substrate.
    9 6. A method as defined in claim 5, wherein the second non-ductile layer is selected from a group comprising aluminium nitride. nbiTrdna silicon o)dde, silicon dio)ide, silicon nitride, and silicon oxy-nitride.
    7. A method as defined in claim 6, further comprising the step of overlaying the scribing side of the hard-to-scribe substrate with a metal layer prior to the step of scribing.
    8. A method of g a material for subsequent breaching substantially as herein described with reference to each of the accompanying drawings.
GB9804385A 1997-02-28 1998-03-02 Scribing and breaking semiconductor substrates Withdrawn GB2322737A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US80873497A 1997-02-28 1997-02-28

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GB2322737A true GB2322737A (en) 1998-09-02

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JP (1) JP3167668B2 (en)
KR (1) KR19980070042A (en)
CN (1) CN1192043A (en)
DE (1) DE19753492A1 (en)
GB (1) GB2322737A (en)
TW (1) TW353202B (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1091394A2 (en) * 1999-10-04 2001-04-11 Tokyo Seimitsu Co.,Ltd. Method for manufacturing thin semiconductor chips
EP1098365A2 (en) * 1999-11-05 2001-05-09 Tokyo Seimitsu Co.,Ltd. Method for manufacturing semiconductor chips
GB2359191A (en) * 1999-09-02 2001-08-15 Matsushita Electric Ind Co Ltd Method of manufacturing a semiconductor device involving forming a resin on one face and thinning the opposite face
US6711191B1 (en) 1999-03-04 2004-03-23 Nichia Corporation Nitride semiconductor laser device
US6835956B1 (en) 1999-02-09 2004-12-28 Nichia Corporation Nitride semiconductor device and manufacturing method thereof
US7265392B2 (en) 2000-05-26 2007-09-04 Osram Gmbh Light-emitting-diode chip comprising a sequence of GaN-based epitaxial layers which emit radiation and a method for producing the same
US7691656B2 (en) 2000-10-17 2010-04-06 Osram Gmbh Method for fabricating a semiconductor component based on GaN
US7691659B2 (en) 2000-04-26 2010-04-06 Osram Gmbh Radiation-emitting semiconductor element and method for producing the same
US7977687B2 (en) 2008-05-09 2011-07-12 National Chiao Tung University Light emitter device
US8592841B2 (en) 1997-07-25 2013-11-26 Nichia Corporation Nitride semiconductor device

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7319247B2 (en) 2000-04-26 2008-01-15 Osram Gmbh Light emitting-diode chip and a method for producing same
DE10026255A1 (en) * 2000-04-26 2001-11-08 Osram Opto Semiconductors Gmbh Radiation-emitting semiconductor element has a semiconductor body formed by a stack of different semiconductor layers based on gallium nitride
JP4710148B2 (en) * 2001-02-23 2011-06-29 パナソニック株式会社 Manufacturing method of nitride semiconductor chip
KR100681828B1 (en) * 2005-07-20 2007-02-12 주식회사 에스에프에이 Multi braking system
TWI326274B (en) * 2005-07-20 2010-06-21 Sfa Engineering Corp Scribing apparatus and method, and multi-breaking system
CN101958383B (en) * 2010-10-07 2012-07-11 安徽三安光电有限公司 Manufacturing method of inversed AlGaInP light emitting diode
CN102837369B (en) * 2012-09-18 2015-06-03 广东工业大学 Process method for green laser scribing sapphire

Citations (1)

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Publication number Priority date Publication date Assignee Title
GB2285333A (en) * 1993-12-30 1995-07-05 At & T Corp Fabrication of electro-optical devices

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DE2121455A1 (en) * 1971-04-30 1972-11-02 Siemens AG, 1000 Berlin u. 8000 München Method for dividing plate-shaped workpieces
EP0613765B1 (en) * 1993-03-02 1999-12-15 CeramTec AG Innovative Ceramic Engineering Method for the manufacture of subdividable tiles from a brittle material

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2285333A (en) * 1993-12-30 1995-07-05 At & T Corp Fabrication of electro-optical devices

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8592841B2 (en) 1997-07-25 2013-11-26 Nichia Corporation Nitride semiconductor device
US6835956B1 (en) 1999-02-09 2004-12-28 Nichia Corporation Nitride semiconductor device and manufacturing method thereof
US6711191B1 (en) 1999-03-04 2004-03-23 Nichia Corporation Nitride semiconductor laser device
US6683379B2 (en) 1999-09-02 2004-01-27 Matsushita Electric Industrial Co., Ltd. Semiconductor device with reinforcing resin layer
GB2359191A (en) * 1999-09-02 2001-08-15 Matsushita Electric Ind Co Ltd Method of manufacturing a semiconductor device involving forming a resin on one face and thinning the opposite face
GB2359191B (en) * 1999-09-02 2003-06-04 Matsushita Electric Ind Co Ltd Semiconductor device and method of manufacturing the same
EP1091394A3 (en) * 1999-10-04 2002-01-09 Tokyo Seimitsu Co.,Ltd. Method for manufacturing thin semiconductor chips
EP1091394A2 (en) * 1999-10-04 2001-04-11 Tokyo Seimitsu Co.,Ltd. Method for manufacturing thin semiconductor chips
US6583032B1 (en) 1999-11-05 2003-06-24 Tokyo Seimitsu Co., Ltd. Method for manufacturing semiconductor chips
EP1098365A3 (en) * 1999-11-05 2002-01-09 Tokyo Seimitsu Co.,Ltd. Method for manufacturing semiconductor chips
EP1098365A2 (en) * 1999-11-05 2001-05-09 Tokyo Seimitsu Co.,Ltd. Method for manufacturing semiconductor chips
US7691659B2 (en) 2000-04-26 2010-04-06 Osram Gmbh Radiation-emitting semiconductor element and method for producing the same
US7265392B2 (en) 2000-05-26 2007-09-04 Osram Gmbh Light-emitting-diode chip comprising a sequence of GaN-based epitaxial layers which emit radiation and a method for producing the same
US7939844B2 (en) 2000-05-26 2011-05-10 Osram Gmbh Light-emitting-diode chip comprising a sequence of GAN-based epitaxial layers which emit radiation and a method for producing the same
US8436393B2 (en) 2000-05-26 2013-05-07 Osram Gmbh Light-emitting-diode chip comprising a sequence of GaN-based epitaxial layers which emit radiation and a method for producing the same
US7691656B2 (en) 2000-10-17 2010-04-06 Osram Gmbh Method for fabricating a semiconductor component based on GaN
US8129209B2 (en) 2000-10-17 2012-03-06 Osram Ag Method for fabricating a semiconductor component based on GaN
US8809086B2 (en) 2000-10-17 2014-08-19 Osram Gmbh Method for fabricating a semiconductor component based on GaN
US7977687B2 (en) 2008-05-09 2011-07-12 National Chiao Tung University Light emitter device

Also Published As

Publication number Publication date
GB9804385D0 (en) 1998-04-22
JP3167668B2 (en) 2001-05-21
TW353202B (en) 1999-02-21
CN1192043A (en) 1998-09-02
JPH10256193A (en) 1998-09-25
DE19753492A1 (en) 1998-09-03
KR19980070042A (en) 1998-10-26

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