GB2307783B - Enhanced security semiconductor device, semiconductor circuit arrangement, and method of production thereof - Google Patents

Enhanced security semiconductor device, semiconductor circuit arrangement, and method of production thereof

Info

Publication number
GB2307783B
GB2307783B GB9519996A GB9519996A GB2307783B GB 2307783 B GB2307783 B GB 2307783B GB 9519996 A GB9519996 A GB 9519996A GB 9519996 A GB9519996 A GB 9519996A GB 2307783 B GB2307783 B GB 2307783B
Authority
GB
United Kingdom
Prior art keywords
production
circuit arrangement
enhanced security
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
GB9519996A
Other languages
English (en)
Other versions
GB9519996D0 (en
GB2307783A (en
Inventor
Callum Gordon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions UK Ltd
Original Assignee
Motorola Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Ltd filed Critical Motorola Ltd
Priority to GB9519996A priority Critical patent/GB2307783B/en
Publication of GB9519996D0 publication Critical patent/GB9519996D0/en
Priority to JP51392797A priority patent/JP3856156B2/ja
Priority to PCT/EP1996/004105 priority patent/WO1997013226A1/en
Priority to DE69610109T priority patent/DE69610109T2/de
Priority to CN96197324A priority patent/CN1198234A/zh
Priority to EP96932572A priority patent/EP0855071B1/en
Priority to US09/029,644 priority patent/US6404217B1/en
Publication of GB2307783A publication Critical patent/GB2307783A/en
Application granted granted Critical
Publication of GB2307783B publication Critical patent/GB2307783B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07FCOIN-FREED OR LIKE APPARATUS
    • G07F7/00Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/10Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means together with a coded signal, e.g. in the form of personal identification information, like personal identification number [PIN] or biometric data
    • G07F7/1008Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073Special arrangements for circuits, e.g. for protecting identification code in memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06QINFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00Payment architectures, schemes or protocols
    • G06Q20/30Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/341Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06QINFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00Payment architectures, schemes or protocols
    • G06Q20/30Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/355Personalisation of cards for use
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31719Security aspects, e.g. preventing unauthorised access during test

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Business, Economics & Management (AREA)
  • Theoretical Computer Science (AREA)
  • Accounting & Taxation (AREA)
  • General Business, Economics & Management (AREA)
  • Strategic Management (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Storage Device Security (AREA)
  • Control Of Vending Devices And Auxiliary Devices For Vending Devices (AREA)
GB9519996A 1995-09-30 1995-09-30 Enhanced security semiconductor device, semiconductor circuit arrangement, and method of production thereof Expired - Lifetime GB2307783B (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
GB9519996A GB2307783B (en) 1995-09-30 1995-09-30 Enhanced security semiconductor device, semiconductor circuit arrangement, and method of production thereof
JP51392797A JP3856156B2 (ja) 1995-09-30 1996-09-19 セキュリティを強化した半導体素子,半導体回路構成,およびその製造方法
PCT/EP1996/004105 WO1997013226A1 (en) 1995-09-30 1996-09-19 Enhanced security semiconductor device, semiconductor circuit arrangement, and method of production thereof
DE69610109T DE69610109T2 (de) 1995-09-30 1996-09-19 Halbleiterkomponente mit verbesserter sicherheit;halbleiterschaltkreisanordung und verfahren zur herstellung derselben
CN96197324A CN1198234A (zh) 1995-09-30 1996-09-19 保密性增强的半导体器件,半导体电路布局及其实现方法
EP96932572A EP0855071B1 (en) 1995-09-30 1996-09-19 Enhanced security semiconductor device, semiconductor circuit arrangement, and method of production thereof
US09/029,644 US6404217B1 (en) 1995-09-30 1996-09-19 Enhanced security semiconductor device, semiconductor circuit arrangement and method or production thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9519996A GB2307783B (en) 1995-09-30 1995-09-30 Enhanced security semiconductor device, semiconductor circuit arrangement, and method of production thereof

Publications (3)

Publication Number Publication Date
GB9519996D0 GB9519996D0 (en) 1995-12-06
GB2307783A GB2307783A (en) 1997-06-04
GB2307783B true GB2307783B (en) 2000-04-05

Family

ID=10781563

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9519996A Expired - Lifetime GB2307783B (en) 1995-09-30 1995-09-30 Enhanced security semiconductor device, semiconductor circuit arrangement, and method of production thereof

Country Status (7)

Country Link
US (1) US6404217B1 (enExample)
EP (1) EP0855071B1 (enExample)
JP (1) JP3856156B2 (enExample)
CN (1) CN1198234A (enExample)
DE (1) DE69610109T2 (enExample)
GB (1) GB2307783B (enExample)
WO (1) WO1997013226A1 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19839807C1 (de) * 1998-09-01 1999-10-07 Siemens Ag Verfahren zum Betrieb einer integrierten Schaltung
US6624651B1 (en) * 2000-10-06 2003-09-23 International Business Machines Corporation Kerf circuit for modeling of BEOL capacitances
JP3726711B2 (ja) * 2001-05-31 2005-12-14 セイコーエプソン株式会社 半導体装置
JP2002373869A (ja) * 2001-06-13 2002-12-26 Mitsubishi Electric Corp 半導体チップ、シリコンウェハ、及び、半導体チップの製造方法
JP2003209147A (ja) * 2002-01-11 2003-07-25 Nec Microsystems Ltd チップ製造方法およびシステム
KR100487530B1 (ko) * 2002-07-26 2005-05-03 삼성전자주식회사 테스트 소자 그룹이 구비된 반도체 소자
GB0329516D0 (en) * 2003-12-19 2004-01-28 Univ Kent Canterbury Integrated circuit with debug support interface
DE102004014644A1 (de) * 2004-03-25 2005-10-13 Atmel Germany Gmbh Integrierter Schaltkreis
US8301890B2 (en) * 2006-08-10 2012-10-30 Inside Secure Software execution randomization
US7613907B2 (en) * 2006-08-11 2009-11-03 Atmel Corporation Embedded software camouflage against code reverse engineering
US7984301B2 (en) * 2006-08-17 2011-07-19 Inside Contactless S.A. Bi-processor architecture for secure systems
US7554865B2 (en) * 2006-09-21 2009-06-30 Atmel Corporation Randomizing current consumption in memory devices
US7563694B2 (en) * 2006-12-01 2009-07-21 Atmel Corporation Scribe based bond pads for integrated circuits
CN101950332B (zh) * 2010-07-12 2012-08-29 大唐微电子技术有限公司 芯片保护方法和系统
US10884951B2 (en) 2018-11-29 2021-01-05 Micron Technology, Inc. Memory disablement for data security
US20200350263A1 (en) * 2019-04-30 2020-11-05 Nxp B.V. Semiconductor devices with security features
US20200350220A1 (en) * 2019-04-30 2020-11-05 Nxp B.V. Semiconductor device with security features

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1983000244A1 (en) * 1981-07-10 1983-01-20 Motorola Inc Means and method for disabling access to a memory
US5285082A (en) * 1989-11-08 1994-02-08 U.S. Philips Corporation Integrated test circuits having pads provided along scribe lines
US5367763A (en) * 1993-09-30 1994-11-29 Atmel Corporation TAB testing of area array interconnected chips

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4356379A (en) * 1978-01-13 1982-10-26 Burr-Brown Research Corporation Integrated heating element and method for thermal testing and compensation of integrated circuits
US4439727A (en) * 1981-12-21 1984-03-27 Ibm Corporation Low capacitance pad for semiconductor chip testing
GB2206431B (en) * 1987-06-30 1991-05-29 Motorola Inc Data card circuits
US5059899A (en) * 1990-08-16 1991-10-22 Micron Technology, Inc. Semiconductor dies and wafers and methods for making
EP0494782B1 (en) * 1991-01-11 1997-04-23 Texas Instruments Incorporated Wafer burn-in and test system and method of making the same
DE4120665A1 (de) 1991-06-22 1992-12-24 Teves Gmbh Alfred Elektromotorisch angetriebene hydraulikpumpe
US5442282A (en) * 1992-07-02 1995-08-15 Lsi Logic Corporation Testing and exercising individual, unsingulated dies on a wafer
JPH06230086A (ja) * 1992-09-22 1994-08-19 Nec Corp Lsiのテスト回路
SE501470C2 (sv) 1993-06-28 1995-02-20 Moelnlycke Ab Förfarande för att tillverka artiklar, såsom kompresser, operationskompresser eller liknande, samt medelst förfarandet tillverkad artikel
JPH07169807A (ja) * 1993-12-16 1995-07-04 Nippondenso Co Ltd 半導体ウェハ
JP3529581B2 (ja) * 1997-03-14 2004-05-24 東芝マイクロエレクトロニクス株式会社 半導体ウェーハ及びicカード
DE19839807C1 (de) * 1998-09-01 1999-10-07 Siemens Ag Verfahren zum Betrieb einer integrierten Schaltung

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1983000244A1 (en) * 1981-07-10 1983-01-20 Motorola Inc Means and method for disabling access to a memory
US5285082A (en) * 1989-11-08 1994-02-08 U.S. Philips Corporation Integrated test circuits having pads provided along scribe lines
US5367763A (en) * 1993-09-30 1994-11-29 Atmel Corporation TAB testing of area array interconnected chips

Also Published As

Publication number Publication date
JP3856156B2 (ja) 2006-12-13
GB9519996D0 (en) 1995-12-06
DE69610109D1 (de) 2000-10-05
JP2000500888A (ja) 2000-01-25
EP0855071A1 (en) 1998-07-29
DE69610109T2 (de) 2001-04-05
EP0855071B1 (en) 2000-08-30
CN1198234A (zh) 1998-11-04
GB2307783A (en) 1997-06-04
WO1997013226A1 (en) 1997-04-10
US6404217B1 (en) 2002-06-11

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20090917 AND 20090923

PE20 Patent expired after termination of 20 years

Expiry date: 20150929