GB2197985A - Liquid crystal display - Google Patents
Liquid crystal display Download PDFInfo
- Publication number
- GB2197985A GB2197985A GB08723748A GB8723748A GB2197985A GB 2197985 A GB2197985 A GB 2197985A GB 08723748 A GB08723748 A GB 08723748A GB 8723748 A GB8723748 A GB 8723748A GB 2197985 A GB2197985 A GB 2197985A
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- Prior art keywords
- film
- electrodes
- electrode
- semiconductor layer
- gate
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- 239000004973 liquid crystal related substance Substances 0.000 title claims description 11
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 38
- 239000004065 semiconductor Substances 0.000 claims description 30
- 239000000758 substrate Substances 0.000 claims description 10
- 239000011159 matrix material Substances 0.000 claims description 6
- 239000010409 thin film Substances 0.000 claims description 6
- 229910021424 microcrystalline silicon Inorganic materials 0.000 claims description 3
- 239000010408 film Substances 0.000 description 68
- 238000000034 method Methods 0.000 description 18
- 238000000059 patterning Methods 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 4
- 239000007769 metal material Substances 0.000 description 4
- 238000002161 passivation Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 238000001771 vacuum deposition Methods 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- UHYPYGJEEGLRJD-UHFFFAOYSA-N cadmium(2+);selenium(2-) Chemical compound [Se-2].[Cd+2] UHYPYGJEEGLRJD-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78663—Amorphous silicon transistors
- H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Description
lk I'LIQUID CRYSTAL DISPLAY" 2197985 The present invention relates to
liquid crystal displays incorporating thin film transistors.
is Fig. 1 shows a general example of the prior art structure of a thin film transistor (TFT). The production process is as follows. A gate electrode 2, a gate-insulating film 3 and a semiconductor layer 4 are successively deposited on an insulating substrate 1. Then, a source electrode 5 and a drain electrode 6 are formed each on a part of the semiconductor layer 4 and the gate-insulating film 3. Furthermore, a passivation film 7 and a light shield 8 -are deposited successively. For the insulating substrate 1, for example, a glass plate, a ceramic plate or a silica plate is used. The gate electrode 2 is made of a metallic material such as Al, Ni, Cr and Au, while the gate-insulating film 3 is made of an oxide or a nitride such as SiO, SiO 21 Al 2 0 31 Ta 2 0 5 and Si 3 N 4 The semiconductor layer 4 is formed with a semiconducting material such as CdS, CdSe, Te, PbS, amorphous silicon (hereinafter referred to as a-Si) or microcrystalline silicon wherein at least a part of silicon becomes microcrystalline. The source and drain electrodes 5, 6 are made, for example, as an Al film or n a-Si film. The passivation film 7 is made of an oxide or a nitride such as SiO 2 and Si 3 N 41 while the light shield is made of a metallic material such as Al.
is When the semiconductor layer 4 is made of a-Si, an Al film or multilayer film consisting of n + a-Si and a metallic material such as Ti is often used as the source and drain electrode 5, 6. Fig. I shows an example of the structure of TFT in which Al electrodes are used. Fig. 2 shows another example of the structure of TFT wherein n + a-Si layers 51 and 61 are each interposed between the semiconductor layer 4 and Ti films 5, 6, and each of multilayer electrodes consists of n + a-Si layer 51 and 61 and Ti film 5 and 6 respectively.
In such cases that Al film or multilayer film of a metallic material and n + a-Si is used for electrode material in the process of producing TFT of a-Si, following problems arise:
(1) If Al film is used for electrode material, the temperature of the substrate 1 is usually kept high on the deposition of Al from the standpoint of the adhesion strength of Al and the stability of the quality of Al film. Then, Al atoms deposited on the a-Si layer 4 migrate into the a-Si layer 4. Thus, Al atoms remains in the a-Si layer 4 after the patterning of the source and drain electrodes 5, 6 so that the short circuit between both electrodes 5, 6 or the deterioration of the a-Si layer is liable to occur.
on the contrary, if Al is deposited at a low temperature, the adhesion strength becomes weak and the quality of the deposited film becomes unstable.
(2) If a multilayer film consisting of n + a-Si and metal such as Ti is used for the source and drain electrodes 5, 6 as shown in Fig. 2, the abovementioned contamination of the semiconductor layer 4 with Al atoms does not occur. It is necessary to etch the n + a-Si film 51 selectively against the a-Si semiconductor layer 4 in the process of the patterning of the n + a-Si film 51. However, both n a-Si film 51 and a-Si semiconductor layer 4 are etched quite similarly to each other by an etchant such as (HF+HNO 3) mixed solution and CF4 plasma. Then, the n + a-Si film on the a-Si semiconductor layer 4 should be etched selectively by controlling the etching time. Unfortunately, at present, the fluctuation in the thickness of n + a-Si film, the quality of n + a-Si film or the etching rate makes it difficult to control the process of producing a multilayer film so that the characteristics of TFT is inadequate for the stability and the reproducibility. Thus, in order to production a TFT of good characteristics it is required to establish the technique of etching n + a-Si film selectively.
(3) In a TFT with a structure shown in Figs. 1 and 2, a fairly large electrical capacitance exists between the gate electrode 2 and the source and drain electrodes 5, 6, and affects the characteristics of TFT.
4 (4) If a plurality of TFT having a structure as shown in Figs. 1 and 2 are used as adressing devices of a liquid crystal display apparatus of the matrix type, the active area to dead area ratio (A/D ratio), that is, the ratio between the area of the pixel electrodes and the remainder of the display becomes low due to the following reasons. Fig. 3 shows an arrangement of a TFT and a pixel electrode in such a liquid crystal display apparatus. ( For simplicity, such layers as the gate-insulating film 3 are omitted for clarity in Fig. 3.) Gate electrodes 2 are formed parallel to each other and source electrodes 5 perpendicular to the gate electrodes 2. Near each intersection of gate electrodes 2 and source electrodes 5, a TFT is constructed with an extention 2e of the gate electrode 2 and a side part of the source electrode 5, and the drain electrode 6 is connected electrically to the corresponding pixel electrode 100 which is deposited on the gate-insulating film. The gate- insulating film should be thin enough between the gate electrode 2 and the semiconductor film 4 to obtain necessary TFT characteristics. Thus, the gate-insulating film is thin also in the area of pixel electrodes 100. if the gate electrodes 2 and the pixel electrodes 100 are formed close to or overlapped with each other, troubles such as the short-circuit through pin-holes in the gate-insulating film 3 and the interference of the signal of the gate electrode 2 - 1 with that of the pixel electrode 100 occur because the gate-insulating electrode is thin. Then, the gaps a, b between the gate electrodes 2 and the pixel electrodes 100 should be wide enough to prevent such troubles. This makes the area of the pixel electrode 100 smaller so that the A/D ratio is reduced.
In order to overcome the abovementioned problems (1) and (2),, a TFT having a structure shown in Fig. 4 was proposed and has been used practically. In the process of producing the TFT, before the formation of the source and drain electrodes 5, 6 an insulator film 9 is formed by the patterning of an insulator film deposited on the semiconductor layer 4. However, even in this type of TFTj the abovementioned problems (3) and (4) still remain to be solved. That is, in order to realize good TFT characteristics, it is necessary to reduce the stray capacity between the gate electrode and the source and drain electrodes. Furthermore, when a plurality of TFT are used as adressing devices in a liquid crystal display apparatus of the matrix type, it is required to increase the A/D ratio in order to improve the brightness and the contrast of a picture to be displayed.
The.invention provides a liquid crystal display of the matrix type, in which pixel electrodes are each formed near a crossing of respective addressing electrodes and a thin film transistor is connected as an addressing device to a pixel electrode and the respective addressing electrodes, the thin film transistor comprising an insulating substrate, a gate electrode formed on the insulating substrate and connected to one of the said addressing electrodes, a gate-insulating layer formed on the gate electrode, a semiconductor layer formed on the gate-insulating layer, an insulating layer formed so as to cover the semiconductor layer, this insulating layer being formed with two openings and being also formed on said one addressing electrode, a source electrode and a drain electrode formed on the insulating layer, the source and drain electrodes being electrically contacted to the semiconductor layer through the said openings in the insulating layer, the drain electrodes being connected to the respective pixel electrode, which is formed on the said insulating layer, and the source electrode being connected to the other of the addressing electrodes.
Other objects and advantages of the invention will be apparent from the following description with reference to the accompanying drawings, in which:
Fig. 1 is a schematic cross-sectional view of a prior-art TFT; Fig. 2 is a schematic cross-sectional view of another prior-art TFT; Fig. 3 is a schematic plan view of a part of a liquid crystal display wherein a prior-art TFT is used as an adressing device; Fig. 4 is a schematic cross-sectional view of a modified prior-art TFT; Figs. 5, 6 and 7 are each cross-sectional view of an embodiment of the present invention; and Fig.-8 is'a schematic plan view of a part of a liquid crystal display of the active matrix display type. EMBODIMENTS Fig. 5 shows a cross-section of TFT of an embodiment of the present invention. After a Ta film is deposited on a glass substrate 10 with a process such as vacuum deposition and sputtering, a gate electrode 20 of Ta is formed by etching away the unnecessary part of the Ta film with a patterning process. Next, a gate-insulating film 30 of Ta 2 0 5 is formed on the surface of the gate electrode 20 by the anodic oxidation. A Si 3 N 4 film and an a-Si film are successively deposited on the Ta-0 film 30 and the glass substrate 10. Then, a double layer structure of a Si 3 N 4 film 31 and an a-Si film 40 is formed so as to cover the Ta 2 0 5 film 30 with a patterning process. Both 8 Ta 2 05 film 30 and Si 3 N 4 film 31 compose a gate-insulating layer, and their thickness should be thin enough to obtain necessary TFT characteristics. The Si 3 N 4 layer 31 is used to improve the gateinsulating properties of the Ta 2 0 5 film 30. The a-Si film 40 is the semiconductor layer of TFT. Next, a Si 3 N 4 film 90 is deposited so as to cover the semiconductor layer 40 with the plasma CW process and slots 91 and 92 for the connection of a source electrode 50 and of a drain electrode 60 are dug through the Si 3 N 4 film 90 with a patterning process near the edge of the gate electrode 20. Then, an Al film is deposited on the Si 3 N 4 film 90 in the slots 91 and 92, and is separated to form a source electrode 50 and a drain electrode 60 of Al by a patterning process. Both electrodes 50, 60 are kept in contact with the a-Si film 40 through the slots 91 and 92 in the Si 3 N 4 film 90 respectively. Next, a Si 3 N 4 passivation film 70 is deposited with the plasma CVD process on the source electrode 50, the drain electrode 60 and the Si 3 N 4 layer 90. Finally, an Al film is deposited on the Si 3 N 4 passivation film 70, and a light shield 80 is formed by the patterning of the Al film. In a TFT thus produced, insulating layer of the Si 3 N 4 film 90 is interposed between the a-Si semiconductor layer 40 and the source and drain electrodes 50, 60. It should be noted that the insulating layer 90 extends to almost all area of the semiconductor layer 40 except the slots 91 and 92.
is As mentioned above, the source and drain electrodes 50, 60 of Al film keep in contact with the a-Si semiconductor layer 40 only through the slots 91 and 92 dug in the Si 3 N 4 layer 90. That is, they do not keep unnecessary direct contact with the a-Si semiconductor layer 40 so that a portion of the latter 40 between the formers 500 60 is not contaminated with Al impurities contained in the formers 50, 60 during the deposition process of Al film. Then, the temperature of the substrate 10 can be made high enough on the process of depositing an Al film to allow good contact of the a-Si semiconductor layer 40 and the source and drain electrodes 50, 60 in the slots 91 and 92. Furthermore, the stray capacity between the gate electrode 20 and the source and drain electrodes 50, 60 decreases because of the interposition of the insulating film 90.
Fig. 6 shows a cross-section of a TFT of another embodiment of the present invention. The production process of the TFT is almost the same as that mentioned above except the following. The distance between the source and drain electrodes 50, 60 is shortened so that both electordes 50, 60 play a role as a light shield. Then, the process of forming the light shield 80 of Al film can be omitted.
Fig. 7 shows a cross-section of a TFT of a third embodiment of the present invention. The production process of the TFT is almost the same as that of a first embodiment except the process of forming the source and drain electrodes 50, 60. On the Si 3 N 4 film 90 and the slats 91, 92, n + a-Si film is deposited with the plasma CVD process and next a Ti film with the vacuum deposition process. Then a source electrode of a double layer of n + a-Si 55 and of Ti 50 and drain electrode of n + a-Si 65 and of Ti 60 are formed with the patterning process. In the production process, the n + a-Si layer can be etched selectively so that the thickness of the a-Si semiconductor layer 90 can be made thinner.
When, TFT's according to the present invention are used as the addressing devices of a liquid crystal display apparatus of matrix type (Fig. 8), it becomes unnecessary to make such wide gaps a and b as shown in Fig. 3 between gate electrodes 2 and the pixel electrodes 100 because a thick insulating film 90 exists between them. Even the overlapping with each other does not cause troubles mentioned above. Then, the area of the pixel electrode can be made wider and the A/D ratio larger. Furthermore, the stray capacitance at the cross portions of the gate electrodes 20 with the source electrodes 50 can be reduced considerably because the thick gate-insulating film 90 is imterposed at the cross portions.
Obvious changes may be made in the specific embodiments described herein. For example, a TFT having similar characteristics to those of the abovementioned embodiments can be produced by using microcrystalline silicon for the semiconductor film 40
Claims (4)
1. A liquid crystal display of the matrix type, in which pixel electrodes are each formed near a crossing of respective addressing electrodes and a thin film transistor is connected as an addressing device to a pixel electrode and the respective addressing electrodes, the thin film transistor comprising an insulating substrate, a gate electrode formed on the insulating substrate and connected to one of the said addressing electrodes, a gate-insulating layer formed on the gate electrode, a semiconductor layer formed on the gate-insulating layer, an insulating layer formed so as to cover the semiconductor layer, this insulating layer being formed with two openings and being also formed on said one addressing electrode, a source electrode and a drain electrode formed on the insulating layer, the source and drain electrodes being electrically contacted to the semiconductor layer through the said openings in the insulating layer, the drain electrodes being connected to the respective pixel electrode, which is formed on the said insulating layer, and the source electrode being connected to the other of the addressing electrodes.
2. A display according to claim 1, wherein said semiconductor layer is made of amorphous silicon.
3. A display according to claim 1, wherein said semiconductor layer is made of microcrystalline silicon.
4. A display according to any of claims 1 to 4, wherein said insulating layer is thick enough to lessen the stray capacity between said semiconductor layer and said source and drain electrodes.
is
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1676384A JPS60160173A (en) | 1984-01-30 | 1984-01-30 | Thin film transistor |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8723748D0 GB8723748D0 (en) | 1987-11-11 |
GB2197985A true GB2197985A (en) | 1988-06-02 |
GB2197985B GB2197985B (en) | 1988-10-12 |
Family
ID=11925260
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08502348A Expired GB2153589B (en) | 1984-01-30 | 1985-01-30 | Thin film transistor |
GB08723748A Expired GB2197985B (en) | 1984-01-30 | 1987-10-09 | Liquid crystal display |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08502348A Expired GB2153589B (en) | 1984-01-30 | 1985-01-30 | Thin film transistor |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPS60160173A (en) |
DE (1) | DE3502911A1 (en) |
GB (2) | GB2153589B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5814530A (en) * | 1996-09-27 | 1998-09-29 | Xerox Corporation | Producing a sensor with doped microcrystalline silicon channel leads |
US5959312A (en) * | 1996-09-27 | 1999-09-28 | Xerox Corporation | Sensor with doped microcrystalline silicon channel leads with bubble formation protection means |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2593327B1 (en) * | 1986-01-23 | 1988-10-28 | Commissariat Energie Atomique | METHOD FOR MANUFACTURING A THIN FILM TRANSISTOR USING TWO OR THREE LEVELS OF MASKING |
JPH0766253B2 (en) * | 1986-06-20 | 1995-07-19 | 松下電器産業株式会社 | Matrix type image display device |
FR2605442B1 (en) * | 1986-10-17 | 1988-12-09 | Thomson Csf | ELECTROOPTIC VISUALIZATION SCREEN WITH CONTROL TRANSISTORS AND METHOD FOR PRODUCING THE SAME |
JPS63166236A (en) * | 1986-12-26 | 1988-07-09 | Toshiba Corp | Electronic device |
JPH01173650A (en) * | 1987-12-26 | 1989-07-10 | Seikosha Co Ltd | Manufacture of amorphous silicon thin-film transistor |
EP0408653A4 (en) * | 1988-03-31 | 1991-10-16 | Solarex Corporation | Gate dielectric for a thin film field effect transistor |
FR2631743A1 (en) * | 1988-05-23 | 1989-11-24 | Gen Electric | STRUCTURE WITH NON-COPLANAR ELECTRODES FOR LIQUID CRYSTAL MATRIX DISPLAY WITH AMORPHOUS SILICON THIN FILM TRANSISTORS AND MANUFACTURING METHOD |
JPH0283981A (en) * | 1988-09-21 | 1990-03-26 | Fuji Xerox Co Ltd | Thin film transistor |
JPH0348463A (en) * | 1989-03-01 | 1991-03-01 | Mitsubishi Electric Corp | Thin film transistor |
EP0445535B1 (en) | 1990-02-06 | 1995-02-01 | Sel Semiconductor Energy Laboratory Co., Ltd. | Method of forming an oxide film |
DE69125886T2 (en) * | 1990-05-29 | 1997-11-20 | Semiconductor Energy Lab | Thin film transistors |
EP0535979A3 (en) * | 1991-10-02 | 1993-07-21 | Sharp Kabushiki Kaisha | A thin film transistor and a method for producing the same |
JP3369055B2 (en) * | 1996-09-06 | 2003-01-20 | シャープ株式会社 | Thin film semiconductor device and method of manufacturing the same |
JP3683463B2 (en) | 1999-03-11 | 2005-08-17 | シャープ株式会社 | Active matrix substrate, manufacturing method thereof, and image sensor using the substrate |
JP3916823B2 (en) | 1999-04-07 | 2007-05-23 | シャープ株式会社 | Active matrix substrate, manufacturing method thereof, and flat panel image sensor |
WO2011013502A1 (en) | 2009-07-31 | 2011-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
CN102473734B (en) * | 2009-07-31 | 2015-08-12 | 株式会社半导体能源研究所 | Semiconductor device and manufacture method thereof |
WO2011013523A1 (en) | 2009-07-31 | 2011-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
CN103489871B (en) | 2009-07-31 | 2016-03-23 | 株式会社半导体能源研究所 | Semiconductor device and manufacture method thereof |
KR102386147B1 (en) | 2009-07-31 | 2022-04-14 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device and manufacturing method thereof |
KR101073543B1 (en) * | 2009-09-04 | 2011-10-17 | 삼성모바일디스플레이주식회사 | Organic light emitting diode display |
US9166055B2 (en) | 2011-06-17 | 2015-10-20 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
US9214474B2 (en) | 2011-07-08 | 2015-12-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing semiconductor device |
US8952377B2 (en) | 2011-07-08 | 2015-02-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
KR102330543B1 (en) | 2012-04-13 | 2021-11-23 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device |
US10304859B2 (en) | 2013-04-12 | 2019-05-28 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having an oxide film on an oxide semiconductor film |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3840695A (en) * | 1972-10-10 | 1974-10-08 | Westinghouse Electric Corp | Liquid crystal image display panel with integrated addressing circuitry |
GB2064866A (en) * | 1979-11-30 | 1981-06-17 | Gen Electric Co Ltd | Field effect semiconductor device |
JPS5679472A (en) * | 1979-12-04 | 1981-06-30 | Toshiba Corp | Preparing method of mos-type semiconductor device |
US4389481A (en) * | 1980-06-02 | 1983-06-21 | Xerox Corporation | Method of making planar thin film transistors, transistor arrays |
JPS58147069A (en) * | 1982-02-25 | 1983-09-01 | Sharp Corp | Thin film transistor |
-
1984
- 1984-01-30 JP JP1676384A patent/JPS60160173A/en active Pending
-
1985
- 1985-01-29 DE DE19853502911 patent/DE3502911A1/en not_active Ceased
- 1985-01-30 GB GB08502348A patent/GB2153589B/en not_active Expired
-
1987
- 1987-10-09 GB GB08723748A patent/GB2197985B/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5814530A (en) * | 1996-09-27 | 1998-09-29 | Xerox Corporation | Producing a sensor with doped microcrystalline silicon channel leads |
US5959312A (en) * | 1996-09-27 | 1999-09-28 | Xerox Corporation | Sensor with doped microcrystalline silicon channel leads with bubble formation protection means |
Also Published As
Publication number | Publication date |
---|---|
GB2153589B (en) | 1988-10-12 |
GB2153589A (en) | 1985-08-21 |
GB8723748D0 (en) | 1987-11-11 |
GB2197985B (en) | 1988-10-12 |
JPS60160173A (en) | 1985-08-21 |
GB8502348D0 (en) | 1985-02-27 |
DE3502911A1 (en) | 1985-08-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PE20 | Patent expired after termination of 20 years |
Effective date: 20050129 |