GB1461943A - Semi-conductor devices - Google Patents

Semi-conductor devices

Info

Publication number
GB1461943A
GB1461943A GB482174A GB482174A GB1461943A GB 1461943 A GB1461943 A GB 1461943A GB 482174 A GB482174 A GB 482174A GB 482174 A GB482174 A GB 482174A GB 1461943 A GB1461943 A GB 1461943A
Authority
GB
United Kingdom
Prior art keywords
layer
grooves
semi
exceeding
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB482174A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Raytheon Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raytheon Co filed Critical Raytheon Co
Publication of GB1461943A publication Critical patent/GB1461943A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H10P50/644
    • H10P95/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
GB482174A 1973-02-21 1974-02-01 Semi-conductor devices Expired GB1461943A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US33449873A 1973-02-21 1973-02-21

Publications (1)

Publication Number Publication Date
GB1461943A true GB1461943A (en) 1977-01-19

Family

ID=23307490

Family Applications (1)

Application Number Title Priority Date Filing Date
GB482174A Expired GB1461943A (en) 1973-02-21 1974-02-01 Semi-conductor devices

Country Status (4)

Country Link
JP (1) JPS49115688A (enExample)
CA (1) CA1013867A (enExample)
DE (1) DE2408402A1 (enExample)
GB (1) GB1461943A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0060205A3 (en) * 1981-03-16 1983-02-23 Fairchild Camera & Instrument Corporation Low temperature melting binary glasses for leveling surfaces of integrated circuits containing isolation grooves
EP0071010A3 (en) * 1981-07-27 1984-11-28 International Business Machines Corporation Method for planarizing an integrated circuit structure
US4630343A (en) * 1981-03-16 1986-12-23 Fairchild Camera & Instrument Corp. Product for making isolated semiconductor structure

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55153345A (en) * 1979-05-18 1980-11-29 Fujitsu Ltd Manufacture of semiconductor device
JPS56160050A (en) * 1980-05-14 1981-12-09 Fujitsu Ltd Semiconductor device and manufacture thereof
US4394196A (en) * 1980-07-16 1983-07-19 Tokyo Shibaura Denki Kabushiki Kaisha Method of etching, refilling and etching dielectric grooves for isolating micron size device regions
JPS5743438A (en) * 1980-08-29 1982-03-11 Toshiba Corp Semiconductor device and manufacture thereof
KR19980701728A (ko) * 1995-01-30 1998-06-25 로렌스 제이.쉬뢰퍼 전자장치 및 그의 제조방법

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0060205A3 (en) * 1981-03-16 1983-02-23 Fairchild Camera & Instrument Corporation Low temperature melting binary glasses for leveling surfaces of integrated circuits containing isolation grooves
US4630343A (en) * 1981-03-16 1986-12-23 Fairchild Camera & Instrument Corp. Product for making isolated semiconductor structure
EP0071010A3 (en) * 1981-07-27 1984-11-28 International Business Machines Corporation Method for planarizing an integrated circuit structure

Also Published As

Publication number Publication date
CA1013867A (en) 1977-07-12
JPS49115688A (enExample) 1974-11-05
DE2408402A1 (de) 1974-08-22

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee