GB1461245A - Reliability of random access memory systems - Google Patents

Reliability of random access memory systems

Info

Publication number
GB1461245A
GB1461245A GB4476272A GB4476272A GB1461245A GB 1461245 A GB1461245 A GB 1461245A GB 4476272 A GB4476272 A GB 4476272A GB 4476272 A GB4476272 A GB 4476272A GB 1461245 A GB1461245 A GB 1461245A
Authority
GB
United Kingdom
Prior art keywords
memory
unit
chip
block
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4476272A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hawker Siddeley Dynamics Ltd
Original Assignee
Hawker Siddeley Dynamics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hawker Siddeley Dynamics Ltd filed Critical Hawker Siddeley Dynamics Ltd
Priority to GB4476272A priority Critical patent/GB1461245A/en
Priority to NL7401042A priority patent/NL7401042A/xx
Priority to DE2404146A priority patent/DE2404146A1/de
Priority to FR7402658A priority patent/FR2215671B3/fr
Priority to US05/456,647 priority patent/US3983537A/en
Publication of GB1461245A publication Critical patent/GB1461245A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/006—Identification
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G06F12/0661—Configuration or reconfiguration with centralised address assignment and decentralised selection
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Hardware Redundancy (AREA)
  • Storage Device Security (AREA)
GB4476272A 1973-01-28 1973-01-28 Reliability of random access memory systems Expired GB1461245A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
GB4476272A GB1461245A (en) 1973-01-28 1973-01-28 Reliability of random access memory systems
NL7401042A NL7401042A (enExample) 1973-01-28 1974-01-25
DE2404146A DE2404146A1 (de) 1973-01-28 1974-01-26 Digitales, hierarchisch in wenigstens drei hierarchie-stufen aufgebautes speichersystem
FR7402658A FR2215671B3 (enExample) 1973-01-28 1974-01-28
US05/456,647 US3983537A (en) 1973-01-28 1974-04-01 Reliability of random access memory systems

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB4476272A GB1461245A (en) 1973-01-28 1973-01-28 Reliability of random access memory systems
US05/456,647 US3983537A (en) 1973-01-28 1974-04-01 Reliability of random access memory systems

Publications (1)

Publication Number Publication Date
GB1461245A true GB1461245A (en) 1977-01-13

Family

ID=26265450

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4476272A Expired GB1461245A (en) 1973-01-28 1973-01-28 Reliability of random access memory systems

Country Status (5)

Country Link
US (1) US3983537A (enExample)
DE (1) DE2404146A1 (enExample)
FR (1) FR2215671B3 (enExample)
GB (1) GB1461245A (enExample)
NL (1) NL7401042A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2062912A (en) * 1979-09-29 1981-05-28 Plessey Co Ltd Data processing system including internal register addressing arrangements
GB2234095A (en) * 1989-07-21 1991-01-23 Samsung Electronics Co Ltd Memory arrangement

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4150428A (en) * 1974-11-18 1979-04-17 Northern Electric Company Limited Method for providing a substitute memory in a data processing system
US4084230A (en) * 1976-11-29 1978-04-11 International Business Machines Corporation Hybrid semiconductor memory with on-chip associative page addressing, page replacement and control
DE2841222A1 (de) * 1978-09-22 1980-03-27 Telefonbau & Normalzeit Gmbh Schaltungsanordnung zur adressierung von modular aufgebauten und erweiterungsfaehigen daten-speicheranordnungen
US4254463A (en) * 1978-12-14 1981-03-03 Rockwell International Corporation Data processing system with address translation
US4293910A (en) * 1979-07-02 1981-10-06 International Business Machines Corporation Reconfigurable key-in-storage means for protecting interleaved main storage
JPS5847793B2 (ja) * 1979-11-12 1983-10-25 富士通株式会社 半導体記憶装置
US4498146A (en) * 1982-07-30 1985-02-05 At&T Bell Laboratories Management of defects in storage media
US4506364A (en) * 1982-09-30 1985-03-19 International Business Machines Corporation Memory address permutation apparatus
US4916603A (en) * 1985-03-18 1990-04-10 Wang Labortatories, Inc. Distributed reference and change table for a virtual memory system
WO1988009995A1 (en) * 1987-06-02 1988-12-15 Hughes Aircraft Company Pipeline memory structure
US5587962A (en) * 1987-12-23 1996-12-24 Texas Instruments Incorporated Memory circuit accommodating both serial and random access including an alternate address buffer register
US5093807A (en) 1987-12-23 1992-03-03 Texas Instruments Incorporated Video frame storage system
US5155834A (en) * 1988-03-18 1992-10-13 Wang Laboratories, Inc. Reference and change table storage system for virtual memory data processing system having a plurality of processors accessing common memory
US5243703A (en) * 1990-04-18 1993-09-07 Rambus, Inc. Apparatus for synchronously generating clock signals in a data processing system
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US6751696B2 (en) 1990-04-18 2004-06-15 Rambus Inc. Memory device having a programmable register
US5831467A (en) * 1991-11-05 1998-11-03 Monolithic System Technology, Inc. Termination circuit with power-down mode for use in circuit module architecture
US5498990A (en) * 1991-11-05 1996-03-12 Monolithic System Technology, Inc. Reduced CMOS-swing clamping circuit for bus lines
US5576554A (en) * 1991-11-05 1996-11-19 Monolithic System Technology, Inc. Wafer-scale integrated circuit interconnect structure architecture
DE69226150T2 (de) * 1991-11-05 1999-02-18 Hsu Fu Chieh Redundanzarchitektur für Schaltungsmodul
DE69331061T2 (de) * 1992-08-10 2002-06-06 Monolithic System Tech Inc Fehlertolerantes hierarchisiertes Bussystem
US5655113A (en) 1994-07-05 1997-08-05 Monolithic System Technology, Inc. Resynchronization circuit for a memory system and method of operating same
US6609169B1 (en) 1999-06-14 2003-08-19 Jay Powell Solid-state audio-video playback system
US6567290B2 (en) * 2000-07-05 2003-05-20 Mosaic Systems, Inc. High-speed low-power semiconductor memory architecture
US20050041453A1 (en) * 2003-08-22 2005-02-24 Brazis Paul W. Method and apparatus for reading and writing to solid-state memory
US8130528B2 (en) 2008-08-25 2012-03-06 Sandisk 3D Llc Memory system with sectional data lines
US8279650B2 (en) 2009-04-20 2012-10-02 Sandisk 3D Llc Memory system with data line switching scheme

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1218406A (en) * 1968-07-04 1971-01-06 Ibm An electronic data processing system
US3633175A (en) * 1969-05-15 1972-01-04 Honeywell Inc Defect-tolerant digital memory system
US3753244A (en) * 1971-08-18 1973-08-14 Ibm Yield enhancement redundancy technique
US3781826A (en) * 1971-11-15 1973-12-25 Ibm Monolithic memory utilizing defective storage cells
US3753242A (en) * 1971-12-16 1973-08-14 Honeywell Inf Systems Memory overlay system
US3755791A (en) * 1972-06-01 1973-08-28 Ibm Memory system with temporary or permanent substitution of cells for defective cells
US3803560A (en) * 1973-01-03 1974-04-09 Honeywell Inf Systems Technique for detecting memory failures and to provide for automatically for reconfiguration of the memory modules of a memory system
US3821715A (en) * 1973-01-22 1974-06-28 Intel Corp Memory system for a multi chip digital computer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2062912A (en) * 1979-09-29 1981-05-28 Plessey Co Ltd Data processing system including internal register addressing arrangements
US4383297A (en) 1979-09-29 1983-05-10 Plessey Overseas Limited Data processing system including internal register addressing arrangements
GB2234095A (en) * 1989-07-21 1991-01-23 Samsung Electronics Co Ltd Memory arrangement
GB2234095B (en) * 1989-07-21 1993-08-18 Samsung Electronics Co Ltd Memory arrangements

Also Published As

Publication number Publication date
NL7401042A (enExample) 1974-07-30
DE2404146A1 (de) 1974-08-01
FR2215671B3 (enExample) 1976-11-19
FR2215671A1 (enExample) 1974-08-23
US3983537A (en) 1976-09-28

Similar Documents

Publication Publication Date Title
GB1461245A (en) Reliability of random access memory systems
US4550368A (en) High-speed memory and memory management system
US4386402A (en) Computer with dual vat buffers for accessing a common memory shared by a cache and a processor interrupt stack
CA2124618A1 (en) Method and apparatus for intializing multiple bus networks in an information handling system
AU1482588A (en) Multimode expanded memory space addressing system using independently generated dma channel selection and dma page address signals
EP0307945B1 (en) Memory control apparatus for use in a data processing system
EP0509994B1 (en) Centralized reference and change table for a multiprocessor virtual memory system
US5101339A (en) Computer address modification system using writable mapping and page stores
US4764896A (en) Microprocessor assisted memory to memory move apparatus
CN118525335B (zh) 用于恢复细粒度dram中的常规访问性能的方法和装置
US5410662A (en) Programmable control of EMS page register addresses
JPS58201157A (ja) バンクメモリの制御回路
KR900009212Y1 (ko) 어드레스 제어장치
JPS5821306B2 (ja) アドレス変換機能を持つたデ−タ処理装置
Seymour Memory Expansion Hardware for PDP11 Computers
JPH10207825A (ja) データ転送装置
JPS635460A (ja) 並列計算機
Poppendieck et al. Memory extension techniques for mini-computers
Desautels Mary Poppendieck and
JPS60129855A (ja) 信号処理プロセツサ
JPS61296464A (ja) デ−タ処理装置
JPS6326744A (ja) マイクロプロセツサにおけるメモリバンク切り換え回路
JPH04205435A (ja) インサーキットエミュレータ装置
JPS62229457A (ja) Ｄｍａデータ転送制御装置
JPH0414147A (ja) 中央演算処理装置

Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
435 Patent endorsed 'licences of right' on the date specified (sect. 35/1949)
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee