GB1379558A - Methods of manufacture of multilayer circuit structures - Google Patents
Methods of manufacture of multilayer circuit structuresInfo
- Publication number
- GB1379558A GB1379558A GB1515571A GB1515571A GB1379558A GB 1379558 A GB1379558 A GB 1379558A GB 1515571 A GB1515571 A GB 1515571A GB 1515571 A GB1515571 A GB 1515571A GB 1379558 A GB1379558 A GB 1379558A
- Authority
- GB
- United Kingdom
- Prior art keywords
- layer
- multilayer circuit
- mask
- plated
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0733—Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
- H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB1515571A GB1379558A (en) | 1971-05-15 | 1971-05-15 | Methods of manufacture of multilayer circuit structures |
| FR7217293A FR2137902B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1971-05-15 | 1972-05-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB1515571A GB1379558A (en) | 1971-05-15 | 1971-05-15 | Methods of manufacture of multilayer circuit structures |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1379558A true GB1379558A (en) | 1975-01-02 |
Family
ID=10054011
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1515571A Expired GB1379558A (en) | 1971-05-15 | 1971-05-15 | Methods of manufacture of multilayer circuit structures |
Country Status (2)
| Country | Link |
|---|---|
| FR (1) | FR2137902B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
| GB (1) | GB1379558A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4258468A (en) * | 1978-12-14 | 1981-03-31 | Western Electric Company, Inc. | Forming vias through multilayer circuit boards |
| DE3211025A1 (de) * | 1981-04-14 | 1982-10-21 | Kollmorgen Technologies Corp., 75201 Dallas, Tex. | Verbindungsnetzwerk fuer bauelemente und verfahren zu dessen herstellung |
| US4703559A (en) * | 1984-11-02 | 1987-11-03 | Kernforschungszentrum Karlsruhe Gmbh | Method for producing connecting elements for electrically joining microelectronic components |
| EP1194021A3 (en) * | 2000-09-27 | 2003-07-23 | Hitachi, Ltd. | Method of producing multilayer printed wiring board and multilayer printed wiring board |
| EP1450590A3 (en) * | 2003-02-24 | 2007-01-17 | Endicott Interconnect Technologies, Inc. | Circuitized substrate and method of making same |
| CN110868797A (zh) * | 2019-12-10 | 2020-03-06 | 东莞阿尔泰显示技术有限公司 | 电路板及其制造方法、半导体元件模板 |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2199183B (en) * | 1986-12-23 | 1990-07-04 | Gen Electric Plc | Interconnection formation in multilayer circuits |
| DE69105753T2 (de) * | 1990-11-15 | 1995-05-24 | Ibm | Herstellungsmethode einer dünnschichtmehrlagenstruktur. |
| US5266446A (en) * | 1990-11-15 | 1993-11-30 | International Business Machines Corporation | Method of making a multilayer thin film structure |
| FR2785761B1 (fr) * | 1998-11-05 | 2002-01-25 | Rapide Circuit Imprime Rci | Procede pour realiser des connexions electriques |
-
1971
- 1971-05-15 GB GB1515571A patent/GB1379558A/en not_active Expired
-
1972
- 1972-05-15 FR FR7217293A patent/FR2137902B1/fr not_active Expired
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4258468A (en) * | 1978-12-14 | 1981-03-31 | Western Electric Company, Inc. | Forming vias through multilayer circuit boards |
| DE3211025A1 (de) * | 1981-04-14 | 1982-10-21 | Kollmorgen Technologies Corp., 75201 Dallas, Tex. | Verbindungsnetzwerk fuer bauelemente und verfahren zu dessen herstellung |
| DE3211025C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1981-04-14 | 1991-11-21 | Kollmorgen Corp., Simsbury, Conn., Us | |
| US4703559A (en) * | 1984-11-02 | 1987-11-03 | Kernforschungszentrum Karlsruhe Gmbh | Method for producing connecting elements for electrically joining microelectronic components |
| EP1194021A3 (en) * | 2000-09-27 | 2003-07-23 | Hitachi, Ltd. | Method of producing multilayer printed wiring board and multilayer printed wiring board |
| US6772515B2 (en) | 2000-09-27 | 2004-08-10 | Hitachi, Ltd. | Method of producing multilayer printed wiring board |
| EP1450590A3 (en) * | 2003-02-24 | 2007-01-17 | Endicott Interconnect Technologies, Inc. | Circuitized substrate and method of making same |
| CN110868797A (zh) * | 2019-12-10 | 2020-03-06 | 东莞阿尔泰显示技术有限公司 | 电路板及其制造方法、半导体元件模板 |
Also Published As
| Publication number | Publication date |
|---|---|
| FR2137902B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1975-08-01 |
| FR2137902A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1972-12-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| PE20 | Patent expired after termination of 20 years |