GB1287791A - A microcircuit and manufacture of same - Google Patents

A microcircuit and manufacture of same

Info

Publication number
GB1287791A
GB1287791A GB53604/69A GB5360469A GB1287791A GB 1287791 A GB1287791 A GB 1287791A GB 53604/69 A GB53604/69 A GB 53604/69A GB 5360469 A GB5360469 A GB 5360469A GB 1287791 A GB1287791 A GB 1287791A
Authority
GB
United Kingdom
Prior art keywords
layer
resist
conductor
gold
conductors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB53604/69A
Inventor
Franco Forlani
Nicola Minnaja
Antonio Puzone
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Original Assignee
Honeywell Information Systems Italia SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA filed Critical Honeywell Information Systems Italia SpA
Publication of GB1287791A publication Critical patent/GB1287791A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4685Manufacturing of cross-over conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N97/00Electric solid-state thin-film or thick-film devices, not otherwise provided for
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

1287791 Circuit assemblies HONEYWELL INFORMATION SYSTEMS ITALIA SpA 31 Oct 1969 53604/69 Heading H1R A microcircuit comprises an insulating substrate 1 supporting conductors such as 2 each comprising a first thin layer 2a, a second thin layer 2b and an electrolytically deposited layer 2c, the conductors being separated from further conductors such as 4 crossing them by insulating layers 5. To construct the circuit, the substrate is covered with a vacuum deposited layer of nickel-chromium alloy, then a vacuum deposited gold layer followed by a layer of photo-sensitive resist material. A conductor pattern is defined on the resist layer using a mask and is exposed by solution of the resist layer covering it. After the electrolytic deposition of gold to form the third layer, the remaining photo-resist layer is removed and the underlying thin metal layers etched away. Alternatively it is the resist layer covering the unwanted part of the conductor layer which is first removed, followed by the unwanted conductive layer. Electrodeposition of gold follows removal of resist from the pattern. Then the insulating layer 5 is applied by silk-screening ceramic material and, as shown, the cross-over conductor 4 is formed in the same way as conductor 2. Alternatively it may be screen printed.
GB53604/69A 1968-10-31 1969-10-31 A microcircuit and manufacture of same Expired GB1287791A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT846347 1968-10-31

Publications (1)

Publication Number Publication Date
GB1287791A true GB1287791A (en) 1972-09-06

Family

ID=11126731

Family Applications (1)

Application Number Title Priority Date Filing Date
GB53604/69A Expired GB1287791A (en) 1968-10-31 1969-10-31 A microcircuit and manufacture of same

Country Status (1)

Country Link
GB (1) GB1287791A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2517503A1 (en) * 1981-11-30 1983-06-03 Nippon Electric Co SUBSTRATE COMPRISING A PATTERN CONSISTING OF A GOLD ALLOY, A NOBLE METAL AND A BASE METAL, THE PATTERN BEING ISOLATED BY OXIDES OF NOBLE AND BASE METALS
EP0098472A1 (en) * 1982-07-02 1984-01-18 International Business Machines Corporation Method for decreasing plated metal defects by treating a metallic surface
EP0374452A2 (en) * 1988-12-23 1990-06-27 Corning Incorporated Hybrid circuits and thick film dielectrics used therein
US7745735B2 (en) 2003-07-12 2010-06-29 Hewlett-Packard Development Company, L.P. Cross-over of conductive interconnects and a method of crossing conductive interconnects

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2517503A1 (en) * 1981-11-30 1983-06-03 Nippon Electric Co SUBSTRATE COMPRISING A PATTERN CONSISTING OF A GOLD ALLOY, A NOBLE METAL AND A BASE METAL, THE PATTERN BEING ISOLATED BY OXIDES OF NOBLE AND BASE METALS
EP0098472A1 (en) * 1982-07-02 1984-01-18 International Business Machines Corporation Method for decreasing plated metal defects by treating a metallic surface
EP0374452A2 (en) * 1988-12-23 1990-06-27 Corning Incorporated Hybrid circuits and thick film dielectrics used therein
EP0374452A3 (en) * 1988-12-23 1991-05-02 Corning Incorporated Hybrid circuits and thick film dielectrics used therein
US7745735B2 (en) 2003-07-12 2010-06-29 Hewlett-Packard Development Company, L.P. Cross-over of conductive interconnects and a method of crossing conductive interconnects

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees