GB1360996A - Semiconductor device and method for manufacture - Google Patents

Semiconductor device and method for manufacture

Info

Publication number
GB1360996A
GB1360996A GB1918471A GB1918471A GB1360996A GB 1360996 A GB1360996 A GB 1360996A GB 1918471 A GB1918471 A GB 1918471A GB 1918471 A GB1918471 A GB 1918471A GB 1360996 A GB1360996 A GB 1360996A
Authority
GB
United Kingdom
Prior art keywords
semi
islands
conductor
june
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1918471A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of GB1360996A publication Critical patent/GB1360996A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283—Lateral isolation by refilling of trenches with dielectric material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
GB1918471A 1970-06-15 1971-06-07 Semiconductor device and method for manufacture Expired GB1360996A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5100070 1970-06-15

Publications (1)

Publication Number Publication Date
GB1360996A true GB1360996A (en) 1974-07-24

Family

ID=12874501

Family Applications (2)

Application Number Title Priority Date Filing Date
GB1918471A Expired GB1360996A (en) 1970-06-15 1971-06-07 Semiconductor device and method for manufacture
GB785274A Expired GB1362512A (en) 1970-06-15 1971-06-07 Semiconductor device and method for manufacture

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB785274A Expired GB1362512A (en) 1970-06-15 1971-06-07 Semiconductor device and method for manufacture

Country Status (4)

Country Link
DE (1) DE2129676A1 (enrdf_load_stackoverflow)
FR (1) FR2095258B1 (enrdf_load_stackoverflow)
GB (2) GB1360996A (enrdf_load_stackoverflow)
NL (1) NL7108101A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19643143C2 (de) * 1996-10-18 2002-06-20 Inventa Ag Haftvermittler für Polyamid-Verbunde, Verfahren zu deren Herstellung sowie deren Verwendung

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1086607A (en) * 1965-06-03 1967-10-11 Ncr Co Method of electrically isolating components in solid-state electronic circuits
NL153374B (nl) * 1966-10-05 1977-05-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze.

Also Published As

Publication number Publication date
GB1362512A (en) 1974-08-07
DE2129676A1 (de) 1972-02-10
NL7108101A (enrdf_load_stackoverflow) 1971-12-17
FR2095258A1 (enrdf_load_stackoverflow) 1972-02-11
FR2095258B1 (enrdf_load_stackoverflow) 1977-04-22

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees