DE2129676A1 - Halbleiter-Einrichtung und Verfahren zu ihrer Herstellung - Google Patents
Halbleiter-Einrichtung und Verfahren zu ihrer HerstellungInfo
- Publication number
- DE2129676A1 DE2129676A1 DE19712129676 DE2129676A DE2129676A1 DE 2129676 A1 DE2129676 A1 DE 2129676A1 DE 19712129676 DE19712129676 DE 19712129676 DE 2129676 A DE2129676 A DE 2129676A DE 2129676 A1 DE2129676 A1 DE 2129676A1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor
- layer
- conductivity type
- substrate
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 135
- 238000000034 method Methods 0.000 title claims description 20
- 239000000758 substrate Substances 0.000 claims description 44
- 229910052710 silicon Inorganic materials 0.000 claims description 26
- 239000010703 silicon Substances 0.000 claims description 26
- 238000009413 insulation Methods 0.000 claims description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 9
- 239000013078 crystal Substances 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 8
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 4
- 239000000356 contaminant Substances 0.000 claims 1
- 238000002955 isolation Methods 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 230000015556 catabolic process Effects 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 2
- 239000012774 insulation material Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 229910014299 N-Si Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76283—Lateral isolation by refilling of trenches with dielectric material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5100070 | 1970-06-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE2129676A1 true DE2129676A1 (de) | 1972-02-10 |
Family
ID=12874501
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19712129676 Pending DE2129676A1 (de) | 1970-06-15 | 1971-06-15 | Halbleiter-Einrichtung und Verfahren zu ihrer Herstellung |
Country Status (4)
Country | Link |
---|---|
DE (1) | DE2129676A1 (enrdf_load_stackoverflow) |
FR (1) | FR2095258B1 (enrdf_load_stackoverflow) |
GB (2) | GB1362512A (enrdf_load_stackoverflow) |
NL (1) | NL7108101A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19643143A1 (de) * | 1996-10-18 | 1998-04-23 | Inventa Ag | Haftvermittler für Polyamid-Verbunde |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1086607A (en) * | 1965-06-03 | 1967-10-11 | Ncr Co | Method of electrically isolating components in solid-state electronic circuits |
NL153374B (nl) * | 1966-10-05 | 1977-05-16 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze. |
-
1971
- 1971-06-07 GB GB785274A patent/GB1362512A/en not_active Expired
- 1971-06-07 GB GB1918471A patent/GB1360996A/en not_active Expired
- 1971-06-14 FR FR7121453A patent/FR2095258B1/fr not_active Expired
- 1971-06-14 NL NL7108101A patent/NL7108101A/xx unknown
- 1971-06-15 DE DE19712129676 patent/DE2129676A1/de active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19643143A1 (de) * | 1996-10-18 | 1998-04-23 | Inventa Ag | Haftvermittler für Polyamid-Verbunde |
DE19643143C2 (de) * | 1996-10-18 | 2002-06-20 | Inventa Ag | Haftvermittler für Polyamid-Verbunde, Verfahren zu deren Herstellung sowie deren Verwendung |
Also Published As
Publication number | Publication date |
---|---|
FR2095258B1 (enrdf_load_stackoverflow) | 1977-04-22 |
GB1362512A (en) | 1974-08-07 |
FR2095258A1 (enrdf_load_stackoverflow) | 1972-02-11 |
GB1360996A (en) | 1974-07-24 |
NL7108101A (enrdf_load_stackoverflow) | 1971-12-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69331052T2 (de) | Integrierte Randstruktur für Hochspannung-Halbleiteranordnungen und dazugehöriger Herstellungsprozess | |
DE68928087T2 (de) | Substratsstruktur für zusammengesetztes Halbleiterbauelement | |
DE3437512C2 (de) | Integrierte Halbleiterschaltung mit Isolationsbereichen und Verfahren zu ihrer Herstellung | |
DE2032315C3 (de) | Halbleiteranordnung mit emittergekoppelten inversen Transistoren sowie Verfahren zu ihrer Herstellung | |
DE1764464C3 (de) | Verfahren zur Herstellung eines lateralen Transistors | |
DE2203183A1 (de) | Integrierte Halbleiterschaltungsanordnung | |
EP0001574B1 (de) | Halbleiteranordnung für Widerstandsstrukturen in hochintegrierten Schaltkreisen und Verfahren zur Herstellung dieser Halbleiteranordnung | |
DE3334337A1 (de) | Verfahren zur herstellung einer integrierten halbleitereinrichtung | |
DE1514818B2 (enrdf_load_stackoverflow) | ||
DE2223699A1 (de) | Dielektrisch isolierte Halbleiteranordnung und Verfahren zur Herstellung | |
DE2531927A1 (de) | Polykristallines silizium-widerstandselement fuer integrierte schaltungen | |
DE2238450A1 (de) | Halbleiterbaugruppe und verfahren zur herstellung derselben | |
DE2420239A1 (de) | Verfahren zur herstellung doppelt diffundierter lateraler transistoren | |
DE1589687C3 (de) | Festkörperschaltung mit isolierten Feldeffekttransistoren und Verfahren zu ihrer Herstellung | |
DE43244T1 (de) | Statische fet-flip-flop-speicherzelle mit einer einzigen polykristallinen siliziumschicht. | |
DE2133979C3 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
DE10229003B4 (de) | Ein Verfahren zur Herstellung eines SOI-Feldeffekttransistorelements mit einem Rekombinationsgebiet | |
DE2510593A1 (de) | Integrierte halbleiter-schaltungsanordnung | |
DE2133976A1 (de) | Halbleiteranordnung, insbesondere mono hthische integrierte Schaltung, und Ver fahren zu deren Herstellung | |
DE1764570B2 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung mit zueinander komplementären NPN- und PNP-Transistoren | |
DE3100839A1 (de) | Integrierte schaltungsanordnung | |
DE69131390T2 (de) | Verfahren zur Herstellung einer vergrabenen Drain- oder Kollektorzone für monolythische Halbleiteranordnungen | |
DE3787763T2 (de) | Zusammengesetzte Halbleiteranordnung. | |
DE3486144T2 (de) | Verfahren zur herstellung einer halbleiteranordnung. | |
DE1764578B2 (de) | Verfahren zur Herstellung einer Halbleiteranordnung mit einem Feldeffekttransistor |