ES404273A1 - Una disposicion de circuito integrado. - Google Patents

Una disposicion de circuito integrado.

Info

Publication number
ES404273A1
ES404273A1 ES404273A ES404273A ES404273A1 ES 404273 A1 ES404273 A1 ES 404273A1 ES 404273 A ES404273 A ES 404273A ES 404273 A ES404273 A ES 404273A ES 404273 A1 ES404273 A1 ES 404273A1
Authority
ES
Spain
Prior art keywords
silicon
islands
semiconductor
silicon dioxide
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES404273A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of ES404273A1 publication Critical patent/ES404273A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/03—Manufacture or treatment wherein the substrate comprises sapphire, e.g. silicon-on-sapphire [SOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H10D88/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/021—Manufacture or treatment of air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/20—Air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/008—Bi-level fabrication
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/15—Silicon on sapphire SOS

Landscapes

  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
ES404273A 1971-10-21 1972-06-26 Una disposicion de circuito integrado. Expired ES404273A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US19145571A 1971-10-21 1971-10-21

Publications (1)

Publication Number Publication Date
ES404273A1 true ES404273A1 (es) 1975-06-01

Family

ID=22705564

Family Applications (2)

Application Number Title Priority Date Filing Date
ES404273A Expired ES404273A1 (es) 1971-10-21 1972-06-26 Una disposicion de circuito integrado.
ES410640A Expired ES410640A1 (es) 1971-10-21 1973-01-15 Un metodo para fabricar un circuito integrado.

Family Applications After (1)

Application Number Title Priority Date Filing Date
ES410640A Expired ES410640A1 (es) 1971-10-21 1973-01-15 Un metodo para fabricar un circuito integrado.

Country Status (12)

Country Link
US (1) US3791024A (es)
JP (1) JPS5112992B2 (es)
AU (1) AU462435B2 (es)
BE (1) BE786089A (es)
CA (1) CA967288A (es)
DE (1) DE2235185A1 (es)
ES (2) ES404273A1 (es)
FR (1) FR2156543B1 (es)
GB (1) GB1339095A (es)
IT (1) IT956533B (es)
NL (1) NL7209192A (es)
SE (1) SE376327B (es)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4074304A (en) * 1974-10-04 1978-02-14 Nippon Electric Company, Ltd. Semiconductor device having a miniature junction area and process for fabricating same
US4094057A (en) * 1976-03-29 1978-06-13 International Business Machines Corporation Field effect transistor lost film fabrication process
JPS5721856B2 (en) * 1977-11-28 1982-05-10 Nippon Telegraph & Telephone Semiconductor and its manufacture
US4199384A (en) * 1979-01-29 1980-04-22 Rca Corporation Method of making a planar semiconductor on insulating substrate device utilizing the deposition of a dual dielectric layer between device islands
JPH0628313B2 (ja) * 1982-01-19 1994-04-13 キヤノン株式会社 半導体素子
US4481707A (en) * 1983-02-24 1984-11-13 The United States Of America As Represented By The Secretary Of The Air Force Method for the fabrication of dielectric isolated junction field effect transistor and PNP transistor
JPS6072243A (ja) * 1983-09-28 1985-04-24 Matsushita Electric Ind Co Ltd 半導体集積回路装置
US4879585A (en) * 1984-03-31 1989-11-07 Kabushiki Kaisha Toshiba Semiconductor device
US4897698A (en) * 1984-10-31 1990-01-30 Texas Instruments Incorporated Horizontal structure thin film transistor
JPH01162376A (ja) * 1987-12-18 1989-06-26 Fujitsu Ltd 半導体装置の製造方法
US5525536A (en) * 1991-12-26 1996-06-11 Rohm Co., Ltd. Method for producing SOI substrate and semiconductor device using the same
US5952695A (en) * 1997-03-05 1999-09-14 International Business Machines Corporation Silicon-on-insulator and CMOS-on-SOI double film structures
US5889293A (en) * 1997-04-04 1999-03-30 International Business Machines Corporation Electrical contact to buried SOI structures
US5834350A (en) 1997-06-11 1998-11-10 Advanced Micro Devices, Inc. Elevated transistor fabrication technique
US6353246B1 (en) * 1998-11-23 2002-03-05 International Business Machines Corporation Semiconductor device including dislocation in merged SOI/DRAM chips
JP4540146B2 (ja) 1998-12-24 2010-09-08 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US6259135B1 (en) 1999-09-24 2001-07-10 International Business Machines Corporation MOS transistors structure for reducing the size of pitch limited circuits
US9284729B2 (en) 2010-05-05 2016-03-15 Allsteel Inc. Modular wall system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3290753A (en) * 1963-08-19 1966-12-13 Bell Telephone Labor Inc Method of making semiconductor integrated circuit elements
US3359467A (en) * 1965-02-04 1967-12-19 Texas Instruments Inc Resistors for integrated circuits
US3442011A (en) * 1965-06-30 1969-05-06 Texas Instruments Inc Method for isolating individual devices in an integrated circuit monolithic bar
US3519901A (en) * 1968-01-29 1970-07-07 Texas Instruments Inc Bi-layer insulation structure including polycrystalline semiconductor material for integrated circuit isolation

Also Published As

Publication number Publication date
IT956533B (it) 1973-10-10
SE376327B (es) 1975-05-12
AU462435B2 (en) 1975-06-26
DE2235185A1 (de) 1973-04-26
GB1339095A (en) 1973-11-28
FR2156543A1 (es) 1973-06-01
JPS5112992B2 (es) 1976-04-23
AU4573072A (en) 1974-03-07
CA967288A (en) 1975-05-06
US3791024A (en) 1974-02-12
BE786089A (fr) 1972-11-03
FR2156543B1 (es) 1977-08-26
NL7209192A (es) 1973-04-25
ES410640A1 (es) 1975-12-01
JPS4850679A (es) 1973-07-17

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