GB1356157A - Semiconductor device with polymeric passivant bonded preform - Google Patents
Semiconductor device with polymeric passivant bonded preformInfo
- Publication number
- GB1356157A GB1356157A GB1675671A GB1675671A GB1356157A GB 1356157 A GB1356157 A GB 1356157A GB 1675671 A GB1675671 A GB 1675671A GB 1675671 A GB1675671 A GB 1675671A GB 1356157 A GB1356157 A GB 1356157A
- Authority
- GB
- United Kingdom
- Prior art keywords
- preform
- wafer
- passivant
- polymeric
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/051—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Thyristors (AREA)
Abstract
1356157 Semi-conductor devices GENERAL ELECTRIC CO 24 May 1971 [22 May 1970] 16756/71 Heading H1K A semi-conductor device comprises a wafer having ohmic contacts associated with opposite major faces, an insulating preform peripherally encompassing the wafer, the preform and one contact having spaced approximately conforming surfaces and a layer of polymeric passivant interposed between and bonded to the peripheral edge of the wafer and the approximately conforming surfaces of the contact and preform. In a first embodiment, Fig. 1 (not shown), a diode is provided with contact layers by sputtering, vapour plating or electroless plating and coextensive electrodes are secured. A cylindrical preform of glass or glazed ceramic is fitted round the assembly and secured by a layer of polymeric passivant, e.g. a silicone resin or rubber, epoxy resin, polyimide or fluorocarbon polymer. The electrodes may be of Cu soft soldered or of W or Mo hard soldered to the diode which may be of Ge or Si. In a second embodiment, Fig. 2, a diode is provided with W or Mo contact plates 216 and terminal members 212, 214 which have pedestals which contact plates 216. A layer of Au or other malleable metal can be inserted between the contact plates and the pedestals. Each contact plate may be bonded to the wafer or pedestal but not both, or may not be bonded. A preform 224 surrounds the wafer, contact plates, and pedestals, the assembly is inserted in a mould under pressure and polymeric passivant is injected into the space between the preform and the other components through a sprue 226 to form the bonding layer 222. In a further embodiment, Fig. 3 (not shown), an SCR having a double bevelled edge is arranged between two main terminal members, the member contacting the larger face extending past the edge of the wafer, and a preform is fitted round the wafer and smaller terminal and bonded by a layer of polymeric passivant. The gate contact extends through an aperture in one main electrode and is insulated by polymeric passivant or by a small preform secured to the main electrode and wafer by a layer or polymeric passivant. The semi-conductor diode may also be a Schottky diode or a transistor.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US3965070A | 1970-05-22 | 1970-05-22 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1356157A true GB1356157A (en) | 1974-06-12 |
Family
ID=21906611
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1675671A Expired GB1356157A (en) | 1970-05-22 | 1971-05-24 | Semiconductor device with polymeric passivant bonded preform |
Country Status (4)
Country | Link |
---|---|
DE (2) | DE2125106A1 (en) |
FR (1) | FR2090206A1 (en) |
GB (1) | GB1356157A (en) |
IE (1) | IE35063B1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2239774A1 (en) * | 2009-04-11 | 2010-10-13 | SEMIKRON Elektronik GmbH & Co. KG | High-power semiconductor element with edge passivation and method for producing same |
CN104124215A (en) * | 2014-06-26 | 2014-10-29 | 江苏省宜兴电子器件总厂 | Packaging structure and packaging technology capable of synchronously completing welding, bonding and sealing |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5754043B2 (en) * | 1973-05-21 | 1982-11-16 | ||
GB1553243A (en) * | 1975-08-04 | 1979-09-26 | Gen Electric | Semiconductor |
GB1563421A (en) * | 1975-12-18 | 1980-03-26 | Gen Electric | Polyimide-siloxane copolymer protective coating for semiconductor devices |
DE4040753A1 (en) * | 1990-12-19 | 1992-06-25 | Siemens Ag | PERFORMANCE SEMICONDUCTOR COMPONENT |
-
1971
- 1971-04-16 IE IE47371A patent/IE35063B1/en unknown
- 1971-05-19 FR FR7118100A patent/FR2090206A1/fr not_active Withdrawn
- 1971-05-21 DE DE19712125106 patent/DE2125106A1/en active Pending
- 1971-05-21 DE DE19717119711 patent/DE7119711U/en not_active Expired
- 1971-05-24 GB GB1675671A patent/GB1356157A/en not_active Expired
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2239774A1 (en) * | 2009-04-11 | 2010-10-13 | SEMIKRON Elektronik GmbH & Co. KG | High-power semiconductor element with edge passivation and method for producing same |
CN104124215A (en) * | 2014-06-26 | 2014-10-29 | 江苏省宜兴电子器件总厂 | Packaging structure and packaging technology capable of synchronously completing welding, bonding and sealing |
CN104124215B (en) * | 2014-06-26 | 2017-02-15 | 江苏省宜兴电子器件总厂 | Packaging structure and packaging technology capable of synchronously completing welding, bonding and sealing |
Also Published As
Publication number | Publication date |
---|---|
IE35063L (en) | 1971-11-22 |
DE2125106A1 (en) | 1971-12-02 |
DE7119711U (en) | 1972-02-03 |
FR2090206A1 (en) | 1972-01-14 |
IE35063B1 (en) | 1975-10-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PLNP | Patent lapsed through nonpayment of renewal fees |