GB1305319A - - Google Patents
Info
- Publication number
- GB1305319A GB1305319A GB2323671A GB2323671A GB1305319A GB 1305319 A GB1305319 A GB 1305319A GB 2323671 A GB2323671 A GB 2323671A GB 2323671 A GB2323671 A GB 2323671A GB 1305319 A GB1305319 A GB 1305319A
- Authority
- GB
- United Kingdom
- Prior art keywords
- cells
- points
- tracks
- terminals
- providing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001465 metallisation Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US76245968A | 1968-09-25 | 1968-09-25 | |
US1684070A | 1970-03-05 | 1970-03-05 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1305319A true GB1305319A (ja) | 1973-01-31 |
Family
ID=34315863
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2323671A Expired GB1305319A (ja) | 1968-09-25 | 1971-04-19 |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB1305319A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2153590A (en) * | 1984-02-01 | 1985-08-21 | Ramesh Chandra Varshney | Matrix of functional circuits on a semiconductor wafer |
-
1971
- 1971-04-19 GB GB2323671A patent/GB1305319A/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2153590A (en) * | 1984-02-01 | 1985-08-21 | Ramesh Chandra Varshney | Matrix of functional circuits on a semiconductor wafer |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB1443361A (en) | Lsi chip construction | |
SE8401266L (sv) | Universalgruppering av halvledaranordningar | |
MY103143A (en) | Interconnected semiconductor devices | |
KR870007460A (ko) | 캐리선견가산기와 캐리전송방법 | |
GB1485249A (en) | Semiconductor integrated circuit | |
GB1513893A (en) | Integrated circuit structure | |
EP0335695A3 (en) | Integrated circuit device comprising interconnection wiring | |
GB1305319A (ja) | ||
EP0388891A3 (en) | Semiconductor device | |
EP0338817A3 (en) | Semiconductor integrated circuit device and method of producing the same using master slice approach | |
GB1445591A (en) | Mounting integrated circuit elements | |
GB1221914A (en) | Manufacture of integrated circuits | |
JPS54139415A (en) | Semiconductor channel switch | |
GB1306189A (ja) | ||
JPS5578561A (en) | Master-slice lsi circuit device | |
GB1305010A (ja) | ||
JPS57202776A (en) | Semiconductor device | |
JPS5231627A (en) | Semiconductor memory unit | |
JPS5265666A (en) | Semiconductor device | |
JPS5387A (en) | Automatic design system | |
UST101804I4 (en) | Integrated circuit layout utilizing separated active circuit and wiring regions | |
JPS5797660A (en) | High density structure | |
GB1277172A (en) | Method of making a large integrated circuit | |
JPS53127285A (en) | Semiconductor integrated circuit device | |
JPS5325382A (en) | Wiring method of lsi |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PE20 | Patent expired after termination of 20 years |