GB1244361A - Transistor circuits for delaying analogue signals - Google Patents

Abstract

1,244,361. Analogue storage and delay circuits. FERNSEH G.m.b.H. 19 Sept., 1968 [19 Sept., 1967; 18 Oct., 1967; 18 Nov., 1967; 31 Jan., 1968; 3 Feb., 1968; 5 March, 1968], No. 44517/68. Heading H3U. In an analogue delay or storage circuit of the type in which signal samples are passed along a chain of charge storage elements, the elements are coupled by transistors in common control electrode configuration and series resistors. In Fig. 1, when a positive-going clock pulse is applied to the lower plate of capacitor 211 the capacitor charges to an extent dependent upon the analogue signal applied to resistor 214. When the clock pulse applied to the lower plate of a capacitor 221 goes positive the charge is transferred to 221. Thus charges are passed along the chain. A filter at the output may reconstitute the signal and a gate controlled by narrow clock pulses may precede the circuit to obtain instantaneous instead of average samples (Fig. 4, not shown). The transistor may be replaced by Darlington pairs or by field effect transistors. Charge stored in the transistors may be discharged by applying clock pulses to the transistor bases (Figs. 5 and 6, not shown). Instead of transferring charges together in a two-phase cycle they may be transferred one at a time in reverse order to increase the delay, a shift register being used for this purpose (Figs. 8-11, not shown). Charge storage diodes may replace the capacitors (Fig. 3, not shown).