GB1229385A - - Google Patents

Info

Publication number
GB1229385A
GB1229385A GB1229385DA GB1229385A GB 1229385 A GB1229385 A GB 1229385A GB 1229385D A GB1229385D A GB 1229385DA GB 1229385 A GB1229385 A GB 1229385A
Authority
GB
United Kingdom
Prior art keywords
silicon nitride
oct
igfet
layer
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1229385A publication Critical patent/GB1229385A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
GB1229385D 1968-10-16 1969-10-15 Expired GB1229385A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19681803392 DE1803392A1 (de) 1968-10-16 1968-10-16 Schutzvorrichtung fuer einen Feldeffekttransistor

Publications (1)

Publication Number Publication Date
GB1229385A true GB1229385A (de) 1971-04-21

Family

ID=5710660

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1229385D Expired GB1229385A (de) 1968-10-16 1969-10-15

Country Status (7)

Country Link
AT (1) AT303819B (de)
CH (1) CH497795A (de)
DE (1) DE1803392A1 (de)
FR (1) FR2020823A1 (de)
GB (1) GB1229385A (de)
NL (1) NL6913792A (de)
SE (1) SE343431B (de)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2247779A (en) * 1990-09-05 1992-03-11 Samsung Electronics Co Ltd Semiconductor device tolerant of electrostatic discharge
US7728363B2 (en) 2006-11-09 2010-06-01 Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. Protective structure for semiconductor sensors
US9514995B1 (en) 2015-05-21 2016-12-06 Globalfoundries Inc. Implant-free punch through doping layer formation for bulk FinFET structures

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5910587B2 (ja) * 1977-08-10 1984-03-09 株式会社日立製作所 半導体装置の保護装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2247779A (en) * 1990-09-05 1992-03-11 Samsung Electronics Co Ltd Semiconductor device tolerant of electrostatic discharge
US7728363B2 (en) 2006-11-09 2010-06-01 Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. Protective structure for semiconductor sensors
US9514995B1 (en) 2015-05-21 2016-12-06 Globalfoundries Inc. Implant-free punch through doping layer formation for bulk FinFET structures

Also Published As

Publication number Publication date
CH497795A (de) 1970-10-15
SE343431B (de) 1972-03-06
DE1803392A1 (de) 1970-06-18
AT303819B (de) 1972-12-11
FR2020823A1 (de) 1970-07-17
NL6913792A (de) 1970-04-20

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees