GB1208077A - Semiconductor devices - Google Patents

Semiconductor devices

Info

Publication number
GB1208077A
GB1208077A GB1749468A GB1749468A GB1208077A GB 1208077 A GB1208077 A GB 1208077A GB 1749468 A GB1749468 A GB 1749468A GB 1749468 A GB1749468 A GB 1749468A GB 1208077 A GB1208077 A GB 1208077A
Authority
GB
United Kingdom
Prior art keywords
layer
oxide
semi
silicon
top layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1749468A
Inventor
Frank Anderson Sewell Jr
Nigel Conrad Tombs
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sperry Corp
Original Assignee
Sperry Rand Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sperry Rand Corp filed Critical Sperry Rand Corp
Publication of GB1208077A publication Critical patent/GB1208077A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors having potential barriers
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

1,208,077. Semi-conductor devices. SPERRY RAND CORP. 11 April, 1968 [19 May, 1967], No. 17494/68. Heading H1K. An insulating layer 2 on the surface of a semi-conductor device comprises a bottom layer 6 of silicon oxide at least 100Š thick and a top layer 5 of silicon nitride or silicon oxynitride, the total thickness of the layer 2 being no greater than 1500Š. The embodiment shown comprises an MIS capacitor formed on an N-type Si body 3. The oxide layer 6 is formed by oxidation in pure O 2 or in argon containing 1% N 2 O. The top layer 5 may be deposited as disclosed in Specifications 1,125,650 or 1,130,138. The invention may also be applied to an IGFET, in which the combined oxide nitride layer is used firstly as a diffusion mask to define source and drain regions, and then as gate insulation and junction edge passivation. Reference has been directed by the Comptroller to Specification 1,165,009.
GB1749468A 1967-05-19 1968-04-11 Semiconductor devices Expired GB1208077A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US63980867A 1967-05-19 1967-05-19

Publications (1)

Publication Number Publication Date
GB1208077A true GB1208077A (en) 1970-10-07

Family

ID=24565630

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1749468A Expired GB1208077A (en) 1967-05-19 1968-04-11 Semiconductor devices

Country Status (5)

Country Link
DE (1) DE1769396A1 (en)
FR (1) FR1565865A (en)
GB (1) GB1208077A (en)
NL (1) NL158656B (en)
SE (1) SE350651B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0031107A1 (en) * 1979-12-15 1981-07-01 Kabushiki Kaisha Toshiba Process for fabricating a bipolar integrated circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE337430B (en) * 1969-11-17 1971-08-09 Inst Halvledarforskning Ab

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0031107A1 (en) * 1979-12-15 1981-07-01 Kabushiki Kaisha Toshiba Process for fabricating a bipolar integrated circuit

Also Published As

Publication number Publication date
NL6807032A (en) 1968-11-20
DE1769396A1 (en) 1971-09-23
NL158656B (en) 1978-11-15
FR1565865A (en) 1969-05-02
SE350651B (en) 1972-10-30

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee